PSOC™ Edge MCU: PSRAM read, write, and SMIF cache operations

This code example demonstrates how to interface an external PSRAM using the serial memory interface (SMIF) in octal-SPI DDR mode in Infineon's PSOC™ Edge MCUs using the serial memory library. It also demonstrates SMIF cache operations like clean and invalidate using Execute in Place (XIP) and Memory Mapped I/O (MMIO) modes and SMIF XIP encryption and decryption.

This code example has a three project structure: CM33 secure, CM33 non-secure, and CM55 projects. All three projects are programmed to the external QSPI flash and executed in XIP mode. Extended boot launches the CM33 secure project from a fixed location in the external flash, which then configures the protection settings and launches the CM33 non-secure application. Additionally, CM33 non-secure application enables CM55 CPU and launches the CM55 application. This application is in CM33 secure environment.

View this README on GitHub.

Provide feedback on this code example.

See the Design and implementation for the functional description of this code example.

Requirements

• ModusToolbox™ v3.7 or later (tested with v3.7)
• Board support package (BSP) minimum required version: 1.0.0
• Programming language: C
• Associated parts: All PSOC™ Edge MCU parts

Supported toolchains (make variable 'TOOLCHAIN')

• GNU Arm® Embedded Compiler v14.2.1 (GCC_ARM) – Default value of TOOLCHAIN
• Arm® Compiler v6.22 (ARM)
• IAR C/C++ Compiler v9.50.2 (IAR)
• LLVM Embedded Toolchain for Arm® v19.1.5 (LLVM_ARM)

Supported kits (make variable 'TARGET')

• PSOC™ Edge E84 Evaluation Kit (KIT_PSE84_EVAL_EPC2) – Default value of TARGET
• PSOC™ Edge E84 Evaluation Kit (KIT_PSE84_EVAL_EPC4)

Hardware setup

This example uses the board's default configuration. See the kit user guide to ensure that the board is configured correctly.

Ensure the following jumper and pin configuration on board:

• BOOT SW must be in the HIGH/ON position
• J20 and J21 must be in the tristate/not connected (NC) position for the PSOC™ Edge E84 Evaluation Kit

Software setup

See the ModusToolbox™ tools package installation guide for information about installing and configuring the tools package.

Install a terminal emulator if you do not have one. Instructions in this document use Tera Term.

This example requires no additional software or tools.

Operation

See Using the code example for instructions on creating a project, opening it in various supported IDEs, and performing tasks, such as building, programming, and debugging the application within the respective IDEs.

1. Connect the board to your PC using the provided USB cable through the KitProg3 USB connector

2. Open a terminal program and select the KitProg3 COM port. Set the serial port parameters to 8N1 and 115200 baud

3. Initially, test the SMIF operations with the cache disabled and XIP encryption and decryption is disabled by setting the value of the CACHE_ENABLE and XIP_ENCRYPT_ENABLE macro to 0 in <application>/proj_cm33_s/main.c. The value of both macros is 0 by default

4. After programming, the application starts automatically. Confirm that the following is displayed on the UART terminal

   Figure 1. Terminal output when cache is disabled

   

   Since the SMIF cache is disabled, it is bypassed during read and write operations, and hence, the data read from or the data written to the memory address are the same

5. To demonstrate the SMIF cache operations, set the value of the CACHE_ENABLE macro to 1 in <application>/proj_cm33_s/main.c

6. Build and program the application using step 4

7. After programming, the application starts automatically. Confirm that the following is displayed on the UART terminal:

   Figure 2. Terminal output when cache enabled

   

   Since the SMIF cache is enabled, the actual data change in the cache or target memory appear after the clean and invalidate operations, as shown in terminal output

8. To demonstrate the SMIF XIP encryption and decryption operations, set the value of the XIP_ENCRYPT_ENABLE macro to '1' in <application>/proj_cm33_s/main.c

   Note: When XIP_ENCRYPT_ENABLE is set to 1U, the CACHE_ENABLE macro should be set to 0U (the cache-disabled path), as the encryption demo operates in the non-cache code path.

9. Clean, build, and program the application as per the steps provided in the operation section

10. After programming, the application starts automatically. Confirm that the following is displayed on the UART terminal:

    Figure 3. Terminal output when XIP encryption and decryption enabled

    

    Since XIP encryption and decryption is enabled, the encrypted data is written to PSRAM in MMIO mode, and when the same address is read in XIP mode the SMIF hardware automatically decrypts the data on-the-fly, producing output that matches the original plaintext test data, as shown in terminal output

Related resources

Resources	Links
Application notes	AN235935 – Getting started with PSOC™ Edge E8 MCU on ModusToolbox™ software
Code examples	Using ModusToolbox™ on GitHub
Device documentation	PSOC™ Edge MCU datasheets PSOC™ Edge MCU reference manuals
Development kits	Select your kits from the Evaluation board finder
Libraries	mtb-dsl-pse8xxgp – Device support library for PSE8XXGP retarget-io – Utility library to retarget STDIO messages to a UART port
Tools	ModusToolbox™ – ModusToolbox™ software is a collection of easy-to-use libraries and tools enabling rapid development with Infineon MCUs for applications ranging from wireless and cloud-connected systems, edge AI/ML, embedded sense and control, to wired USB connectivity using PSOC™ Industrial/IoT MCUs, AIROC™ Wi-Fi and Bluetooth® connectivity devices, XMC™ Industrial MCUs, and EZ-USB™/EZ-PD™ wired connectivity controllers. ModusToolbox™ incorporates a comprehensive set of BSPs, HAL, libraries, configuration tools, and provides support for industry-standard IDEs to fast-track your embedded application development

Other resources

Infineon provides a wealth of data at www.infineon.com to help you select the right device, and quickly and effectively integrate it into your design.

Document history

Document title: CE238579 – PSOC™ Edge MCU: PSRAM read, write, and SMIF cache operations

Version	Description of change
1.x.0	New code example Early access release
2.0.0	GitHub release
2.0.1	Removed se-rt-services-utils.mtb from the cm33_s project
2.1.0	Added SMIF XIP encryption and decryption operations

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PSOC™, formerly known as PSoC™, is a trademark of Infineon Technologies. Any references to PSoC™ in this document or others shall be deemed to refer to PSOC™.

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