@@ -19,15 +19,15 @@ def test_read_routes_to_device(self):
1919 proc = _FakeProcessor ()
2020 bus = Bus (proc )
2121 mem = MemoryDevice ("test" , size = 4 )
22- bus .add_device (0x1000 , 0x1003 , mem )
22+ bus .add_device ([( 0x1000 , 0x1003 )] , mem )
2323 mem .write (2 , 0x42 )
2424 self .assertEqual (bus .read (0x1002 ), 0x42 )
2525
2626 def test_write_routes_to_device (self ):
2727 proc = _FakeProcessor ()
2828 bus = Bus (proc )
2929 mem = MemoryDevice ("test" , size = 4 )
30- bus .add_device (0x1000 , 0x1003 , mem )
30+ bus .add_device ([( 0x1000 , 0x1003 )] , mem )
3131 bus .write (0x1001 , 0x42 )
3232 self .assertEqual (mem .read (1 ), 0x42 )
3333
@@ -37,7 +37,7 @@ def test_device_sees_local_address(self):
3737 proc = _FakeProcessor ()
3838 bus = Bus (proc )
3939 mem = MemoryDevice ("test" , size = 4 )
40- bus .add_device (0x8000 , 0x8003 , mem )
40+ bus .add_device ([( 0x8000 , 0x8003 )] , mem )
4141 bus .write (0x8003 , 0x42 )
4242 self .assertEqual (mem .read (3 ), 0x42 )
4343
@@ -60,30 +60,83 @@ def test_two_devices_at_different_ranges(self):
6060 bus = Bus (proc )
6161 mem_a = MemoryDevice ("a" , size = 4 )
6262 mem_b = MemoryDevice ("b" , size = 4 )
63- bus .add_device (0x1000 , 0x1003 , mem_a )
64- bus .add_device (0x2000 , 0x2003 , mem_b )
63+ bus .add_device ([( 0x1000 , 0x1003 )] , mem_a )
64+ bus .add_device ([( 0x2000 , 0x2003 )] , mem_b )
6565 bus .write (0x1000 , 0x11 )
6666 bus .write (0x2000 , 0x22 )
6767 self .assertEqual (bus .read (0x1000 ), 0x11 )
6868 self .assertEqual (bus .read (0x2000 ), 0x22 )
6969
70- def test_later_device_overlays_earlier (self ):
70+ # registration validation
71+
72+ def test_overlapping_device_raises (self ):
73+ proc = _FakeProcessor ()
74+ bus = Bus (proc )
75+ mem_a = MemoryDevice ("a" , size = 4 )
76+ mem_b = MemoryDevice ("b" , size = 2 )
77+ bus .add_device ([(0x1000 , 0x1003 )], mem_a )
78+ with self .assertRaises (ValueError ):
79+ bus .add_device ([(0x1000 , 0x1001 )], mem_b )
80+
81+ def test_start_negative_raises (self ):
82+ proc = _FakeProcessor ()
83+ bus = Bus (proc )
84+ mem = MemoryDevice ("test" , size = 1 )
85+ with self .assertRaises (ValueError ):
86+ bus .add_device ([(- 1 , - 1 )], mem )
87+
88+ def test_end_past_address_space_raises (self ):
89+ proc = _FakeProcessor ()
90+ bus = Bus (proc )
91+ mem = MemoryDevice ("test" , size = 2 )
92+ with self .assertRaises (ValueError ):
93+ bus .add_device ([(0xFFFF , 0x10000 )], mem )
94+
95+ def test_start_greater_than_end_raises (self ):
7196 proc = _FakeProcessor ()
7297 bus = Bus (proc )
73- mem_a = MemoryDevice ("a" , size = 4 , fill = 0xAA )
74- mem_b = MemoryDevice ("b" , size = 2 , fill = 0xBB )
75- bus .add_device (0x1000 , 0x1003 , mem_a )
76- bus .add_device (0x1000 , 0x1001 , mem_b )
77- self .assertEqual (bus .read (0x1000 ), 0xBB ) # overlaid by b
78- self .assertEqual (bus .read (0x1002 ), 0xAA ) # still a
98+ mem = MemoryDevice ("test" , size = 4 )
99+ with self .assertRaises (ValueError ):
100+ bus .add_device ([(0x1003 , 0x1000 )], mem )
101+
102+ def test_range_size_mismatch_raises (self ):
103+ proc = _FakeProcessor ()
104+ bus = Bus (proc )
105+ mem = MemoryDevice ("test" , size = 4 )
106+ with self .assertRaises (ValueError ):
107+ bus .add_device ([(0x1000 , 0x1001 )], mem )
108+
109+ # non-contiguous ranges
110+
111+ def test_non_contiguous_ranges_assign_sequential_registers (self ):
112+ proc = _FakeProcessor ()
113+ bus = Bus (proc )
114+ mem = MemoryDevice ("test" , size = 3 )
115+ bus .add_device ([(0x1000 , 0x1000 ), (0x2000 , 0x2001 )], mem )
116+ bus .write (0x1000 , 0xAA ) # register 0
117+ bus .write (0x2000 , 0xBB ) # register 1
118+ bus .write (0x2001 , 0xCC ) # register 2
119+ self .assertEqual (mem .read (0 ), 0xAA )
120+ self .assertEqual (mem .read (1 ), 0xBB )
121+ self .assertEqual (mem .read (2 ), 0xCC )
122+
123+ # add_device sets bus reference
124+
125+ def test_add_device_sets_bus_on_device (self ):
126+ proc = _FakeProcessor ()
127+ bus = Bus (proc )
128+ mem = MemoryDevice ("test" , size = 4 )
129+ self .assertIsNone (mem .bus )
130+ bus .add_device ([(0x1000 , 0x1003 )], mem )
131+ self .assertIs (mem .bus , bus )
79132
80133 # reset
81134
82135 def test_reset_resets_all_devices (self ):
83136 proc = _FakeProcessor ()
84137 bus = Bus (proc )
85138 mem = MemoryDevice ("test" , size = 4 )
86- bus .add_device (0x1000 , 0x1003 , mem )
139+ bus .add_device ([( 0x1000 , 0x1003 )] , mem )
87140 mem .ticks = 99
88141 bus .reset ()
89142 # BaseDevice.reset() is a no-op, but processor.reset() is called
@@ -102,8 +155,8 @@ def test_tick_fans_out_to_all_devices(self):
102155 bus = Bus (proc )
103156 mem_a = MemoryDevice ("a" , size = 4 )
104157 mem_b = MemoryDevice ("b" , size = 4 )
105- bus .add_device (0x1000 , 0x1003 , mem_a )
106- bus .add_device (0x2000 , 0x2003 , mem_b )
158+ bus .add_device ([( 0x1000 , 0x1003 )] , mem_a )
159+ bus .add_device ([( 0x2000 , 0x2003 )] , mem_b )
107160 bus .tick (5 )
108161 self .assertEqual (mem_a .ticks , 5 )
109162 self .assertEqual (mem_b .ticks , 5 )
@@ -112,7 +165,7 @@ def test_tick_accumulates(self):
112165 proc = _FakeProcessor ()
113166 bus = Bus (proc )
114167 mem = MemoryDevice ("test" , size = 4 )
115- bus .add_device (0x1000 , 0x1003 , mem )
168+ bus .add_device ([( 0x1000 , 0x1003 )] , mem )
116169 bus .tick (3 )
117170 bus .tick (7 )
118171 self .assertEqual (mem .ticks , 10 )
@@ -123,7 +176,7 @@ def test_device_finds_by_name(self):
123176 proc = _FakeProcessor ()
124177 bus = Bus (proc )
125178 mem = MemoryDevice ("my_ram" , size = 4 )
126- bus .add_device (0x1000 , 0x1003 , mem )
179+ bus .add_device ([( 0x1000 , 0x1003 )] , mem )
127180 self .assertIs (bus .device ("my_ram" ), mem )
128181
129182 def test_device_raises_for_unknown_name (self ):
@@ -138,15 +191,15 @@ def test_getitem_reads_address(self):
138191 proc = _FakeProcessor ()
139192 bus = Bus (proc )
140193 mem = MemoryDevice ("test" , size = 4 )
141- bus .add_device (0x1000 , 0x1003 , mem )
194+ bus .add_device ([( 0x1000 , 0x1003 )] , mem )
142195 mem .write (0 , 0x42 )
143196 self .assertEqual (bus [0x1000 ], 0x42 )
144197
145198 def test_setitem_writes_address (self ):
146199 proc = _FakeProcessor ()
147200 bus = Bus (proc )
148201 mem = MemoryDevice ("test" , size = 4 )
149- bus .add_device (0x1000 , 0x1003 , mem )
202+ bus .add_device ([( 0x1000 , 0x1003 )] , mem )
150203 bus [0x1001 ] = 0x42
151204 self .assertEqual (mem .read (1 ), 0x42 )
152205
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