DDR4 Controller #3
Description
We need a DDR4 Controller, to manage global memory, which sits in DDR chips, separate from the main GPU chip.
The DDR4 Controller will be used to copy data to and from the GPU global memory, in order to populate shared memory, caches and similar on the GPU chip itself; and in order for the GPU to be able to write data back to global memory. For now, we will assume that all communications are with a single GPU Controller module on the GPU die. For example, we will assume for now that any data copied from mainboard main memory to GPU global memory will pass via the GPU controller.
What we need for VeriGPU:
- comprehensive verification, ideally including formal verification
- clear documentation on how to use and integrate with VeriGPU
- how to use the interface to write to GPU global memory?
- how to use the interface to read from GPU global memory?
- ideally, a PR that integrates the DDR4 controller into VeriGPU
Bear in mind that tape-out at 5nm costs $250M or so, so we want things to work first time. Therefore verification is important :)