sha256_processor_sim

#! /opt/homebrew/Cellar/icarus-verilog/12.0/bin/vvp
:ivl_version "12.0 (stable)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision - 12;
:vpi_module "/opt/homebrew/Cellar/icarus-verilog/12.0/lib/ivl/system.vpi";
:vpi_module "/opt/homebrew/Cellar/icarus-verilog/12.0/lib/ivl/vhdl_sys.vpi";
:vpi_module "/opt/homebrew/Cellar/icarus-verilog/12.0/lib/ivl/vhdl_textio.vpi";
:vpi_module "/opt/homebrew/Cellar/icarus-verilog/12.0/lib/ivl/v2005_math.vpi";
:vpi_module "/opt/homebrew/Cellar/icarus-verilog/12.0/lib/ivl/va_math.vpi";
S_0x13a937ff0 .scope module, "sha256_processor_tb" "sha256_processor_tb" 2 3;
 .timescale -9 -12;
P_0x13a938160 .param/l "HASH_ABC" 0 2 32, C4<1011101001111000000101101011111110001111000000011100111111101010010000010100000101000000110111100101110110101110001000100010001110110000000000110110000110100011100101100001011101111010100111001011010000010000111111110110000111110010000000000001010110101101>;
P_0x13a9381a0 .param/l "HASH_BLOCK_BOUNDARY" 0 2 34, C4<1111000010001010011110001100101110111010111011100000100000101011000001010010101011100000011100001000111100110010111110100001111001010000110001011100010000100001101010100111011100101011101001011101101110110100000001101010001011101010011010111110001101000010>;
P_0x13a9381e0 .param/l "HASH_LONG" 0 2 33, C4<1100111101011011000101101010011101111000101011111000001110000000000000110110110011100101100111100111101100000100100100100011011100001011001001001001101100010001111010001111000001111010010100011010111110101100010001010000001101111010111111101110100111010001>;
P_0x13a938220 .param/l "TEST_CASE_ABC" 0 2 25, +C4<00000000000000000000000000000000>;
P_0x13a938260 .param/l "TEST_CASE_BLOCK_BOUNDARY" 0 2 27, +C4<00000000000000000000000000000010>;
P_0x13a9382a0 .param/l "TEST_CASE_LONG" 0 2 26, +C4<00000000000000000000000000000001>;
v0x13a990de0_0 .net "busy", 0 0, v0x13a98fe30_0;  1 drivers
v0x13a990ea0_0 .var "clk", 0 0;
v0x13a990f30_0 .var/i "current_test", 31 0;
v0x13a990fc0_0 .var "data_in", 31 0;
v0x13a991070_0 .var/i "data_index", 31 0;
v0x13a991150_0 .var "data_valid", 0 0;
v0x13a9911e0_0 .net "done", 0 0, v0x13a990440_0;  1 drivers
v0x13a991290_0 .net "final_hash", 255 0, v0x13a9904e0_0;  1 drivers
v0x13a991340_0 .var/i "i", 31 0;
v0x13a991450_0 .var "last_data", 0 0;
v0x13a991500_0 .var "rst", 0 0;
v0x13a991590_0 .net "size_bytes", 31 0, v0x13a990a30_0;  1 drivers
v0x13a991620_0 .var "start", 0 0;
v0x13a9916d0 .array "test_data", 1023 0, 7 0;
v0x13a991760_0 .var/i "test_data_size", 31 0;
v0x13a991800_0 .var/i "word_index", 31 0;
S_0x13a9278b0 .scope task, "feed_data" "feed_data" 2 103, 2 103 0, S_0x13a937ff0;
 .timescale -9 -12;
E_0x13a939db0 .event posedge, v0x13a98ec90_0;
TD_sha256_processor_tb.feed_data ;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0x13a991150_0, 0, 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0x13a991450_0, 0, 1;
T_0.0 ;
    %load/vec4 v0x13a991070_0;
    %load/vec4 v0x13a991760_0;
    %cmp/s;
    %jmp/0xz T_0.1, 5;
    %load/vec4 v0x13a991070_0;
    %addi 3, 0, 32;
    %load/vec4 v0x13a991760_0;
    %cmp/s;
    %jmp/0xz  T_0.2, 5;
    %ix/getv/s 4, v0x13a991070_0;
    %load/vec4a v0x13a9916d0, 4;
    %load/vec4 v0x13a991070_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %load/vec4a v0x13a9916d0, 4;
    %concat/vec4; draw_concat_vec4
    %load/vec4 v0x13a991070_0;
    %addi 2, 0, 32;
    %ix/vec4/s 4;
    %load/vec4a v0x13a9916d0, 4;
    %concat/vec4; draw_concat_vec4
    %load/vec4 v0x13a991070_0;
    %addi 3, 0, 32;
    %ix/vec4/s 4;
    %load/vec4a v0x13a9916d0, 4;
    %concat/vec4; draw_concat_vec4
    %store/vec4 v0x13a990fc0_0, 0, 32;
    %load/vec4 v0x13a991070_0;
    %addi 4, 0, 32;
    %store/vec4 v0x13a991070_0, 0, 32;
    %jmp T_0.3;
T_0.2 ;
    %load/vec4 v0x13a991070_0;
    %addi 2, 0, 32;
    %load/vec4 v0x13a991760_0;
    %cmp/s;
    %jmp/0xz  T_0.4, 5;
    %ix/getv/s 4, v0x13a991070_0;
    %load/vec4a v0x13a9916d0, 4;
    %load/vec4 v0x13a991070_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %load/vec4a v0x13a9916d0, 4;
    %concat/vec4; draw_concat_vec4
    %load/vec4 v0x13a991070_0;
    %addi 2, 0, 32;
    %ix/vec4/s 4;
    %load/vec4a v0x13a9916d0, 4;
    %concat/vec4; draw_concat_vec4
    %concati/vec4 0, 0, 8;
    %store/vec4 v0x13a990fc0_0, 0, 32;
    %load/vec4 v0x13a991070_0;
    %addi 3, 0, 32;
    %store/vec4 v0x13a991070_0, 0, 32;
    %jmp T_0.5;
T_0.4 ;
    %load/vec4 v0x13a991070_0;
    %addi 1, 0, 32;
    %load/vec4 v0x13a991760_0;
    %cmp/s;
    %jmp/0xz  T_0.6, 5;
    %ix/getv/s 4, v0x13a991070_0;
    %load/vec4a v0x13a9916d0, 4;
    %load/vec4 v0x13a991070_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %load/vec4a v0x13a9916d0, 4;
    %concat/vec4; draw_concat_vec4
    %concati/vec4 0, 0, 16;
    %store/vec4 v0x13a990fc0_0, 0, 32;
    %load/vec4 v0x13a991070_0;
    %addi 2, 0, 32;
    %store/vec4 v0x13a991070_0, 0, 32;
    %jmp T_0.7;
T_0.6 ;
    %ix/getv/s 4, v0x13a991070_0;
    %load/vec4a v0x13a9916d0, 4;
    %concati/vec4 0, 0, 24;
    %store/vec4 v0x13a990fc0_0, 0, 32;
    %load/vec4 v0x13a991070_0;
    %addi 1, 0, 32;
    %store/vec4 v0x13a991070_0, 0, 32;
T_0.7 ;
T_0.5 ;
T_0.3 ;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v0x13a991150_0, 0, 1;
    %load/vec4 v0x13a991760_0;
    %load/vec4 v0x13a991070_0;
    %cmp/s;
    %flag_get/vec4 4;
    %flag_get/vec4 5;
    %or;
    %store/vec4 v0x13a991450_0, 0, 1;
    %wait E_0x13a939db0;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0x13a991150_0, 0, 1;
    %wait E_0x13a939db0;
    %jmp T_0.0;
T_0.1 ;
    %end;
S_0x13a904940 .scope task, "initialize_test_data" "initialize_test_data" 2 57, 2 57 0, S_0x13a937ff0;
 .timescale -9 -12;
v0x13a905b80_0 .var/i "test_case", 31 0;
TD_sha256_processor_tb.initialize_test_data ;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0x13a991340_0, 0, 32;
T_1.8 ;
    %load/vec4 v0x13a991340_0;
    %cmpi/s 1024, 0, 32;
    %jmp/0xz T_1.9, 5;
    %pushi/vec4 0, 0, 8;
    %ix/getv/s 4, v0x13a991340_0;
    %store/vec4a v0x13a9916d0, 4, 0;
    %load/vec4 v0x13a991340_0;
    %addi 1, 0, 32;
    %store/vec4 v0x13a991340_0, 0, 32;
    %jmp T_1.8;
T_1.9 ;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0x13a991070_0, 0, 32;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0x13a991800_0, 0, 32;
    %load/vec4 v0x13a905b80_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 32;
    %cmp/u;
    %jmp/1 T_1.10, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 32;
    %cmp/u;
    %jmp/1 T_1.11, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 32;
    %cmp/u;
    %jmp/1 T_1.12, 6;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0x13a991760_0, 0, 32;
    %jmp T_1.14;
T_1.10 ;
    %pushi/vec4 97, 0, 8; draw_string_vec4
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a9916d0, 4, 0;
    %pushi/vec4 98, 0, 8; draw_string_vec4
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a9916d0, 4, 0;
    %pushi/vec4 99, 0, 8; draw_string_vec4
    %ix/load 4, 2, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a9916d0, 4, 0;
    %pushi/vec4 3, 0, 32;
    %store/vec4 v0x13a991760_0, 0, 32;
    %vpi_call 2 74 "$display", "Test Case: 'abc' (3 bytes)" {0 0 0};
    %jmp T_1.14;
T_1.11 ;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0x13a991340_0, 0, 32;
T_1.15 ;
    %load/vec4 v0x13a991340_0;
    %cmpi/s 64, 0, 32;
    %jmp/0xz T_1.16, 5;
    %load/vec4 v0x13a991340_0;
    %addi 1, 0, 32;
    %pad/s 8;
    %ix/getv/s 4, v0x13a991340_0;
    %store/vec4a v0x13a9916d0, 4, 0;
    %load/vec4 v0x13a991340_0;
    %addi 1, 0, 32;
    %store/vec4 v0x13a991340_0, 0, 32;
    %jmp T_1.15;
T_1.16 ;
    %pushi/vec4 64, 0, 32;
    %store/vec4 v0x13a991760_0, 0, 32;
    %vpi_call 2 83 "$display", "Test Case: Long data (64 bytes)" {0 0 0};
    %jmp T_1.14;
T_1.12 ;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0x13a991340_0, 0, 32;
T_1.17 ;
    %load/vec4 v0x13a991340_0;
    %cmpi/s 56, 0, 32;
    %jmp/0xz T_1.18, 5;
    %pushi/vec4 170, 0, 8;
    %ix/getv/s 4, v0x13a991340_0;
    %store/vec4a v0x13a9916d0, 4, 0;
    %load/vec4 v0x13a991340_0;
    %addi 1, 0, 32;
    %store/vec4 v0x13a991340_0, 0, 32;
    %jmp T_1.17;
T_1.18 ;
    %pushi/vec4 56, 0, 32;
    %store/vec4 v0x13a991760_0, 0, 32;
    %vpi_call 2 92 "$display", "Test Case: Block boundary (56 bytes)" {0 0 0};
    %jmp T_1.14;
T_1.14 ;
    %pop/vec4 1;
    %end;
S_0x13a98ae60 .scope task, "run_test" "run_test" 2 145, 2 145 0, S_0x13a937ff0;
 .timescale -9 -12;
v0x13a98b090_0 .var "expected_hash", 255 0;
v0x13a98b150_0 .var/i "test_case", 31 0;
E_0x13a98b040 .event anyedge, v0x13a990440_0;
TD_sha256_processor_tb.run_test ;
    %load/vec4 v0x13a98b150_0;
    %store/vec4 v0x13a990f30_0, 0, 32;
    %load/vec4 v0x13a98b150_0;
    %store/vec4 v0x13a905b80_0, 0, 32;
    %fork TD_sha256_processor_tb.initialize_test_data, S_0x13a904940;
    %join;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v0x13a991500_0, 0, 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0x13a991620_0, 0, 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0x13a991150_0, 0, 1;
    %delay 20000, 0;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0x13a991500_0, 0, 1;
    %wait E_0x13a939db0;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v0x13a991620_0, 0, 1;
    %wait E_0x13a939db0;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0x13a991620_0, 0, 1;
    %fork TD_sha256_processor_tb.feed_data, S_0x13a9278b0;
    %join;
T_2.19 ;
    %load/vec4 v0x13a9911e0_0;
    %pad/u 32;
    %pushi/vec4 1, 0, 32;
    %cmp/e;
    %flag_get/vec4 4;
    %cmpi/ne 1, 0, 1;
    %jmp/0xz T_2.20, 6;
    %wait E_0x13a98b040;
    %jmp T_2.19;
T_2.20 ;
    %load/vec4 v0x13a991290_0;
    %load/vec4 v0x13a98b090_0;
    %cmp/e;
    %jmp/0xz  T_2.21, 4;
    %vpi_call 2 172 "$display", "\342\234\205 Test PASSED" {0 0 0};
    %jmp T_2.22;
T_2.21 ;
    %vpi_call 2 174 "$display", "\342\235\214 Test FAILED" {0 0 0};
    %vpi_call 2 175 "$display", "Expected: %h", v0x13a98b090_0 {0 0 0};
    %vpi_call 2 176 "$display", "Got:      %h", v0x13a991290_0 {0 0 0};
T_2.22 ;
    %delay 50000, 0;
    %end;
S_0x13a98b200 .scope module, "uut" "sha256_processor" 2 37, 3 3 0, S_0x13a937ff0;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst";
    .port_info 2 /INPUT 1 "start";
    .port_info 3 /INPUT 32 "data_in";
    .port_info 4 /INPUT 1 "data_valid";
    .port_info 5 /INPUT 1 "last_data";
    .port_info 6 /OUTPUT 32 "size_bytes";
    .port_info 7 /OUTPUT 256 "final_hash";
    .port_info 8 /OUTPUT 1 "busy";
    .port_info 9 /OUTPUT 1 "done";
P_0x13a98b3c0 .param/l "COMPLETE" 0 3 25, C4<101>;
P_0x13a98b400 .param/l "FINALIZE" 0 3 24, C4<100>;
P_0x13a98b440 .param/l "IDLE" 0 3 20, C4<000>;
P_0x13a98b480 .param/l "LOAD_BLOCK" 0 3 21, C4<001>;
P_0x13a98b4c0 .param/l "MAX_BYTES" 0 3 17, C4<01000000000000000000000000000000>;
P_0x13a98b500 .param/l "PAD_BLOCK" 0 3 23, C4<011>;
P_0x13a98b540 .param/l "PROCESS" 0 3 22, C4<010>;
v0x13a98fda0_0 .var "block", 511 0;
v0x13a98fe30_0 .var "busy", 0 0;
v0x13a98fec0_0 .net "clk", 0 0, v0x13a990ea0_0;  1 drivers
v0x13a98ff50_0 .var "core_block_in", 511 0;
v0x13a98ffe0_0 .net "core_hash_out", 255 0, v0x13a98f750_0;  1 drivers
v0x13a9900b0_0 .net "core_ready", 0 0, v0x13a98f930_0;  1 drivers
v0x13a990160_0 .var "core_start", 0 0;
v0x13a990210_0 .var "current_hash", 255 0;
v0x13a9902a0_0 .net "data_in", 31 0, v0x13a990fc0_0;  1 drivers
v0x13a9903b0_0 .net "data_valid", 0 0, v0x13a991150_0;  1 drivers
v0x13a990440_0 .var "done", 0 0;
v0x13a9904e0_0 .var "final_hash", 255 0;
v0x13a990590_0 .var "first_block", 0 0;
v0x13a990630_0 .var "last_block_processed", 0 0;
v0x13a9906d0_0 .net "last_data", 0 0, v0x13a991450_0;  1 drivers
v0x13a990770_0 .var "need_padding", 0 0;
v0x13a990810_0 .var "padding_block_needed", 0 0;
v0x13a9909a0_0 .net "rst", 0 0, v0x13a991500_0;  1 drivers
v0x13a990a30_0 .var "size_bytes", 31 0;
v0x13a990ac0_0 .net "start", 0 0, v0x13a991620_0;  1 drivers
v0x13a990b50_0 .var "state", 2 0;
v0x13a990be0_0 .var "total_bits", 63 0;
v0x13a990c70_0 .var "word_count", 5 0;
S_0x13a98b940 .scope module, "sha256_core_inst" "sha256_core" 3 50, 4 3 0, S_0x13a98b200;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst";
    .port_info 2 /INPUT 1 "start";
    .port_info 3 /INPUT 512 "block_in";
    .port_info 4 /OUTPUT 256 "hash_out";
    .port_info 5 /OUTPUT 1 "ready";
P_0x13a98bb00 .param/l "COMP" 1 4 57, C4<10>;
P_0x13a98bb40 .param/l "DONE" 1 4 57, C4<11>;
P_0x13a98bb80 .param/l "H0_INIT" 0 4 35, C4<01101010000010011110011001100111>;
P_0x13a98bbc0 .param/l "H1_INIT" 0 4 36, C4<10111011011001111010111010000101>;
P_0x13a98bc00 .param/l "H2_INIT" 0 4 37, C4<00111100011011101111001101110010>;
P_0x13a98bc40 .param/l "H3_INIT" 0 4 38, C4<10100101010011111111010100111010>;
P_0x13a98bc80 .param/l "H4_INIT" 0 4 39, C4<01010001000011100101001001111111>;
P_0x13a98bcc0 .param/l "H5_INIT" 0 4 40, C4<10011011000001010110100010001100>;
P_0x13a98bd00 .param/l "H6_INIT" 0 4 41, C4<00011111100000111101100110101011>;
P_0x13a98bd40 .param/l "H7_INIT" 0 4 42, C4<01011011111000001100110100011001>;
P_0x13a98bd80 .param/l "IDLE" 1 4 57, C4<00>;
P_0x13a98bdc0 .param/l "PREP" 1 4 57, C4<01>;
v0x13a98dd60 .array "K", 63 0, 31 0;
v0x13a98de10_0 .net "T1", 31 0, L_0x13a9922e0;  1 drivers
v0x13a98dec0_0 .net "T2", 31 0, L_0x13a9925c0;  1 drivers
v0x13a98df80_0 .net *"_ivl_1", 31 0, L_0x13a9918b0;  1 drivers
v0x13a98e030_0 .net *"_ivl_10", 7 0, L_0x13a991e30;  1 drivers
L_0x130078010 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v0x13a98e120_0 .net *"_ivl_13", 0 0, L_0x130078010;  1 drivers
v0x13a98e1d0_0 .net *"_ivl_14", 31 0, L_0x13a991f50;  1 drivers
v0x13a98e280_0 .net *"_ivl_16", 31 0, L_0x13a9920d0;  1 drivers
v0x13a98e330_0 .net *"_ivl_18", 7 0, L_0x13a992170;  1 drivers
v0x13a98e440_0 .net *"_ivl_2", 31 0, L_0x13a9919a0;  1 drivers
L_0x130078058 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v0x13a98e4f0_0 .net *"_ivl_21", 0 0, L_0x130078058;  1 drivers
v0x13a98e5a0_0 .net *"_ivl_25", 31 0, L_0x13a992420;  1 drivers
v0x13a98e650_0 .net *"_ivl_27", 31 0, L_0x13a992520;  1 drivers
v0x13a98e700_0 .net *"_ivl_5", 31 0, L_0x13a991ac0;  1 drivers
v0x13a98e7b0_0 .net *"_ivl_6", 31 0, L_0x13a991c00;  1 drivers
v0x13a98e860_0 .net *"_ivl_8", 31 0, L_0x13a991d60;  1 drivers
v0x13a98e910_0 .var "a", 31 0;
v0x13a98eaa0_0 .var "b", 31 0;
v0x13a98eb30_0 .net "block_in", 511 0, v0x13a98ff50_0;  1 drivers
v0x13a98ebe0_0 .var "c", 31 0;
v0x13a98ec90_0 .net "clk", 0 0, v0x13a990ea0_0;  alias, 1 drivers
v0x13a98ed30_0 .var "d", 31 0;
v0x13a98ede0_0 .var "e", 31 0;
v0x13a98ee90_0 .var "f", 31 0;
v0x13a98ef40_0 .var "g", 31 0;
v0x13a98eff0_0 .var "h", 31 0;
v0x13a98f0a0_0 .var "h0", 31 0;
v0x13a98f150_0 .var "h1", 31 0;
v0x13a98f200_0 .var "h2", 31 0;
v0x13a98f2b0_0 .var "h3", 31 0;
v0x13a98f360_0 .var "h4", 31 0;
v0x13a98f410_0 .var "h5", 31 0;
v0x13a98f4c0_0 .var "h6", 31 0;
v0x13a98e9c0_0 .var "h7", 31 0;
v0x13a98f750_0 .var "hash_out", 255 0;
v0x13a98f7e0_0 .var/i "i", 31 0;
v0x13a98f880_0 .var "msg_idx", 6 0;
v0x13a98f930_0 .var "ready", 0 0;
v0x13a98f9d0_0 .net "rst", 0 0, v0x13a991500_0;  alias, 1 drivers
v0x13a98fa70_0 .net "start", 0 0, v0x13a990160_0;  1 drivers
v0x13a98fb10_0 .var "state", 1 0;
v0x13a98fbc0_0 .var "t", 6 0;
v0x13a98fc70 .array "w", 63 0, 31 0;
E_0x13a98c2e0 .event posedge, v0x13a98f9d0_0, v0x13a98ec90_0;
L_0x13a9918b0 .ufunc/vec4 TD_sha256_processor_tb.uut.sha256_core_inst.sigma1, 32, v0x13a98ede0_0 (v0x13a98dcb0_0) S_0x13a98da30;
L_0x13a9919a0 .arith/sum 32, v0x13a98eff0_0, L_0x13a9918b0;
L_0x13a991ac0 .ufunc/vec4 TD_sha256_processor_tb.uut.sha256_core_inst.ch, 32, v0x13a98ede0_0, v0x13a98ee90_0, v0x13a98ef40_0 (v0x13a98c5c0_0, v0x13a98c670_0, v0x13a98c730_0) S_0x13a98c330;
L_0x13a991c00 .arith/sum 32, L_0x13a9919a0, L_0x13a991ac0;
L_0x13a991d60 .array/port v0x13a98dd60, L_0x13a991e30;
L_0x13a991e30 .concat [ 7 1 0 0], v0x13a98fbc0_0, L_0x130078010;
L_0x13a991f50 .arith/sum 32, L_0x13a991c00, L_0x13a991d60;
L_0x13a9920d0 .array/port v0x13a98fc70, L_0x13a992170;
L_0x13a992170 .concat [ 7 1 0 0], v0x13a98fbc0_0, L_0x130078058;
L_0x13a9922e0 .arith/sum 32, L_0x13a991f50, L_0x13a9920d0;
L_0x13a992420 .ufunc/vec4 TD_sha256_processor_tb.uut.sha256_core_inst.sigma0, 32, v0x13a98e910_0 (v0x13a98d980_0) S_0x13a98d710;
L_0x13a992520 .ufunc/vec4 TD_sha256_processor_tb.uut.sha256_core_inst.maj, 32, v0x13a98e910_0, v0x13a98eaa0_0, v0x13a98ebe0_0 (v0x13a98ca60_0, v0x13a98cb10_0, v0x13a98cbd0_0) S_0x13a98c7e0;
L_0x13a9925c0 .arith/sum 32, L_0x13a992420, L_0x13a992520;
S_0x13a98c330 .scope function.vec4.s32, "ch" "ch" 4 72, 4 72 0, S_0x13a98b940;
 .timescale -9 -12;
; Variable ch is vec4 return value of scope S_0x13a98c330
v0x13a98c5c0_0 .var "x", 31 0;
v0x13a98c670_0 .var "y", 31 0;
v0x13a98c730_0 .var "z", 31 0;
TD_sha256_processor_tb.uut.sha256_core_inst.ch ;
    %load/vec4 v0x13a98c5c0_0;
    %load/vec4 v0x13a98c670_0;
    %and;
    %load/vec4 v0x13a98c5c0_0;
    %inv;
    %load/vec4 v0x13a98c730_0;
    %and;
    %xor;
    %ret/vec4 0, 0, 32;  Assign to ch (store_vec4_to_lval)
    %end;
S_0x13a98c7e0 .scope function.vec4.s32, "maj" "maj" 4 80, 4 80 0, S_0x13a98b940;
 .timescale -9 -12;
; Variable maj is vec4 return value of scope S_0x13a98c7e0
v0x13a98ca60_0 .var "x", 31 0;
v0x13a98cb10_0 .var "y", 31 0;
v0x13a98cbd0_0 .var "z", 31 0;
TD_sha256_processor_tb.uut.sha256_core_inst.maj ;
    %load/vec4 v0x13a98ca60_0;
    %load/vec4 v0x13a98cb10_0;
    %and;
    %load/vec4 v0x13a98ca60_0;
    %load/vec4 v0x13a98cbd0_0;
    %and;
    %xor;
    %load/vec4 v0x13a98cb10_0;
    %load/vec4 v0x13a98cbd0_0;
    %and;
    %xor;
    %ret/vec4 0, 0, 32;  Assign to maj (store_vec4_to_lval)
    %end;
S_0x13a98cc80 .scope function.vec4.s32, "rightrotate" "rightrotate" 4 63, 4 63 0, S_0x13a98b940;
 .timescale -9 -12;
v0x13a98ce60_0 .var "n", 7 0;
; Variable rightrotate is vec4 return value of scope S_0x13a98cc80
v0x13a98cfc0_0 .var "x", 31 0;
TD_sha256_processor_tb.uut.sha256_core_inst.rightrotate ;
    %load/vec4 v0x13a98cfc0_0;
    %ix/getv 4, v0x13a98ce60_0;
    %shiftr 4;
    %load/vec4 v0x13a98cfc0_0;
    %pushi/vec4 32, 0, 32;
    %load/vec4 v0x13a98ce60_0;
    %pad/u 32;
    %sub;
    %ix/vec4 4;
    %shiftl 4;
    %or;
    %ret/vec4 0, 0, 32;  Assign to rightrotate (store_vec4_to_lval)
    %end;
S_0x13a98d080 .scope function.vec4.s32, "sig0" "sig0" 4 104, 4 104 0, S_0x13a98b940;
 .timescale -9 -12;
; Variable sig0 is vec4 return value of scope S_0x13a98d080
v0x13a98d300_0 .var "x", 31 0;
TD_sha256_processor_tb.uut.sha256_core_inst.sig0 ;
    %load/vec4 v0x13a98d300_0;
    %pushi/vec4 7, 0, 8;
    %store/vec4 v0x13a98ce60_0, 0, 8;
    %store/vec4 v0x13a98cfc0_0, 0, 32;
    %callf/vec4 TD_sha256_processor_tb.uut.sha256_core_inst.rightrotate, S_0x13a98cc80;
    %load/vec4 v0x13a98d300_0;
    %pushi/vec4 18, 0, 8;
    %store/vec4 v0x13a98ce60_0, 0, 8;
    %store/vec4 v0x13a98cfc0_0, 0, 32;
    %callf/vec4 TD_sha256_processor_tb.uut.sha256_core_inst.rightrotate, S_0x13a98cc80;
    %xor;
    %load/vec4 v0x13a98d300_0;
    %ix/load 4, 3, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %xor;
    %ret/vec4 0, 0, 32;  Assign to sig0 (store_vec4_to_lval)
    %end;
S_0x13a98d3b0 .scope function.vec4.s32, "sig1" "sig1" 4 112, 4 112 0, S_0x13a98b940;
 .timescale -9 -12;
; Variable sig1 is vec4 return value of scope S_0x13a98d3b0
v0x13a98d670_0 .var "x", 31 0;
TD_sha256_processor_tb.uut.sha256_core_inst.sig1 ;
    %load/vec4 v0x13a98d670_0;
    %pushi/vec4 17, 0, 8;
    %store/vec4 v0x13a98ce60_0, 0, 8;
    %store/vec4 v0x13a98cfc0_0, 0, 32;
    %callf/vec4 TD_sha256_processor_tb.uut.sha256_core_inst.rightrotate, S_0x13a98cc80;
    %load/vec4 v0x13a98d670_0;
    %pushi/vec4 19, 0, 8;
    %store/vec4 v0x13a98ce60_0, 0, 8;
    %store/vec4 v0x13a98cfc0_0, 0, 32;
    %callf/vec4 TD_sha256_processor_tb.uut.sha256_core_inst.rightrotate, S_0x13a98cc80;
    %xor;
    %load/vec4 v0x13a98d670_0;
    %ix/load 4, 10, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %xor;
    %ret/vec4 0, 0, 32;  Assign to sig1 (store_vec4_to_lval)
    %end;
S_0x13a98d710 .scope function.vec4.s32, "sigma0" "sigma0" 4 88, 4 88 0, S_0x13a98b940;
 .timescale -9 -12;
; Variable sigma0 is vec4 return value of scope S_0x13a98d710
v0x13a98d980_0 .var "x", 31 0;
TD_sha256_processor_tb.uut.sha256_core_inst.sigma0 ;
    %load/vec4 v0x13a98d980_0;
    %pushi/vec4 2, 0, 8;
    %store/vec4 v0x13a98ce60_0, 0, 8;
    %store/vec4 v0x13a98cfc0_0, 0, 32;
    %callf/vec4 TD_sha256_processor_tb.uut.sha256_core_inst.rightrotate, S_0x13a98cc80;
    %load/vec4 v0x13a98d980_0;
    %pushi/vec4 13, 0, 8;
    %store/vec4 v0x13a98ce60_0, 0, 8;
    %store/vec4 v0x13a98cfc0_0, 0, 32;
    %callf/vec4 TD_sha256_processor_tb.uut.sha256_core_inst.rightrotate, S_0x13a98cc80;
    %xor;
    %load/vec4 v0x13a98d980_0;
    %pushi/vec4 22, 0, 8;
    %store/vec4 v0x13a98ce60_0, 0, 8;
    %store/vec4 v0x13a98cfc0_0, 0, 32;
    %callf/vec4 TD_sha256_processor_tb.uut.sha256_core_inst.rightrotate, S_0x13a98cc80;
    %xor;
    %ret/vec4 0, 0, 32;  Assign to sigma0 (store_vec4_to_lval)
    %end;
S_0x13a98da30 .scope function.vec4.s32, "sigma1" "sigma1" 4 96, 4 96 0, S_0x13a98b940;
 .timescale -9 -12;
; Variable sigma1 is vec4 return value of scope S_0x13a98da30
v0x13a98dcb0_0 .var "x", 31 0;
TD_sha256_processor_tb.uut.sha256_core_inst.sigma1 ;
    %load/vec4 v0x13a98dcb0_0;
    %pushi/vec4 6, 0, 8;
    %store/vec4 v0x13a98ce60_0, 0, 8;
    %store/vec4 v0x13a98cfc0_0, 0, 32;
    %callf/vec4 TD_sha256_processor_tb.uut.sha256_core_inst.rightrotate, S_0x13a98cc80;
    %load/vec4 v0x13a98dcb0_0;
    %pushi/vec4 11, 0, 8;
    %store/vec4 v0x13a98ce60_0, 0, 8;
    %store/vec4 v0x13a98cfc0_0, 0, 32;
    %callf/vec4 TD_sha256_processor_tb.uut.sha256_core_inst.rightrotate, S_0x13a98cc80;
    %xor;
    %load/vec4 v0x13a98dcb0_0;
    %pushi/vec4 25, 0, 8;
    %store/vec4 v0x13a98ce60_0, 0, 8;
    %store/vec4 v0x13a98cfc0_0, 0, 32;
    %callf/vec4 TD_sha256_processor_tb.uut.sha256_core_inst.rightrotate, S_0x13a98cc80;
    %xor;
    %ret/vec4 0, 0, 32;  Assign to sigma1 (store_vec4_to_lval)
    %end;
    .scope S_0x13a98b940;
T_10 ;
    %pushi/vec4 1116352408, 0, 32;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 1899447441, 0, 32;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 3049323471, 0, 32;
    %ix/load 4, 2, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 3921009573, 0, 32;
    %ix/load 4, 3, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 961987163, 0, 32;
    %ix/load 4, 4, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 1508970993, 0, 32;
    %ix/load 4, 5, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 2453635748, 0, 32;
    %ix/load 4, 6, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 2870763221, 0, 32;
    %ix/load 4, 7, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 3624381080, 0, 32;
    %ix/load 4, 8, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 310598401, 0, 32;
    %ix/load 4, 9, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 607225278, 0, 32;
    %ix/load 4, 10, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 1426881987, 0, 32;
    %ix/load 4, 11, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 1925078388, 0, 32;
    %ix/load 4, 12, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 2162078206, 0, 32;
    %ix/load 4, 13, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 2614888103, 0, 32;
    %ix/load 4, 14, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 3248222580, 0, 32;
    %ix/load 4, 15, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 3835390401, 0, 32;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 4022224774, 0, 32;
    %ix/load 4, 17, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 264347078, 0, 32;
    %ix/load 4, 18, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 604807628, 0, 32;
    %ix/load 4, 19, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 770255983, 0, 32;
    %ix/load 4, 20, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 1249150122, 0, 32;
    %ix/load 4, 21, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 1555081692, 0, 32;
    %ix/load 4, 22, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 1996064986, 0, 32;
    %ix/load 4, 23, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 2554220882, 0, 32;
    %ix/load 4, 24, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 2821834349, 0, 32;
    %ix/load 4, 25, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 2952996808, 0, 32;
    %ix/load 4, 26, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 3210313671, 0, 32;
    %ix/load 4, 27, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 3336571891, 0, 32;
    %ix/load 4, 28, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 3584528711, 0, 32;
    %ix/load 4, 29, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 113926993, 0, 32;
    %ix/load 4, 30, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 338241895, 0, 32;
    %ix/load 4, 31, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 666307205, 0, 32;
    %ix/load 4, 32, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 773529912, 0, 32;
    %ix/load 4, 33, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 1294757372, 0, 32;
    %ix/load 4, 34, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 1396182291, 0, 32;
    %ix/load 4, 35, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 1695183700, 0, 32;
    %ix/load 4, 36, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 1986661051, 0, 32;
    %ix/load 4, 37, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 2177026350, 0, 32;
    %ix/load 4, 38, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 2456956037, 0, 32;
    %ix/load 4, 39, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 2730485921, 0, 32;
    %ix/load 4, 40, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 2820302411, 0, 32;
    %ix/load 4, 41, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 3259730800, 0, 32;
    %ix/load 4, 42, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 3345764771, 0, 32;
    %ix/load 4, 43, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 3516065817, 0, 32;
    %ix/load 4, 44, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 3600352804, 0, 32;
    %ix/load 4, 45, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 4094571909, 0, 32;
    %ix/load 4, 46, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 275423344, 0, 32;
    %ix/load 4, 47, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 430227734, 0, 32;
    %ix/load 4, 48, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 506948616, 0, 32;
    %ix/load 4, 49, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 659060556, 0, 32;
    %ix/load 4, 50, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 883997877, 0, 32;
    %ix/load 4, 51, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 958139571, 0, 32;
    %ix/load 4, 52, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 1322822218, 0, 32;
    %ix/load 4, 53, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 1537002063, 0, 32;
    %ix/load 4, 54, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 1747873779, 0, 32;
    %ix/load 4, 55, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 1955562222, 0, 32;
    %ix/load 4, 56, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 2024104815, 0, 32;
    %ix/load 4, 57, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 2227730452, 0, 32;
    %ix/load 4, 58, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 2361852424, 0, 32;
    %ix/load 4, 59, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 2428436474, 0, 32;
    %ix/load 4, 60, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 2756734187, 0, 32;
    %ix/load 4, 61, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 3204031479, 0, 32;
    %ix/load 4, 62, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %pushi/vec4 3329325298, 0, 32;
    %ix/load 4, 63, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v0x13a98dd60, 4, 0;
    %end;
    .thread T_10;
    .scope S_0x13a98b940;
T_11 ;
    %wait E_0x13a98c2e0;
    %load/vec4 v0x13a98f9d0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_11.0, 8;
    %pushi/vec4 0, 0, 2;
    %assign/vec4 v0x13a98fb10_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0x13a98f930_0, 0;
    %pushi/vec4 0, 0, 256;
    %assign/vec4 v0x13a98f750_0, 0;
    %pushi/vec4 0, 0, 7;
    %assign/vec4 v0x13a98fbc0_0, 0;
    %pushi/vec4 0, 0, 7;
    %assign/vec4 v0x13a98f880_0, 0;
    %pushi/vec4 1779033703, 0, 32;
    %assign/vec4 v0x13a98f0a0_0, 0;
    %pushi/vec4 3144134277, 0, 32;
    %assign/vec4 v0x13a98f150_0, 0;
    %pushi/vec4 1013904242, 0, 32;
    %assign/vec4 v0x13a98f200_0, 0;
    %pushi/vec4 2773480762, 0, 32;
    %assign/vec4 v0x13a98f2b0_0, 0;
    %pushi/vec4 1359893119, 0, 32;
    %assign/vec4 v0x13a98f360_0, 0;
    %pushi/vec4 2600822924, 0, 32;
    %assign/vec4 v0x13a98f410_0, 0;
    %pushi/vec4 528734635, 0, 32;
    %assign/vec4 v0x13a98f4c0_0, 0;
    %pushi/vec4 1541459225, 0, 32;
    %assign/vec4 v0x13a98e9c0_0, 0;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0x13a98f7e0_0, 0, 32;
T_11.2 ;
    %load/vec4 v0x13a98f7e0_0;
    %cmpi/s 64, 0, 32;
    %jmp/0xz T_11.3, 5;
    %pushi/vec4 0, 0, 32;
    %ix/getv/s 3, v0x13a98f7e0_0;
    %ix/load 4, 0, 0; Constant delay
    %assign/vec4/a/d v0x13a98fc70, 0, 4;
    %load/vec4 v0x13a98f7e0_0;
    %addi 1, 0, 32;
    %store/vec4 v0x13a98f7e0_0, 0, 32;
    %jmp T_11.2;
T_11.3 ;
    %vpi_call 4 149 "$display", "RESET: sha256_core reset" {0 0 0};
    %jmp T_11.1;
T_11.0 ;
    %load/vec4 v0x13a98fb10_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 2;
    %cmp/u;
    %jmp/1 T_11.4, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 2;
    %cmp/u;
    %jmp/1 T_11.5, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 2;
    %cmp/u;
    %jmp/1 T_11.6, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 2;
    %cmp/u;
    %jmp/1 T_11.7, 6;
    %jmp T_11.8;
T_11.4 ;
    %load/vec4 v0x13a98fa70_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_11.9, 8;
    %vpi_call 4 155 "$display", "IDLE -> PREP: Starting SHA-256 computation" {0 0 0};
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0x13a98f930_0, 0;
    %pushi/vec4 1779033703, 0, 32;
    %assign/vec4 v0x13a98f0a0_0, 0;
    %pushi/vec4 3144134277, 0, 32;
    %assign/vec4 v0x13a98f150_0, 0;
    %pushi/vec4 1013904242, 0, 32;
    %assign/vec4 v0x13a98f200_0, 0;
    %pushi/vec4 2773480762, 0, 32;
    %assign/vec4 v0x13a98f2b0_0, 0;
    %pushi/vec4 1359893119, 0, 32;
    %assign/vec4 v0x13a98f360_0, 0;
    %pushi/vec4 2600822924, 0, 32;
    %assign/vec4 v0x13a98f410_0, 0;
    %pushi/vec4 528734635, 0, 32;
    %assign/vec4 v0x13a98f4c0_0, 0;
    %pushi/vec4 1541459225, 0, 32;
    %assign/vec4 v0x13a98e9c0_0, 0;
    %pushi/vec4 0, 0, 7;
    %assign/vec4 v0x13a98f880_0, 0;
    %pushi/vec4 1, 0, 2;
    %assign/vec4 v0x13a98fb10_0, 0;
T_11.9 ;
    %jmp T_11.8;
T_11.5 ;
    %load/vec4 v0x13a98f880_0;
    %pad/u 32;
    %cmpi/e 0, 0, 32;
    %jmp/0xz  T_11.11, 4;
    %vpi_call 4 178 "$display", "PREP: Preparing message schedule" {0 0 0};
T_11.11 ;
    %load/vec4 v0x13a98f880_0;
    %pad/u 32;
    %cmpi/u 16, 0, 32;
    %jmp/0xz  T_11.13, 5;
    %load/vec4 v0x13a98eb30_0;
    %pushi/vec4 511, 0, 32;
    %load/vec4 v0x13a98f880_0;
    %pad/u 32;
    %muli 32, 0, 32;
    %sub;
    %pad/u 34;
    %subi 31, 0, 34;
    %part/s 32;
    %load/vec4 v0x13a98f880_0;
    %pad/u 8;
    %ix/vec4 3;
    %ix/load 4, 0, 0; Constant delay
    %assign/vec4/a/d v0x13a98fc70, 0, 4;
    %load/vec4 v0x13a98eb30_0;
    %pushi/vec4 511, 0, 32;
    %load/vec4 v0x13a98f880_0;
    %pad/u 32;
    %muli 32, 0, 32;
    %sub;
    %pad/u 34;
    %subi 31, 0, 34;
    %part/s 32;
    %vpi_call 4 184 "$display", "w[%2d] = %h", v0x13a98f880_0, S<0,vec4,u32> {1 0 0};
    %load/vec4 v0x13a98f880_0;
    %addi 1, 0, 7;
    %assign/vec4 v0x13a98f880_0, 0;
    %jmp T_11.14;
T_11.13 ;
    %load/vec4 v0x13a98f880_0;
    %pad/u 32;
    %cmpi/u 64, 0, 32;
    %jmp/0xz  T_11.15, 5;
    %load/vec4 v0x13a98f880_0;
    %pad/u 32;
    %subi 2, 0, 32;
    %ix/vec4 4;
    %load/vec4a v0x13a98fc70, 4;
    %store/vec4 v0x13a98d670_0, 0, 32;
    %callf/vec4 TD_sha256_processor_tb.uut.sha256_core_inst.sig1, S_0x13a98d3b0;
    %load/vec4 v0x13a98f880_0;
    %pad/u 32;
    %subi 7, 0, 32;
    %ix/vec4 4;
    %load/vec4a v0x13a98fc70, 4;
    %add;
    %load/vec4 v0x13a98f880_0;
    %pad/u 32;
    %subi 15, 0, 32;
    %ix/vec4 4;
    %load/vec4a v0x13a98fc70, 4;
    %store/vec4 v0x13a98d300_0, 0, 32;
    %callf/vec4 TD_sha256_processor_tb.uut.sha256_core_inst.sig0, S_0x13a98d080;
    %add;
    %load/vec4 v0x13a98f880_0;
    %pad/u 32;
    %subi 16, 0, 32;
    %ix/vec4 4;
    %load/vec4a v0x13a98fc70, 4;
    %add;
    %load/vec4 v0x13a98f880_0;
    %pad/u 8;
    %ix/vec4 3;
    %ix/load 4, 0, 0; Constant delay
    %assign/vec4/a/d v0x13a98fc70, 0, 4;
    %load/vec4 v0x13a98f880_0;
    %pad/u 32;
    %subi 2, 0, 32;
    %ix/vec4 4;
    %load/vec4a v0x13a98fc70, 4;
    %store/vec4 v0x13a98d670_0, 0, 32;
    %callf/vec4 TD_sha256_processor_tb.uut.sha256_core_inst.sig1, S_0x13a98d3b0;
    %load/vec4 v0x13a98f880_0;
    %pad/u 32;
    %subi 7, 0, 32;
    %ix/vec4 4;
    %load/vec4a v0x13a98fc70, 4;
    %add;
    %load/vec4 v0x13a98f880_0;
    %pad/u 32;
    %subi 15, 0, 32;
    %ix/vec4 4;
    %load/vec4a v0x13a98fc70, 4;
    %store/vec4 v0x13a98d300_0, 0, 32;
    %callf/vec4 TD_sha256_processor_tb.uut.sha256_core_inst.sig0, S_0x13a98d080;
    %add;
    %load/vec4 v0x13a98f880_0;
    %pad/u 32;
    %subi 16, 0, 32;
    %ix/vec4 4;
    %load/vec4a v0x13a98fc70, 4;
    %add;
    %vpi_call 4 189 "$display", "w[%2d] = %h (extended)", v0x13a98f880_0, S<0,vec4,u32> {1 0 0};
    %load/vec4 v0x13a98f880_0;
    %addi 1, 0, 7;
    %assign/vec4 v0x13a98f880_0, 0;
    %jmp T_11.16;
T_11.15 ;
    %load/vec4 v0x13a98f0a0_0;
    %assign/vec4 v0x13a98e910_0, 0;
    %load/vec4 v0x13a98f150_0;
    %assign/vec4 v0x13a98eaa0_0, 0;
    %load/vec4 v0x13a98f200_0;
    %assign/vec4 v0x13a98ebe0_0, 0;
    %load/vec4 v0x13a98f2b0_0;
    %assign/vec4 v0x13a98ed30_0, 0;
    %load/vec4 v0x13a98f360_0;
    %assign/vec4 v0x13a98ede0_0, 0;
    %load/vec4 v0x13a98f410_0;
    %assign/vec4 v0x13a98ee90_0, 0;
    %load/vec4 v0x13a98f4c0_0;
    %assign/vec4 v0x13a98ef40_0, 0;
    %load/vec4 v0x13a98e9c0_0;
    %assign/vec4 v0x13a98eff0_0, 0;
    %vpi_call 4 203 "$display", "Working vars initialized to: a=%h b=%h c=%h d=%h e=%h f=%h g=%h h=%h", v0x13a98f0a0_0, v0x13a98f150_0, v0x13a98f200_0, v0x13a98f2b0_0, v0x13a98f360_0, v0x13a98f410_0, v0x13a98f4c0_0, v0x13a98e9c0_0 {0 0 0};
    %pushi/vec4 0, 0, 7;
    %assign/vec4 v0x13a98fbc0_0, 0;
    %pushi/vec4 2, 0, 2;
    %assign/vec4 v0x13a98fb10_0, 0;
T_11.16 ;
T_11.14 ;
    %jmp T_11.8;
T_11.6 ;
    %load/vec4 v0x13a98fbc0_0;
    %pad/u 32;
    %cmpi/u 64, 0, 32;
    %jmp/0xz  T_11.17, 5;
    %vpi_call 4 214 "$display", "COMP: Round t=%2d", v0x13a98fbc0_0 {0 0 0};
    %vpi_call 4 215 "$display", "Round %2d: a=%h b=%h c=%h d=%h e=%h f=%h g=%h h=%h", v0x13a98fbc0_0, v0x13a98e910_0, v0x13a98eaa0_0, v0x13a98ebe0_0, v0x13a98ed30_0, v0x13a98ede0_0, v0x13a98ee90_0, v0x13a98ef40_0, v0x13a98eff0_0 {0 0 0};
    %load/vec4 v0x13a98fbc0_0;
    %pad/u 8;
    %ix/vec4 4;
    %load/vec4a v0x13a98fc70, 4;
    %vpi_call 4 217 "$display", "T1=%h T2=%h w[t]=%h", v0x13a98de10_0, v0x13a98dec0_0, S<0,vec4,u32> {1 0 0};
    %load/vec4 v0x13a98ef40_0;
    %assign/vec4 v0x13a98eff0_0, 0;
    %load/vec4 v0x13a98ee90_0;
    %assign/vec4 v0x13a98ef40_0, 0;
    %load/vec4 v0x13a98ede0_0;
    %assign/vec4 v0x13a98ee90_0, 0;
    %load/vec4 v0x13a98ed30_0;
    %load/vec4 v0x13a98de10_0;
    %add;
    %assign/vec4 v0x13a98ede0_0, 0;
    %load/vec4 v0x13a98ebe0_0;
    %assign/vec4 v0x13a98ed30_0, 0;
    %load/vec4 v0x13a98eaa0_0;
    %assign/vec4 v0x13a98ebe0_0, 0;
    %load/vec4 v0x13a98e910_0;
    %assign/vec4 v0x13a98eaa0_0, 0;
    %load/vec4 v0x13a98de10_0;
    %load/vec4 v0x13a98dec0_0;
    %add;
    %assign/vec4 v0x13a98e910_0, 0;
    %load/vec4 v0x13a98fbc0_0;
    %addi 1, 0, 7;
    %assign/vec4 v0x13a98fbc0_0, 0;
    %jmp T_11.18;
T_11.17 ;
    %vpi_call 4 233 "$display", "COMP -> DONE: All 64 rounds completed" {0 0 0};
    %load/vec4 v0x13a98f0a0_0;
    %load/vec4 v0x13a98e910_0;
    %add;
    %assign/vec4 v0x13a98f0a0_0, 0;
    %load/vec4 v0x13a98f150_0;
    %load/vec4 v0x13a98eaa0_0;
    %add;
    %assign/vec4 v0x13a98f150_0, 0;
    %load/vec4 v0x13a98f200_0;
    %load/vec4 v0x13a98ebe0_0;
    %add;
    %assign/vec4 v0x13a98f200_0, 0;
    %load/vec4 v0x13a98f2b0_0;
    %load/vec4 v0x13a98ed30_0;
    %add;
    %assign/vec4 v0x13a98f2b0_0, 0;
    %load/vec4 v0x13a98f360_0;
    %load/vec4 v0x13a98ede0_0;
    %add;
    %assign/vec4 v0x13a98f360_0, 0;
    %load/vec4 v0x13a98f410_0;
    %load/vec4 v0x13a98ee90_0;
    %add;
    %assign/vec4 v0x13a98f410_0, 0;
    %load/vec4 v0x13a98f4c0_0;
    %load/vec4 v0x13a98ef40_0;
    %add;
    %assign/vec4 v0x13a98f4c0_0, 0;
    %load/vec4 v0x13a98e9c0_0;
    %load/vec4 v0x13a98eff0_0;
    %add;
    %assign/vec4 v0x13a98e9c0_0, 0;
    %vpi_call 4 245 "$display", "Final hash values: h0=%h+%h h1=%h+%h h2=%h+%h h3=%h+%h", v0x13a98f0a0_0, v0x13a98e910_0, v0x13a98f150_0, v0x13a98eaa0_0, v0x13a98f200_0, v0x13a98ebe0_0, v0x13a98f2b0_0, v0x13a98ed30_0 {0 0 0};
    %vpi_call 4 247 "$display", "                   h4=%h+%h h5=%h+%h h6=%h+%h h7=%h+%h", v0x13a98f360_0, v0x13a98ede0_0, v0x13a98f410_0, v0x13a98ee90_0, v0x13a98f4c0_0, v0x13a98ef40_0, v0x13a98e9c0_0, v0x13a98eff0_0 {0 0 0};
    %pushi/vec4 3, 0, 2;
    %assign/vec4 v0x13a98fb10_0, 0;
T_11.18 ;
    %jmp T_11.8;
T_11.7 ;
    %load/vec4 v0x13a98f0a0_0;
    %load/vec4 v0x13a98f150_0;
    %concat/vec4; draw_concat_vec4
    %load/vec4 v0x13a98f200_0;
    %concat/vec4; draw_concat_vec4
    %load/vec4 v0x13a98f2b0_0;
    %concat/vec4; draw_concat_vec4
    %load/vec4 v0x13a98f360_0;
    %concat/vec4; draw_concat_vec4
    %load/vec4 v0x13a98f410_0;
    %concat/vec4; draw_concat_vec4
    %load/vec4 v0x13a98f4c0_0;
    %concat/vec4; draw_concat_vec4
    %load/vec4 v0x13a98e9c0_0;
    %concat/vec4; draw_concat_vec4
    %assign/vec4 v0x13a98f750_0, 0;
    %vpi_call 4 259 "$display", "DONE: Final hash = %h%h%h%h%h%h%h%h", v0x13a98f0a0_0, v0x13a98f150_0, v0x13a98f200_0, v0x13a98f2b0_0, v0x13a98f360_0, v0x13a98f410_0, v0x13a98f4c0_0, v0x13a98e9c0_0 {0 0 0};
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0x13a98f930_0, 0;
    %load/vec4 v0x13a98fa70_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_11.19, 8;
    %pushi/vec4 0, 0, 2;
    %assign/vec4 v0x13a98fb10_0, 0;
T_11.19 ;
    %jmp T_11.8;
T_11.8 ;
    %pop/vec4 1;
T_11.1 ;
    %jmp T_11;
    .thread T_11;
    .scope S_0x13a98b200;
T_12 ;
    %wait E_0x13a98c2e0;
    %load/vec4 v0x13a9909a0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_12.0, 8;
    %pushi/vec4 0, 0, 3;
    %assign/vec4 v0x13a990b50_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0x13a98fe30_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0x13a990440_0, 0;
    %pushi/vec4 0, 0, 6;
    %assign/vec4 v0x13a990c70_0, 0;
    %pushi/vec4 0, 0, 512;
    %assign/vec4 v0x13a98fda0_0, 0;
    %pushi/vec4 0, 0, 64;
    %assign/vec4 v0x13a990be0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v0x13a990a30_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0x13a990160_0, 0;
    %pushi/vec4 0, 0, 512;
    %assign/vec4 v0x13a98ff50_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0x13a990770_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0x13a990630_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0x13a990590_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0x13a990810_0, 0;
    %pushi/vec4 0, 0, 256;
    %assign/vec4 v0x13a990210_0, 0;
    %pushi/vec4 0, 0, 256;
    %assign/vec4 v0x13a9904e0_0, 0;
    %jmp T_12.1;
T_12.0 ;
    %load/vec4 v0x13a990b50_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 3;
    %cmp/u;
    %jmp/1 T_12.2, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 3;
    %cmp/u;
    %jmp/1 T_12.3, 6;
    %dup/vec4;
    %pushi/vec4 2, 0, 3;
    %cmp/u;
    %jmp/1 T_12.4, 6;
    %dup/vec4;
    %pushi/vec4 3, 0, 3;
    %cmp/u;
    %jmp/1 T_12.5, 6;
    %dup/vec4;
    %pushi/vec4 5, 0, 3;
    %cmp/u;
    %jmp/1 T_12.6, 6;
    %pushi/vec4 0, 0, 3;
    %assign/vec4 v0x13a990b50_0, 0;
    %jmp T_12.8;
T_12.2 ;
    %load/vec4 v0x13a990ac0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_12.9, 8;
    %vpi_call 3 81 "$display", "SHA256 Processor: Starting" {0 0 0};
    %pushi/vec4 1, 0, 3;
    %assign/vec4 v0x13a990b50_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0x13a98fe30_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0x13a990440_0, 0;
    %pushi/vec4 0, 0, 6;
    %assign/vec4 v0x13a990c70_0, 0;
    %pushi/vec4 0, 0, 512;
    %assign/vec4 v0x13a98fda0_0, 0;
    %pushi/vec4 0, 0, 64;
    %assign/vec4 v0x13a990be0_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v0x13a990a30_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0x13a990770_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0x13a990630_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0x13a990590_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0x13a990810_0, 0;
T_12.9 ;
    %jmp T_12.8;
T_12.3 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0x13a990160_0, 0;
    %load/vec4 v0x13a9903b0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_12.11, 8;
    %load/vec4 v0x13a9902a0_0;
    %ix/load 5, 0, 0;
    %pushi/vec4 511, 0, 32;
    %load/vec4 v0x13a990c70_0;
    %pad/u 32;
    %muli 32, 0, 32;
    %sub;
    %pad/u 34;
    %subi 31, 0, 34;
    %ix/vec4/s 4;
    %assign/vec4/off/d v0x13a98fda0_0, 4, 5;
    %load/vec4 v0x13a990c70_0;
    %addi 1, 0, 6;
    %assign/vec4 v0x13a990c70_0, 0;
    %load/vec4 v0x13a990be0_0;
    %addi 32, 0, 64;
    %assign/vec4 v0x13a990be0_0, 0;
    %load/vec4 v0x13a990a30_0;
    %addi 4, 0, 32;
    %assign/vec4 v0x13a990a30_0, 0;
    %load/vec4 v0x13a9906d0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_12.13, 8;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0x13a990770_0, 0;
    %load/vec4 v0x13a990c70_0;
    %pad/u 32;
    %cmpi/u 15, 0, 32;
    %jmp/0xz  T_12.15, 5;
    %pushi/vec4 3, 0, 3;
    %assign/vec4 v0x13a990b50_0, 0;
    %jmp T_12.16;
T_12.15 ;
    %load/vec4 v0x13a990c70_0;
    %pad/u 32;
    %cmpi/e 15, 0, 32;
    %jmp/0xz  T_12.17, 4;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0x13a990810_0, 0;
    %pushi/vec4 2, 0, 3;
    %assign/vec4 v0x13a990b50_0, 0;
T_12.17 ;
T_12.16 ;
    %jmp T_12.14;
T_12.13 ;
    %load/vec4 v0x13a990c70_0;
    %pad/u 32;
    %cmpi/e 15, 0, 32;
    %jmp/0xz  T_12.19, 4;
    %pushi/vec4 2, 0, 3;
    %assign/vec4 v0x13a990b50_0, 0;
T_12.19 ;
T_12.14 ;
T_12.11 ;
    %jmp T_12.8;
T_12.4 ;
    %load/vec4 v0x13a990160_0;
    %nor/r;
    %flag_set/vec4 9;
    %flag_get/vec4 9;
    %jmp/0 T_12.23, 9;
    %load/vec4 v0x13a9900b0_0;
    %nor/r;
    %and;
T_12.23;
    %flag_set/vec4 8;
    %jmp/0xz  T_12.21, 8;
    %load/vec4 v0x13a98fda0_0;
    %assign/vec4 v0x13a98ff50_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0x13a990160_0, 0;
    %load/vec4 v0x13a990a30_0;
    %load/vec4 v0x13a990c70_0;
    %pad/u 32;
    %muli 4, 0, 32;
    %sub;
    %vpi_call 3 135 "$display", "SHA256 Processor: Processing block at %d bytes", S<0,vec4,u32> {1 0 0};
    %jmp T_12.22;
T_12.21 ;
    %load/vec4 v0x13a990160_0;
    %flag_set/vec4 9;
    %flag_get/vec4 9;
    %jmp/0 T_12.26, 9;
    %load/vec4 v0x13a9900b0_0;
    %nor/r;
    %and;
T_12.26;
    %flag_set/vec4 8;
    %jmp/0xz  T_12.24, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0x13a990160_0, 0;
    %jmp T_12.25;
T_12.24 ;
    %load/vec4 v0x13a9900b0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_12.27, 8;
    %load/vec4 v0x13a990630_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_12.29, 8;
    %load/vec4 v0x13a98ffe0_0;
    %assign/vec4 v0x13a9904e0_0, 0;
    %pushi/vec4 5, 0, 3;
    %assign/vec4 v0x13a990b50_0, 0;
    %jmp T_12.30;
T_12.29 ;
    %load/vec4 v0x13a990770_0;
    %flag_set/vec4 9;
    %flag_get/vec4 9;
    %jmp/0 T_12.33, 9;
    %load/vec4 v0x13a990810_0;
    %nor/r;
    %and;
T_12.33;
    %flag_set/vec4 8;
    %jmp/0xz  T_12.31, 8;
    %load/vec4 v0x13a98ffe0_0;
    %assign/vec4 v0x13a990210_0, 0;
    %pushi/vec4 0, 0, 512;
    %assign/vec4 v0x13a98fda0_0, 0;
    %pushi/vec4 0, 0, 6;
    %assign/vec4 v0x13a990c70_0, 0;
    %pushi/vec4 3, 0, 3;
    %assign/vec4 v0x13a990b50_0, 0;
    %jmp T_12.32;
T_12.31 ;
    %load/vec4 v0x13a990810_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_12.34, 8;
    %load/vec4 v0x13a98ffe0_0;
    %assign/vec4 v0x13a990210_0, 0;
    %pushi/vec4 0, 0, 512;
    %assign/vec4 v0x13a98fda0_0, 0;
    %pushi/vec4 0, 0, 6;
    %assign/vec4 v0x13a990c70_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0x13a990810_0, 0;
    %pushi/vec4 3, 0, 3;
    %assign/vec4 v0x13a990b50_0, 0;
    %jmp T_12.35;
T_12.34 ;
    %load/vec4 v0x13a990590_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_12.36, 8;
    %load/vec4 v0x13a98ffe0_0;
    %assign/vec4 v0x13a990210_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0x13a990590_0, 0;
    %jmp T_12.37;
T_12.36 ;
    %load/vec4 v0x13a98ffe0_0;
    %assign/vec4 v0x13a990210_0, 0;
T_12.37 ;
    %pushi/vec4 0, 0, 512;
    %assign/vec4 v0x13a98fda0_0, 0;
    %pushi/vec4 0, 0, 6;
    %assign/vec4 v0x13a990c70_0, 0;
    %pushi/vec4 1, 0, 3;
    %assign/vec4 v0x13a990b50_0, 0;
T_12.35 ;
T_12.32 ;
T_12.30 ;
T_12.27 ;
T_12.25 ;
T_12.22 ;
    %jmp T_12.8;
T_12.5 ;
    %load/vec4 v0x13a990c70_0;
    %pad/u 32;
    %cmpi/e 0, 0, 32;
    %jmp/0xz  T_12.38, 4;
    %load/vec4 v0x13a990810_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_12.40, 8;
    %pushi/vec4 1, 0, 1;
    %ix/load 4, 511, 0;
    %ix/load 5, 0, 0;
    %flag_set/imm 4, 0;
    %assign/vec4/off/d v0x13a98fda0_0, 4, 5;
    %jmp T_12.41;
T_12.40 ;
    %pushi/vec4 1, 0, 1;
    %ix/load 5, 0, 0;
    %pushi/vec4 511, 0, 64;
    %load/vec4 v0x13a990be0_0;
    %pushi/vec4 512, 0, 64;
    %mod;
    %sub;
    %ix/vec4 4;
    %assign/vec4/off/d v0x13a98fda0_0, 4, 5;
T_12.41 ;
    %load/vec4 v0x13a990be0_0;
    %ix/load 4, 0, 0;
    %ix/load 5, 0, 0;
    %flag_set/imm 4, 0;
    %assign/vec4/off/d v0x13a98fda0_0, 4, 5;
    %load/vec4 v0x13a990be0_0;
    %pushi/vec4 512, 0, 64;
    %mod;
    %cmpi/u 447, 0, 64;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %flag_get/vec4 5;
    %jmp/0 T_12.44, 5;
    %load/vec4 v0x13a990810_0;
    %nor/r;
    %and;
T_12.44;
    %flag_set/vec4 8;
    %jmp/0xz  T_12.42, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0x13a990630_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0x13a990810_0, 0;
    %jmp T_12.43;
T_12.42 ;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0x13a990630_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0x13a990810_0, 0;
T_12.43 ;
    %pushi/vec4 2, 0, 3;
    %assign/vec4 v0x13a990b50_0, 0;
T_12.38 ;
    %jmp T_12.8;
T_12.6 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v0x13a98fe30_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v0x13a990440_0, 0;
    %vpi_call 3 213 "$display", "SHA256 Processor: Processing complete. Total bytes: %d", v0x13a990a30_0 {0 0 0};
    %vpi_call 3 214 "$display", "Final hash: %h", v0x13a9904e0_0 {0 0 0};
    %load/vec4 v0x13a990ac0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_12.45, 8;
    %pushi/vec4 0, 0, 3;
    %assign/vec4 v0x13a990b50_0, 0;
T_12.45 ;
    %jmp T_12.8;
T_12.8 ;
    %pop/vec4 1;
T_12.1 ;
    %jmp T_12;
    .thread T_12;
    .scope S_0x13a937ff0;
T_13 ;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0x13a990ea0_0, 0, 1;
T_13.0 ;
    %delay 5000, 0;
    %load/vec4 v0x13a990ea0_0;
    %inv;
    %store/vec4 v0x13a990ea0_0, 0, 1;
    %jmp T_13.0;
    %end;
    .thread T_13;
    .scope S_0x13a937ff0;
T_14 ;
    %vpi_call 2 186 "$display", "Starting SHA-256 Processor Testbench..." {0 0 0};
    %pushi/vec4 1, 0, 1;
    %store/vec4 v0x13a991500_0, 0, 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0x13a991620_0, 0, 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0x13a991150_0, 0, 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0x13a991450_0, 0, 1;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0x13a990fc0_0, 0, 32;
    %delay 20000, 0;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0x13a991500_0, 0, 1;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0x13a98b150_0, 0, 32;
    %pushi/vec4 3128432319, 0, 32;
    %concati/vec4 2399260650, 0, 32;
    %concati/vec4 2189590972, 0, 33;
    %concati/vec4 3143386183, 0, 32;
    %concati/vec4 3222111886, 0, 33;
    %concati/vec4 2965099749, 0, 33;
    %concati/vec4 2693266191, 0, 32;
    %concati/vec4 301995437, 0, 29;
    %store/vec4 v0x13a98b090_0, 0, 256;
    %fork TD_sha256_processor_tb.run_test, S_0x13a98ae60;
    %join;
    %pushi/vec4 1, 0, 32;
    %store/vec4 v0x13a98b150_0, 0, 32;
    %pushi/vec4 3478853287, 0, 32;
    %concati/vec4 4049536768, 0, 33;
    %concati/vec4 3677972382, 0, 37;
    %concati/vec4 3240398274, 0, 32;
    %concati/vec4 3374761082, 0, 32;
    %concati/vec4 4034548143, 0, 34;
    %concati/vec4 2890204026, 0, 32;
    %concati/vec4 16706001, 0, 24;
    %store/vec4 v0x13a98b090_0, 0, 256;
    %fork TD_sha256_processor_tb.run_test, S_0x13a98ae60;
    %join;
    %pushi/vec4 2, 0, 32;
    %store/vec4 v0x13a98b150_0, 0, 32;
    %pushi/vec4 4035606731, 0, 32;
    %concati/vec4 3136161835, 0, 32;
    %concati/vec4 2774273553, 0, 37;
    %concati/vec4 3865002954, 0, 32;
    %concati/vec4 3317965226, 0, 35;
    %concati/vec4 3998698423, 0, 33;
    %concati/vec4 3491400617, 0, 33;
    %concati/vec4 2876226, 0, 22;
    %store/vec4 v0x13a98b090_0, 0, 256;
    %fork TD_sha256_processor_tb.run_test, S_0x13a98ae60;
    %join;
    %vpi_call 2 204 "$display", "All tests completed" {0 0 0};
    %vpi_call 2 205 "$finish" {0 0 0};
    %end;
    .thread T_14;
# The file index is used to find the file name in the following table.
:file_names 5;
    "N/A";
    "<interactive>";
    "sha256_processor_tb.v";
    "sha256_processor.v";
    "sha256_core.v";