diff --git a/cranelift/codegen/meta/src/gen_inst.rs b/cranelift/codegen/meta/src/gen_inst.rs index 1b4612f108d9..91cef15bcd61 100644 --- a/cranelift/codegen/meta/src/gen_inst.rs +++ b/cranelift/codegen/meta/src/gen_inst.rs @@ -557,6 +557,11 @@ fn gen_instruction_data_impl(formats: &[Rc], fmt: &mut Format OperandKindFields::VariableArgs => { fmtln!(fmt, "{member}: mapper.map_value_list({member}),"); } + OperandKindFields::ImmValue + if field.kind.rust_type == "ir::MemFlags" => + { + fmtln!(fmt, "{member}: mapper.map_mem_flags({member}),"); + } OperandKindFields::ImmValue | OperandKindFields::ImmEnum(_) | OperandKindFields::TypeVar(_) => fmtln!(fmt, "{member},"), @@ -1153,7 +1158,14 @@ fn gen_inst_builder(inst: &Instruction, format: &InstructionFormat, fmt: &mut Fo } else { let t = if op.is_immediate() { let t = format!("T{}", tmpl_types.len() + 1); - tmpl_types.push(format!("{}: Into<{}>", t, op.kind.rust_type)); + // For memflags, the public API type is MemFlagsData (the data), + // while InstructionData stores MemFlags (the entity index). + let api_type = if op.kind.rust_type == "ir::MemFlags" { + "ir::MemFlagsData" + } else { + op.kind.rust_type + }; + tmpl_types.push(format!("{t}: Into<{api_type}>")); into_args.push(op.name); t } else { @@ -1164,9 +1176,13 @@ fn gen_inst_builder(inst: &Instruction, format: &InstructionFormat, fmt: &mut Fo } } - // We need to mutate `self` if this instruction accepts a value list, or will construct - // BlockCall values. - if format.has_value_list || !block_args.is_empty() { + // We need to mutate `self` if this instruction accepts a value list, will construct + // BlockCall values, or has memflags operands (which need DFG insertion). + let has_memflags = inst + .operands_in + .iter() + .any(|op| op.kind.rust_type == "ir::MemFlags"); + if format.has_value_list || !block_args.is_empty() || has_memflags { args[0].push_str("mut self"); } else { args[0].push_str("self"); @@ -1221,6 +1237,17 @@ fn gen_inst_builder(inst: &Instruction, format: &InstructionFormat, fmt: &mut Fo fmtln!(fmt, "let {} = {}.into();", arg, arg); } + // Insert memflags data into the DFG to get entity indices. + for op in &inst.operands_in { + if op.kind.rust_type == "ir::MemFlags" && op.is_immediate() { + fmtln!( + fmt, + "let {0} = self.data_flow_graph_mut().mem_flags.insert({0}).unwrap();", + op.name + ); + } + } + // Convert block references for op in block_args { fmtln!( diff --git a/cranelift/codegen/meta/src/gen_isle.rs b/cranelift/codegen/meta/src/gen_isle.rs index e47a92ab4e23..715d19974e44 100644 --- a/cranelift/codegen/meta/src/gen_isle.rs +++ b/cranelift/codegen/meta/src/gen_isle.rs @@ -61,6 +61,10 @@ fn gen_common_isle( for ty in others.keys() { fmtln!(fmt, "(type {} (primitive {}))", ty, ty); } + // Also declare the MemFlagsData type, which is the resolved form of MemFlags. + // MemFlags is an entity index into the DFG's MemFlagsSet, while MemFlagsData + // contains the actual flag bits. Backend MachInst types use MemFlagsData. + fmt.line("(type MemFlagsData (primitive MemFlagsData))"); fmt.empty_line(); // Generate the `enum` immediates, expanding all of the available variants diff --git a/cranelift/codegen/meta/src/shared/immediates.rs b/cranelift/codegen/meta/src/shared/immediates.rs index 37c17603ecf4..e76b8040c1eb 100644 --- a/cranelift/codegen/meta/src/shared/immediates.rs +++ b/cranelift/codegen/meta/src/shared/immediates.rs @@ -161,7 +161,7 @@ impl Immediates { ) }, - memflags: new_imm("flags", "ir::MemFlagsData", "Memory operation flags"), + memflags: new_imm("flags", "ir::MemFlags", "Memory operation flags"), trapcode: { let mut trapcode_values = HashMap::new(); diff --git a/cranelift/codegen/meta/src/shared/instructions.rs b/cranelift/codegen/meta/src/shared/instructions.rs index ce5967342041..29c56266105a 100644 --- a/cranelift/codegen/meta/src/shared/instructions.rs +++ b/cranelift/codegen/meta/src/shared/instructions.rs @@ -772,7 +772,7 @@ pub(crate) fn define( &formats.load, ) .operands_in(vec![ - Operand::new("MemFlagsData", &imm.memflags), + Operand::new("MemFlags", &imm.memflags), Operand::new("p", iAddr), Operand::new("Offset", &imm.offset32).with_doc("Byte offset from base address"), ]) @@ -792,7 +792,7 @@ pub(crate) fn define( &formats.store, ) .operands_in(vec![ - Operand::new("MemFlagsData", &imm.memflags), + Operand::new("MemFlags", &imm.memflags), Operand::new("x", Mem).with_doc("Value to be stored"), Operand::new("p", iAddr), Operand::new("Offset", &imm.offset32).with_doc("Byte offset from base address"), @@ -817,7 +817,7 @@ pub(crate) fn define( &formats.load, ) .operands_in(vec![ - Operand::new("MemFlagsData", &imm.memflags), + Operand::new("MemFlags", &imm.memflags), Operand::new("p", iAddr), Operand::new("Offset", &imm.offset32).with_doc("Byte offset from base address"), ]) @@ -836,7 +836,7 @@ pub(crate) fn define( &formats.load, ) .operands_in(vec![ - Operand::new("MemFlagsData", &imm.memflags), + Operand::new("MemFlags", &imm.memflags), Operand::new("p", iAddr), Operand::new("Offset", &imm.offset32).with_doc("Byte offset from base address"), ]) @@ -855,7 +855,7 @@ pub(crate) fn define( &formats.store, ) .operands_in(vec![ - Operand::new("MemFlagsData", &imm.memflags), + Operand::new("MemFlags", &imm.memflags), Operand::new("x", iExt8), Operand::new("p", iAddr), Operand::new("Offset", &imm.offset32).with_doc("Byte offset from base address"), @@ -880,7 +880,7 @@ pub(crate) fn define( &formats.load, ) .operands_in(vec![ - Operand::new("MemFlagsData", &imm.memflags), + Operand::new("MemFlags", &imm.memflags), Operand::new("p", iAddr), Operand::new("Offset", &imm.offset32).with_doc("Byte offset from base address"), ]) @@ -899,7 +899,7 @@ pub(crate) fn define( &formats.load, ) .operands_in(vec![ - Operand::new("MemFlagsData", &imm.memflags), + Operand::new("MemFlags", &imm.memflags), Operand::new("p", iAddr), Operand::new("Offset", &imm.offset32).with_doc("Byte offset from base address"), ]) @@ -918,7 +918,7 @@ pub(crate) fn define( &formats.store, ) .operands_in(vec![ - Operand::new("MemFlagsData", &imm.memflags), + Operand::new("MemFlags", &imm.memflags), Operand::new("x", iExt16), Operand::new("p", iAddr), Operand::new("Offset", &imm.offset32).with_doc("Byte offset from base address"), @@ -943,7 +943,7 @@ pub(crate) fn define( &formats.load, ) .operands_in(vec![ - Operand::new("MemFlagsData", &imm.memflags), + Operand::new("MemFlags", &imm.memflags), Operand::new("p", iAddr), Operand::new("Offset", &imm.offset32).with_doc("Byte offset from base address"), ]) @@ -962,7 +962,7 @@ pub(crate) fn define( &formats.load, ) .operands_in(vec![ - Operand::new("MemFlagsData", &imm.memflags), + Operand::new("MemFlags", &imm.memflags), Operand::new("p", iAddr), Operand::new("Offset", &imm.offset32).with_doc("Byte offset from base address"), ]) @@ -981,7 +981,7 @@ pub(crate) fn define( &formats.store, ) .operands_in(vec![ - Operand::new("MemFlagsData", &imm.memflags), + Operand::new("MemFlags", &imm.memflags), Operand::new("x", iExt32), Operand::new("p", iAddr), Operand::new("Offset", &imm.offset32).with_doc("Byte offset from base address"), @@ -1069,7 +1069,7 @@ pub(crate) fn define( &formats.load, ) .operands_in(vec![ - Operand::new("MemFlagsData", &imm.memflags), + Operand::new("MemFlags", &imm.memflags), Operand::new("p", iAddr), Operand::new("Offset", &imm.offset32).with_doc("Byte offset from base address"), ]) @@ -1087,7 +1087,7 @@ pub(crate) fn define( &formats.load, ) .operands_in(vec![ - Operand::new("MemFlagsData", &imm.memflags), + Operand::new("MemFlags", &imm.memflags), Operand::new("p", iAddr), Operand::new("Offset", &imm.offset32).with_doc("Byte offset from base address"), ]) @@ -1115,7 +1115,7 @@ pub(crate) fn define( &formats.load, ) .operands_in(vec![ - Operand::new("MemFlagsData", &imm.memflags), + Operand::new("MemFlags", &imm.memflags), Operand::new("p", iAddr), Operand::new("Offset", &imm.offset32).with_doc("Byte offset from base address"), ]) @@ -1133,7 +1133,7 @@ pub(crate) fn define( &formats.load, ) .operands_in(vec![ - Operand::new("MemFlagsData", &imm.memflags), + Operand::new("MemFlags", &imm.memflags), Operand::new("p", iAddr), Operand::new("Offset", &imm.offset32).with_doc("Byte offset from base address"), ]) @@ -1161,7 +1161,7 @@ pub(crate) fn define( &formats.load, ) .operands_in(vec![ - Operand::new("MemFlagsData", &imm.memflags), + Operand::new("MemFlags", &imm.memflags), Operand::new("p", iAddr), Operand::new("Offset", &imm.offset32).with_doc("Byte offset from base address"), ]) @@ -1179,7 +1179,7 @@ pub(crate) fn define( &formats.load, ) .operands_in(vec![ - Operand::new("MemFlagsData", &imm.memflags), + Operand::new("MemFlags", &imm.memflags), Operand::new("p", iAddr), Operand::new("Offset", &imm.offset32).with_doc("Byte offset from base address"), ]) @@ -3132,9 +3132,9 @@ pub(crate) fn define( The input and output types must be storable to memory and of the same size. A bitcast is equivalent to storing one type and loading the other - type from the same address, both using the specified MemFlagsData. + type from the same address, both using the specified MemFlags. - Note that this operation only supports the `big` or `little` MemFlagsData. + Note that this operation only supports the `big` or `little` MemFlags. The specified byte order only affects the result in the case where input and output types differ in lane count/size. In this case, the operation is only valid if a byte order specifier is provided. @@ -3142,7 +3142,7 @@ pub(crate) fn define( &formats.load_no_offset, ) .operands_in(vec![ - Operand::new("MemFlagsData", &imm.memflags), + Operand::new("MemFlags", &imm.memflags), Operand::new("x", Mem), ]) .operands_out(vec![ @@ -3773,7 +3773,7 @@ pub(crate) fn define( &formats.atomic_rmw, ) .operands_in(vec![ - Operand::new("MemFlagsData", &imm.memflags), + Operand::new("MemFlags", &imm.memflags), Operand::new("AtomicRmwOp", &imm.atomic_rmw_op), Operand::new("p", iAddr), Operand::new("x", AtomicMem).with_doc("Value to be atomically stored"), @@ -3802,7 +3802,7 @@ pub(crate) fn define( &formats.atomic_cas, ) .operands_in(vec![ - Operand::new("MemFlagsData", &imm.memflags), + Operand::new("MemFlags", &imm.memflags), Operand::new("p", iAddr), Operand::new("e", AtomicMem).with_doc("Expected value in CAS"), Operand::new("x", AtomicMem).with_doc("Value to be atomically stored"), @@ -3830,7 +3830,7 @@ pub(crate) fn define( &formats.load_no_offset, ) .operands_in(vec![ - Operand::new("MemFlagsData", &imm.memflags), + Operand::new("MemFlags", &imm.memflags), Operand::new("p", iAddr), ]) .operands_out(vec![ @@ -3855,7 +3855,7 @@ pub(crate) fn define( &formats.store_no_offset, ) .operands_in(vec![ - Operand::new("MemFlagsData", &imm.memflags), + Operand::new("MemFlags", &imm.memflags), Operand::new("x", AtomicMem).with_doc("Value to be atomically stored"), Operand::new("p", iAddr), ]) diff --git a/cranelift/codegen/src/alias_analysis.rs b/cranelift/codegen/src/alias_analysis.rs index 5334803ba76c..dbfd958361bd 100644 --- a/cranelift/codegen/src/alias_analysis.rs +++ b/cranelift/codegen/src/alias_analysis.rs @@ -71,38 +71,41 @@ use crate::{ ir::{AliasRegion, Block, Function, Inst, Opcode, Type, Value, immediates::Offset32}, trace, }; -use cranelift_entity::{EntityRef, packed_option::PackedOption}; +use cranelift_entity::{EntityRef, SecondaryMap, packed_option::PackedOption}; /// For a given program point, the vector of last-store instruction /// indices for each disjoint category of abstract state. -#[derive(Clone, Copy, Debug, Default, PartialEq, Eq)] +#[derive(Clone, Debug, Default, PartialEq, Eq)] pub struct LastStores { - heap: PackedOption, - table: PackedOption, - vmctx: PackedOption, + /// Last store for each named alias region. + regions: SecondaryMap>, + /// Last store for memory accesses with no alias region. other: PackedOption, + /// Last instruction with fence semantics. This applies to ALL regions, + /// including ones not yet in the `regions` map. + last_fence: PackedOption, } impl LastStores { fn update(&mut self, func: &Function, inst: Inst) { let opcode = func.dfg.insts[inst].opcode(); if has_memory_fence_semantics(opcode) { - self.heap = inst.into(); - self.table = inst.into(); - self.vmctx = inst.into(); + self.regions.clear(); + self.last_fence = inst.into(); self.other = inst.into(); } else if opcode.can_store() { if let Some(memflags) = func.dfg.insts[inst].memflags() { - match memflags.alias_region() { - None => self.other = inst.into(), - Some(AliasRegion::Heap) => self.heap = inst.into(), - Some(AliasRegion::Table) => self.table = inst.into(), - Some(AliasRegion::Vmctx) => self.vmctx = inst.into(), + match func.dfg.mem_flags[memflags].alias_region() { + Some(region) => self.regions[region] = inst.into(), + None => { + self.regions.clear(); + self.other = inst.into(); + } } } else { - self.heap = inst.into(); - self.table = inst.into(); - self.vmctx = inst.into(); + // Store with no memflags: must clobber everything. + self.regions.clear(); + self.last_fence = inst.into(); self.other = inst.into(); } } @@ -110,11 +113,18 @@ impl LastStores { fn get_last_store(&self, func: &Function, inst: Inst) -> PackedOption { if let Some(memflags) = func.dfg.insts[inst].memflags() { - match memflags.alias_region() { + match func.dfg.mem_flags[memflags].alias_region() { None => self.other, - Some(AliasRegion::Heap) => self.heap, - Some(AliasRegion::Table) => self.table, - Some(AliasRegion::Vmctx) => self.vmctx, + Some(region) => { + let region_store = self.regions[region]; + // If the region has never been explicitly stored to, + // fall back to the last fence (which affects all regions). + if region_store.is_none() { + self.last_fence + } else { + region_store + } + } } } else if func.dfg.insts[inst].opcode().can_load() || func.dfg.insts[inst].opcode().can_store() @@ -136,10 +146,14 @@ impl LastStores { } }; - self.heap = meet(self.heap, other.heap); - self.table = meet(self.table, other.table); - self.vmctx = meet(self.vmctx, other.vmctx); + // Meet all region slots. + let max_len = core::cmp::max(self.regions.keys().len(), other.regions.keys().len()); + for i in 0..max_len { + let ar = AliasRegion::new(i); + self.regions[ar] = meet(self.regions[ar], other.regions[ar]); + } self.other = meet(self.other, other.other); + self.last_fence = meet(self.last_fence, other.last_fence); } } @@ -222,10 +236,11 @@ impl<'a> AliasAnalysis<'a> { while let Some(block) = queue.pop() { queue_set.remove(&block); - let mut state = *self + let mut state = self .block_input .entry(block) - .or_insert_with(|| LastStores::default()); + .or_insert_with(|| LastStores::default()) + .clone(); trace!( "alias analysis: input to block{} is {:?}", @@ -242,12 +257,12 @@ impl<'a> AliasAnalysis<'a> { let succ_first_inst = func.layout.block_insts(succ).next().unwrap(); let updated = match self.block_input.get_mut(&succ) { Some(succ_state) => { - let old = *succ_state; + let old = succ_state.clone(); succ_state.meet_from(&state, succ_first_inst); *succ_state != old } None => { - self.block_input.insert(succ, state); + self.block_input.insert(succ, state.clone()); true } }; diff --git a/cranelift/codegen/src/inline.rs b/cranelift/codegen/src/inline.rs index da2a6e220844..9ab4f444d17f 100644 --- a/cranelift/codegen/src/inline.rs +++ b/cranelift/codegen/src/inline.rs @@ -174,7 +174,7 @@ pub(crate) fn do_inlining( opcode, &callee, None, - ); + )?; inlined_any = true; if visit_callee { cursor.set_position(prev_pos); @@ -216,7 +216,7 @@ pub(crate) fn do_inlining( opcode, &callee, Some(exception), - ); + )?; inlined_any = true; if visit_callee { cursor.set_position(prev_pos); @@ -346,7 +346,7 @@ fn inline_one( call_opcode: ir::Opcode, callee: &ir::Function, call_exception_table: Option, -) -> ir::Block { +) -> CodegenResult { trace!( "Inlining call {call_inst:?}: {}\n\ with callee = {callee:?}", @@ -362,7 +362,7 @@ fn inline_one( // First, append various callee entity arenas to the end of the caller's // entity arenas. - let entity_map = create_entities(allocs, func, callee); + let entity_map = create_entities(allocs, func, callee)?; // Inlined prologue: split the call instruction's block at the point of the // call and replace the call with a jump. @@ -409,12 +409,17 @@ fn inline_one( // Remap the callee instruction's entities and insert it into the // caller's DFG. - let inlined_inst_data = callee.dfg.insts[callee_inst].map(InliningInstRemapper { + let mut inst_remapper = InliningInstRemapper { allocs: &allocs, func, callee, entity_map: &entity_map, - }); + error: None, + }; + let inlined_inst_data = callee.dfg.insts[callee_inst].map(&mut inst_remapper); + if let Some(err) = inst_remapper.error.take() { + return Err(err); + } let inlined_inst = func.dfg.make_inst(inlined_inst_data); func.layout.append_inst(inlined_inst, inlined_block); @@ -571,7 +576,7 @@ fn inline_one( func.layout.is_block_inserted(last_inlined_block), "last_inlined_block={last_inlined_block} should be inserted in the layout" ); - last_inlined_block + Ok(last_inlined_block) } /// Append stack map entries from the caller and callee to the given inlined @@ -906,6 +911,7 @@ struct InliningInstRemapper<'a> { func: &'a mut ir::Function, callee: &'a ir::Function, entity_map: &'a EntityMap, + error: Option, } impl<'a> ir::instructions::InstructionMapper for InliningInstRemapper<'a> { @@ -1019,6 +1025,26 @@ impl<'a> ir::instructions::InstructionMapper for InliningInstRemapper<'a> { fn map_immediate(&mut self, immediate: ir::Immediate) -> ir::Immediate { self.entity_map.inlined_immediate(immediate) } + fn map_mem_flags(&mut self, flags: ir::MemFlags) -> ir::MemFlags { + let mut flags_data = self.callee.dfg.mem_flags[flags]; + // Remap the alias region entity from callee to caller. + if let Some(callee_region) = flags_data.alias_region() { + let region_data = self.callee.dfg.alias_regions[callee_region].clone(); + let caller_region = self.func.dfg.alias_regions.insert(region_data); + flags_data.set_alias_region(Some(caller_region)); + } + match self.func.dfg.mem_flags.insert(flags_data) { + Ok(flags) => flags, + Err(_) => { + self.error = Some(crate::result::CodegenError::ImplLimitExceeded); + self.func + .dfg + .mem_flags + .insert(ir::MemFlagsData::trusted()) + .unwrap() + } + } + } } /// Inline the callee's layout into the caller's layout. @@ -1342,11 +1368,11 @@ fn create_entities( allocs: &mut InliningAllocs, func: &mut ir::Function, callee: &ir::Function, -) -> EntityMap { +) -> CodegenResult { let mut entity_map = EntityMap::default(); entity_map.block_offset = Some(create_blocks(allocs, func, callee)); - entity_map.global_value_offset = Some(create_global_values(func, callee)); + entity_map.global_value_offset = Some(create_global_values(func, callee)?); entity_map.sig_ref_offset = Some(create_sig_refs(func, callee)); create_user_external_name_refs(allocs, func, callee); entity_map.func_ref_offset = Some(create_func_refs(allocs, func, callee, &entity_map)); @@ -1361,7 +1387,7 @@ fn create_entities( // now, at the same time as the rest of our entities. create_constants(allocs, func, callee); - entity_map + Ok(entity_map) } /// Create inlined blocks in the caller for every block in the callee. @@ -1399,12 +1425,32 @@ fn create_blocks( } /// Copy and translate global values from the callee into the caller. -fn create_global_values(func: &mut ir::Function, callee: &ir::Function) -> u32 { +fn create_global_values(func: &mut ir::Function, callee: &ir::Function) -> CodegenResult { let gv_offset = func.global_values.len(); let gv_offset = u32::try_from(gv_offset).unwrap(); func.global_values.reserve(callee.global_values.len()); for gv in callee.global_values.values() { + // Re-insert callee mem flags into the caller's DFG before constructing + // the global value data, to avoid borrow conflicts. + let remapped_flags = match gv { + ir::GlobalValueData::Load { flags, .. } => { + let mut flags_data = callee.dfg.mem_flags[*flags]; + // Remap alias region entity from callee to caller. + if let Some(callee_region) = flags_data.alias_region() { + let region_data = callee.dfg.alias_regions[callee_region].clone(); + let caller_region = func.dfg.alias_regions.insert(region_data); + flags_data.set_alias_region(Some(caller_region)); + } + Some( + func.dfg + .mem_flags + .insert(flags_data) + .map_err(|_| crate::result::CodegenError::ImplLimitExceeded)?, + ) + } + _ => None, + }; func.global_values.push(match gv { // These kinds of global values reference other global values, so we // need to fixup that reference. @@ -1412,12 +1458,12 @@ fn create_global_values(func: &mut ir::Function, callee: &ir::Function) -> u32 { base, offset, global_type, - flags, + flags: _, } => ir::GlobalValueData::Load { base: ir::GlobalValue::from_u32(base.as_u32() + gv_offset), offset: *offset, global_type: *global_type, - flags: *flags, + flags: remapped_flags.unwrap(), }, ir::GlobalValueData::IAddImm { base, @@ -1437,7 +1483,7 @@ fn create_global_values(func: &mut ir::Function, callee: &ir::Function) -> u32 { }); } - gv_offset + Ok(gv_offset) } /// Copy `ir::SigRef`s from the callee into the caller. diff --git a/cranelift/codegen/src/inst_predicates.rs b/cranelift/codegen/src/inst_predicates.rs index 7b42e1728663..a35a550d659c 100644 --- a/cranelift/codegen/src/inst_predicates.rs +++ b/cranelift/codegen/src/inst_predicates.rs @@ -1,6 +1,6 @@ //! Instruction predicates/properties, shared by various analyses. use crate::ir::immediates::Offset32; -use crate::ir::{self, Block, Function, Inst, InstructionData, Opcode, Type, Value}; +use crate::ir::{self, Block, DataFlowGraph, Function, Inst, InstructionData, Opcode, Type, Value}; /// Test whether the given opcode is unsafe to even consider as side-effect-free. #[inline(always)] @@ -18,13 +18,17 @@ fn trivially_has_side_effects(opcode: Opcode) -> bool { /// operating on inaccessible memory, so we can't treat them as side-effect-free even if the loaded /// value is unused. #[inline(always)] -fn is_load_with_defined_trapping(opcode: Opcode, data: &InstructionData) -> bool { +fn is_load_with_defined_trapping( + opcode: Opcode, + data: &InstructionData, + dfg: &DataFlowGraph, +) -> bool { if !opcode.can_load() { return false; } match *data { InstructionData::StackLoad { .. } => false, - InstructionData::Load { flags, .. } => !flags.notrap(), + InstructionData::Load { flags, .. } => !dfg.mem_flags[flags].notrap(), _ => true, } } @@ -35,7 +39,7 @@ fn is_load_with_defined_trapping(opcode: Opcode, data: &InstructionData) -> bool fn has_side_effect(func: &Function, inst: Inst) -> bool { let data = &func.dfg.insts[inst]; let opcode = data.opcode(); - trivially_has_side_effects(opcode) || is_load_with_defined_trapping(opcode, data) + trivially_has_side_effects(opcode) || is_load_with_defined_trapping(opcode, data, &func.dfg) } /// Does the given instruction behave as a "pure" node with respect to @@ -49,7 +53,10 @@ pub fn is_pure_for_egraph(func: &Function, inst: Inst) -> bool { opcode: Opcode::Load, flags, .. - } => flags.readonly() && flags.notrap() && flags.can_move(), + } => { + let flags = func.dfg.mem_flags[flags]; + flags.readonly() && flags.notrap() && flags.can_move() + } _ => false, }; diff --git a/cranelift/codegen/src/ir/dfg.rs b/cranelift/codegen/src/ir/dfg.rs index ea7c48ae4177..45d810340ffe 100644 --- a/cranelift/codegen/src/ir/dfg.rs +++ b/cranelift/codegen/src/ir/dfg.rs @@ -7,9 +7,9 @@ use crate::ir::dynamic_type::{DynamicTypeData, DynamicTypes}; use crate::ir::instructions::{CallInfo, InstructionData}; use crate::ir::user_stack_maps::{UserStackMapEntry, UserStackMapEntryVec}; use crate::ir::{ - Block, BlockArg, BlockCall, ConstantData, ConstantPool, DynamicType, ExceptionTables, - ExtFuncData, FuncRef, Immediate, Inst, JumpTables, RelSourceLoc, SigRef, Signature, Type, - Value, ValueLabelAssignments, ValueList, ValueListPool, types, + AliasRegionSet, Block, BlockArg, BlockCall, ConstantData, ConstantPool, DynamicType, + ExceptionTables, ExtFuncData, FuncRef, Immediate, Inst, JumpTables, MemFlagsSet, RelSourceLoc, + SigRef, Signature, Type, Value, ValueLabelAssignments, ValueList, ValueListPool, types, }; use crate::packed_option::ReservedValue; use crate::write::write_operands; @@ -164,6 +164,12 @@ pub struct DataFlowGraph { /// Exception tables used in this function. pub exception_tables: ExceptionTables, + + /// Memory operation flags used in this function. + pub mem_flags: MemFlagsSet, + + /// Alias regions used in this function. + pub alias_regions: AliasRegionSet, } impl DataFlowGraph { @@ -184,6 +190,8 @@ impl DataFlowGraph { immediates: PrimaryMap::new(), jump_tables: JumpTables::new(), exception_tables: ExceptionTables::new(), + mem_flags: MemFlagsSet::new(), + alias_regions: AliasRegionSet::new(), } } @@ -202,6 +210,8 @@ impl DataFlowGraph { self.constants.clear(); self.immediates.clear(); self.jump_tables.clear(); + self.mem_flags.clear(); + self.alias_regions.clear(); } /// Get the total number of instructions created in this function, whether they are currently diff --git a/cranelift/codegen/src/ir/entities.rs b/cranelift/codegen/src/ir/entities.rs index b4bbd68bb619..2eb0e9b52a8b 100644 --- a/cranelift/codegen/src/ir/entities.rs +++ b/cranelift/codegen/src/ir/entities.rs @@ -20,6 +20,7 @@ //! format. use crate::entity::entity_impl; +use crate::ir::AliasRegion; use core::fmt; use core::u32; #[cfg(feature = "enable-serde")] @@ -391,6 +392,8 @@ pub enum AnyEntity { SigRef(SigRef), /// An exception table. ExceptionTable(ExceptionTable), + /// An alias region. + AliasRegion(AliasRegion), /// A function's stack limit StackLimit, } @@ -411,6 +414,7 @@ impl fmt::Display for AnyEntity { Self::FuncRef(r) => r.fmt(f), Self::SigRef(r) => r.fmt(f), Self::ExceptionTable(r) => r.fmt(f), + Self::AliasRegion(r) => r.fmt(f), Self::StackLimit => write!(f, "stack_limit"), } } @@ -494,6 +498,12 @@ impl From for AnyEntity { } } +impl From for AnyEntity { + fn from(r: AliasRegion) -> Self { + Self::AliasRegion(r) + } +} + #[cfg(test)] mod tests { use super::*; diff --git a/cranelift/codegen/src/ir/globalvalue.rs b/cranelift/codegen/src/ir/globalvalue.rs index 60c909cab9a9..b59751efec8c 100644 --- a/cranelift/codegen/src/ir/globalvalue.rs +++ b/cranelift/codegen/src/ir/globalvalue.rs @@ -1,7 +1,7 @@ //! Global values. use crate::ir::immediates::{Imm64, Offset32}; -use crate::ir::{ExternalName, GlobalValue, MemFlagsData, Type}; +use crate::ir::{ExternalName, GlobalValue, MemFlags, MemFlagsSet, Type}; use crate::isa::TargetIsa; use core::fmt; @@ -32,7 +32,7 @@ pub enum GlobalValueData { global_type: Type, /// Specifies the memory flags to be used by the load. Guaranteed to be notrap and aligned. - flags: MemFlagsData, + flags: MemFlags, }, /// Value is an offset from another global value. @@ -102,6 +102,69 @@ impl GlobalValueData { } } +impl GlobalValueData { + /// Return a display wrapper that can resolve `MemFlags` entities. + pub fn display<'a>(&'a self, mem_flags: &'a MemFlagsSet) -> DisplayGlobalValueData<'a> { + DisplayGlobalValueData { + data: self, + mem_flags, + } + } +} + +/// Wrapper for displaying a `GlobalValueData` with resolved `MemFlags`. +pub struct DisplayGlobalValueData<'a> { + data: &'a GlobalValueData, + mem_flags: &'a MemFlagsSet, +} + +impl fmt::Display for DisplayGlobalValueData<'_> { + fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result { + match *self.data { + GlobalValueData::VMContext => write!(f, "vmctx"), + GlobalValueData::Load { + base, + offset, + global_type, + flags, + } => { + let flags_data = self.mem_flags[flags]; + write!(f, "load.{global_type}{flags_data} {base}{offset}") + } + GlobalValueData::IAddImm { + global_type, + base, + offset, + } => write!(f, "iadd_imm.{global_type} {base}, {offset}"), + GlobalValueData::Symbol { + ref name, + offset, + colocated, + tls, + } => { + write!( + f, + "symbol {}{}{}", + if colocated { "colocated " } else { "" }, + if tls { "tls " } else { "" }, + name.display(None) + )?; + let offset_val: i64 = offset.into(); + if offset_val > 0 { + write!(f, "+")?; + } + if offset_val != 0 { + write!(f, "{offset}")?; + } + Ok(()) + } + GlobalValueData::DynScaleTargetConst { vector_type } => { + write!(f, "dyn_scale_target_const.{vector_type}") + } + } + } +} + impl fmt::Display for GlobalValueData { fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result { match *self { @@ -111,7 +174,7 @@ impl fmt::Display for GlobalValueData { offset, global_type, flags, - } => write!(f, "load.{global_type}{flags} {base}{offset}"), + } => write!(f, "load.{global_type} {flags} {base}{offset}"), Self::IAddImm { global_type, base, diff --git a/cranelift/codegen/src/ir/instructions.rs b/cranelift/codegen/src/ir/instructions.rs index 3f043da7d2dc..3948cd854132 100644 --- a/cranelift/codegen/src/ir/instructions.rs +++ b/cranelift/codegen/src/ir/instructions.rs @@ -18,7 +18,7 @@ use serde_derive::{Deserialize, Serialize}; use crate::bitset::ScalarBitSet; use crate::entity; use crate::ir::{ - self, Block, ExceptionTable, ExceptionTables, FuncRef, MemFlagsData, SigRef, StackSlot, Type, + self, Block, ExceptionTable, ExceptionTables, FuncRef, MemFlags, SigRef, StackSlot, Type, Value, condcodes::{FloatCC, IntCC}, trapcode::TrapCode, @@ -557,7 +557,7 @@ impl InstructionData { } /// If this is a load/store instruction, return its memory flags. - pub fn memflags(&self) -> Option { + pub fn memflags(&self) -> Option { match self { &InstructionData::Load { flags, .. } | &InstructionData::LoadNoOffset { flags, .. } @@ -569,6 +569,12 @@ impl InstructionData { } } + /// If this is a load/store instruction, resolve its memory flags to data + /// through the DFG. + pub fn memflags_data(&self, dfg: &super::dfg::DataFlowGraph) -> Option { + self.memflags().map(|f| dfg.mem_flags[f]) + } + /// If this instruction references a stack slot, return it pub fn stack_slot(&self) -> Option { match self { @@ -1084,6 +1090,15 @@ pub trait InstructionMapper { /// Map a function over an `Immediate`. fn map_immediate(&mut self, immediate: ir::Immediate) -> ir::Immediate; + + /// Map a function over a `MemFlags` entity. + /// + /// The default implementation returns the flags unchanged, which is correct + /// for mappers within a single function. Override this when mapping between + /// functions (e.g. inlining) to re-insert the flags data into the target DFG. + fn map_mem_flags(&mut self, flags: ir::MemFlags) -> ir::MemFlags { + flags + } } impl<'a, T> InstructionMapper for &'a mut T @@ -1144,6 +1159,10 @@ where fn map_immediate(&mut self, immediate: ir::Immediate) -> ir::Immediate { (**self).map_immediate(immediate) } + + fn map_mem_flags(&mut self, flags: ir::MemFlags) -> ir::MemFlags { + (**self).map_mem_flags(flags) + } } #[cfg(test)] diff --git a/cranelift/codegen/src/ir/memflags.rs b/cranelift/codegen/src/ir/memflags.rs index 3c3f61e7675d..61fdc8319543 100644 --- a/cranelift/codegen/src/ir/memflags.rs +++ b/cranelift/codegen/src/ir/memflags.rs @@ -1,9 +1,15 @@ //! Memory operation flags. use super::TrapCode; +use crate::HashMap; +use crate::entity::{self, PrimaryMap}; +pub use crate::machinst::MachMemFlags; +use alloc::borrow::Cow; use core::fmt; -use core::num::NonZeroU8; +use core::hash::{Hash, Hasher}; +use core::ops::Index; use core::str::FromStr; +use cranelift_entity::{entity_impl, packed_option::PackedOption}; #[cfg(feature = "enable-serde")] use serde_derive::{Deserialize, Serialize}; @@ -17,35 +23,121 @@ pub enum Endianness { Big, } -/// Which disjoint region of aliasing memory is accessed in this memory -/// operation. -#[derive(Clone, Copy, PartialEq, Eq, Debug, Hash)] -#[repr(u8)] -#[expect(missing_docs, reason = "self-describing variants")] -#[rustfmt::skip] -pub enum AliasRegion { - // None = 0b00; - Heap = 0b01, - Table = 0b10, - Vmctx = 0b11, +/// An opaque reference to an alias region. +/// +/// Alias regions identify disjoint categories of memory for alias analysis. +/// Two memory operations in different alias regions are known not to alias. +#[derive(Clone, Copy, PartialEq, Eq, Hash, PartialOrd, Ord)] +#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))] +pub struct AliasRegion(u32); +entity_impl!(AliasRegion, "region"); + +/// Data describing an alias region. +#[derive(Clone, Debug, PartialEq, Eq, Hash)] +#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))] +pub struct AliasRegionData { + /// A unique, user-defined identifier for this alias region. + /// + /// Alias regions are deduplicated based on this identifier. + /// + /// This deduplication happens during inlining, for example, when a + /// callee's alias regions are merged with the caller's. Therefore, when + /// inlining is enabled this identifier should be globally unique across + /// the whole compilation. When inlining is disabled, it is sufficient + /// to be unique within the context of a single function. + pub user_id: u32, + + /// Description of this alias region, e.g. "vmctx", "funcref table", + /// "global 42", or "gc struct `LinkedList` field `tail`". + /// + /// This only exists for printing in the CLIF text format. + pub description: Cow<'static, str>, } -impl AliasRegion { - const fn from_bits(bits: u8) -> Option { - match bits { - 0b00 => None, - 0b01 => Some(Self::Heap), - 0b10 => Some(Self::Table), - 0b11 => Some(Self::Vmctx), - _ => panic!("invalid alias region bits"), +/// An opaque reference to memory operation flags stored in a +/// [`MemFlagsSet`]. +/// +/// `MemFlags` is a u16 entity index that refers to a [`MemFlagsData`] entry in +/// the [`MemFlagsSet`] stored in the +/// [`DataFlowGraph`](super::dfg::DataFlowGraph). +#[derive(Copy, Clone, PartialEq, Eq, Hash, PartialOrd, Ord)] +#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))] +pub struct MemFlags(u16); + +impl MemFlags { + /// Create a new `MemFlags` from a `u32` index. + /// + /// Returns `None` if the index doesn't fit in a `u16`. + pub fn with_number(n: u32) -> Option { + let val = u16::try_from(n).ok()?; + if val == u16::MAX { + None + } else { + Some(Self(val)) } } +} - const fn to_bits(region: Option) -> u8 { - match region { - None => 0b00, - Some(r) => r as u8, - } +impl entity::EntityRef for MemFlags { + #[inline] + fn new(index: usize) -> Self { + let val = u16::try_from(index).expect("MemFlags index overflow"); + Self(val) + } + + #[inline] + fn index(self) -> usize { + usize::from(self.0) + } +} + +impl entity::packed_option::ReservedValue for MemFlags { + #[inline] + fn reserved_value() -> Self { + Self(u16::MAX) + } + + #[inline] + fn is_reserved_value(&self) -> bool { + self.0 == u16::MAX + } +} + +impl MemFlags { + /// Create a new instance from a `u32`. + #[inline] + pub fn from_u32(x: u32) -> Self { + Self(u16::try_from(x).unwrap()) + } + + /// Return the underlying index value as a `u32`. + #[inline] + pub fn as_u32(self) -> u32 { + u32::from(self.0) + } + + /// Return the raw bit encoding for this instance. + #[inline] + pub fn as_bits(self) -> u32 { + u32::from(self.0) + } + + /// Create a new instance from the raw bit encoding. + #[inline] + pub fn from_bits(x: u32) -> Self { + Self(u16::try_from(x).unwrap()) + } +} + +impl fmt::Display for MemFlags { + fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result { + write!(f, "memflags{}", self.0) + } +} + +impl fmt::Debug for MemFlags { + fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result { + (self as &dyn fmt::Display).fmt(f) } } @@ -62,61 +154,24 @@ impl AliasRegion { #[derive(Clone, Copy, Debug, Hash, PartialEq, Eq)] #[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))] pub struct MemFlagsData { - // Initialized to all zeros to have all flags have their default value. - // This is interpreted through various methods below. Currently the bits of - // this are defined as: - // - // * 0 - aligned flag - // * 1 - readonly flag - // * 2 - little endian flag - // * 3 - big endian flag - // * 4 - checked flag - // * 5/6 - alias region - // * 7/8/9/10/11/12/13/14 - trap code - // * 15 - can_move flag - // - // Current properties upheld are: - // - // * only one of little/big endian is set - // * only one alias region can be set - once set it cannot be changed - bits: u16, -} - -/// Guaranteed to use "natural alignment" for the given type. This -/// may enable better instruction selection. -const BIT_ALIGNED: u16 = 1 << 0; - -/// A load that reads data in memory that does not change for the -/// duration of the function's execution. This may enable -/// additional optimizations to be performed. -const BIT_READONLY: u16 = 1 << 1; - -/// Load multi-byte values from memory in a little-endian format. -const BIT_LITTLE_ENDIAN: u16 = 1 << 2; - -/// Load multi-byte values from memory in a big-endian format. -const BIT_BIG_ENDIAN: u16 = 1 << 3; - -/// Used for alias analysis, indicates which disjoint part of the abstract state -/// is being accessed. -const MASK_ALIAS_REGION: u16 = 0b11 << ALIAS_REGION_OFFSET; -const ALIAS_REGION_OFFSET: u16 = 5; + /// Backend-facing memory-operation flags. + flags: MachMemFlags, -/// Trap code, if any, for this memory operation. -const MASK_TRAP_CODE: u16 = 0b1111_1111 << TRAP_CODE_OFFSET; -const TRAP_CODE_OFFSET: u16 = 7; + /// The alias region for this memory operation, if any. + region: PackedOption, +} -/// Whether this memory operation may be freely moved by the optimizer so long -/// as its data dependencies are satisfied. That is, by setting this flag, the -/// producer is guaranteeing that this memory operation's safety is not guarded -/// by outside-the-data-flow-graph properties, like implicit bounds-checking -/// control dependencies. -const BIT_CAN_MOVE: u16 = 1 << 15; +const fn no_alias_region() -> PackedOption { + PackedOption::new(AliasRegion(u32::MAX)) +} impl MemFlagsData { /// Create a new empty set of flags. pub const fn new() -> Self { - Self { bits: 0 }.with_trap_code(Some(TrapCode::HEAP_OUT_OF_BOUNDS)) + Self { + flags: MachMemFlags::new(), + region: no_alias_region(), + } } /// Create a set of flags representing an access from a "trusted" address, meaning it's @@ -125,33 +180,20 @@ impl MemFlagsData { Self::new().with_notrap().with_aligned() } - /// Read a flag bit. - const fn read_bit(self, bit: u16) -> bool { - self.bits & bit != 0 - } - - /// Return a new `MemFlagsData` with this flag bit set. - const fn with_bit(mut self, bit: u16) -> Self { - self.bits |= bit; - self - } - /// Reads the alias region that this memory operation works with. - pub const fn alias_region(self) -> Option { - AliasRegion::from_bits(((self.bits & MASK_ALIAS_REGION) >> ALIAS_REGION_OFFSET) as u8) + pub fn alias_region(self) -> Option { + self.region.expand() } /// Sets the alias region that this works on to the specified `region`. - pub const fn with_alias_region(mut self, region: Option) -> Self { - let bits = AliasRegion::to_bits(region); - self.bits &= !MASK_ALIAS_REGION; - self.bits |= (bits as u16) << ALIAS_REGION_OFFSET; + pub fn with_alias_region(mut self, region: Option) -> Self { + self.region = region.into(); self } /// Sets the alias region that this works on to the specified `region`. pub fn set_alias_region(&mut self, region: Option) { - *self = self.with_alias_region(region); + self.region = region.into(); } /// Set a flag bit by name. @@ -169,35 +211,17 @@ impl MemFlagsData { "aligned" => self.with_aligned(), "readonly" => self.with_readonly(), "little" => { - if self.read_bit(BIT_BIG_ENDIAN) { + if self.flags.explicit_endianness() == Some(Endianness::Big) { return Err("cannot set both big and little endian bits"); } self.with_endianness(Endianness::Little) } "big" => { - if self.read_bit(BIT_LITTLE_ENDIAN) { + if self.flags.explicit_endianness() == Some(Endianness::Little) { return Err("cannot set both big and little endian bits"); } self.with_endianness(Endianness::Big) } - "heap" => { - if self.alias_region().is_some() { - return Err("cannot set more than one alias region"); - } - self.with_alias_region(Some(AliasRegion::Heap)) - } - "table" => { - if self.alias_region().is_some() { - return Err("cannot set more than one alias region"); - } - self.with_alias_region(Some(AliasRegion::Table)) - } - "vmctx" => { - if self.alias_region().is_some() { - return Err("cannot set more than one alias region"); - } - self.with_alias_region(Some(AliasRegion::Vmctx)) - } "can_move" => self.with_can_move(), other => match TrapCode::from_str(other) { @@ -214,13 +238,7 @@ impl MemFlagsData { /// caller since it is not explicitly encoded in CLIF IR -- this allows a /// front end to create IR without having to know the target endianness. pub const fn endianness(self, native_endianness: Endianness) -> Endianness { - if self.read_bit(BIT_LITTLE_ENDIAN) { - Endianness::Little - } else if self.read_bit(BIT_BIG_ENDIAN) { - Endianness::Big - } else { - native_endianness - } + self.flags.endianness(native_endianness) } /// Return endianness of the memory access, if explicitly specified. @@ -228,13 +246,7 @@ impl MemFlagsData { /// If the endianness is not explicitly specified, this will return `None`, /// which means "native endianness". pub const fn explicit_endianness(self) -> Option { - if self.read_bit(BIT_LITTLE_ENDIAN) { - Some(Endianness::Little) - } else if self.read_bit(BIT_BIG_ENDIAN) { - Some(Endianness::Big) - } else { - None - } + self.flags.explicit_endianness() } /// Set endianness of the memory access. @@ -243,18 +255,14 @@ impl MemFlagsData { } /// Set endianness of the memory access, returning new flags. - pub const fn with_endianness(self, endianness: Endianness) -> Self { - let res = match endianness { - Endianness::Little => self.with_bit(BIT_LITTLE_ENDIAN), - Endianness::Big => self.with_bit(BIT_BIG_ENDIAN), - }; - assert!(!(res.read_bit(BIT_LITTLE_ENDIAN) && res.read_bit(BIT_BIG_ENDIAN))); - res + pub const fn with_endianness(mut self, endianness: Endianness) -> Self { + self.flags = self.flags.with_endianness(endianness); + self } /// Test if this memory operation cannot trap. /// - /// By default `MemFlagsData` will assume that any load/store can trap and is + /// By default `MemFlags` will assume that any load/store can trap and is /// associated with a `TrapCode::HeapOutOfBounds` code. If the trap code is /// configured to `None` though then this method will return `true` and /// indicates that the memory operation will not trap. @@ -299,7 +307,7 @@ impl MemFlagsData { /// unsafe to code motion it above the bounds check, even if its data /// dependencies would still be satisfied. pub const fn can_move(self) -> bool { - self.read_bit(BIT_CAN_MOVE) + self.flags.can_move() } /// Set the `can_move` flag. @@ -308,8 +316,9 @@ impl MemFlagsData { } /// Set the `can_move` flag, returning new flags. - pub const fn with_can_move(self) -> Self { - self.with_bit(BIT_CAN_MOVE) + pub const fn with_can_move(mut self) -> Self { + self.flags = self.flags.with_can_move(); + self } /// Test if the `aligned` flag is set. @@ -318,7 +327,7 @@ impl MemFlagsData { /// `aligned` flag is set, the instruction is permitted to trap or return a wrong result if the /// effective address is misaligned. pub const fn aligned(self) -> bool { - self.read_bit(BIT_ALIGNED) + self.flags.aligned() } /// Set the `aligned` flag. @@ -327,8 +336,9 @@ impl MemFlagsData { } /// Set the `aligned` flag, returning new flags. - pub const fn with_aligned(self) -> Self { - self.with_bit(BIT_ALIGNED) + pub const fn with_aligned(mut self) -> Self { + self.flags = self.flags.with_aligned(); + self } /// Test if the `readonly` flag is set. @@ -337,7 +347,7 @@ impl MemFlagsData { /// This results in undefined behavior if the dereferenced memory is mutated at any time /// between when the function is called and when it is exited. pub const fn readonly(self) -> bool { - self.read_bit(BIT_READONLY) + self.flags.readonly() } /// Set the `readonly` flag. @@ -346,18 +356,15 @@ impl MemFlagsData { } /// Set the `readonly` flag, returning new flags. - pub const fn with_readonly(self) -> Self { - self.with_bit(BIT_READONLY) + pub const fn with_readonly(mut self) -> Self { + self.flags = self.flags.with_readonly(); + self } /// Get the trap code to report if this memory access traps. /// /// A `None` trap code indicates that this memory access does not trap. pub const fn trap_code(self) -> Option { - let byte = ((self.bits & MASK_TRAP_CODE) >> TRAP_CODE_OFFSET) as u8; - match NonZeroU8::new(byte) { - Some(code) => Some(TrapCode::from_raw(code)), - None => None, - } + self.flags.trap_code() } /// Configures these flags with the specified trap code `code`. @@ -367,85 +374,261 @@ impl MemFlagsData { /// considered side effects, for example, and have meaning through the trap /// code that is communicated and which instruction trapped. pub const fn with_trap_code(mut self, code: Option) -> Self { - let bits = match code { - Some(code) => code.as_raw().get() as u16, - None => 0, - }; - self.bits &= !MASK_TRAP_CODE; - self.bits |= bits << TRAP_CODE_OFFSET; + self.flags = self.flags.with_trap_code(code); self } } +impl From for MachMemFlags { + fn from(flags: MemFlagsData) -> Self { + flags.flags + } +} + +impl From for MemFlagsData { + fn from(flags: MachMemFlags) -> Self { + Self { + flags, + region: no_alias_region(), + } + } +} + impl fmt::Display for MemFlagsData { fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result { - match self.trap_code() { - None => write!(f, " notrap")?, - // This is the default trap code, so don't print anything extra - // for this. - Some(TrapCode::HEAP_OUT_OF_BOUNDS) => {} - Some(t) => write!(f, " {t}")?, - } - if self.aligned() { - write!(f, " aligned")?; + write!(f, "{}", self.flags)?; + match self.alias_region() { + None => {} + Some(region) => write!(f, " {region}")?, } - if self.readonly() { - write!(f, " readonly")?; + Ok(()) + } +} + +#[derive(Clone, Copy, Debug, PartialEq, Eq)] +pub struct MemFlagsSetOverflow; + +/// A deduplicated set of mem flags. +#[derive(Clone, Debug)] +#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))] +pub struct MemFlagsSet { + mem_flags: PrimaryMap, + dedupe_map: HashMap, +} + +impl PartialEq for MemFlagsSet { + fn eq(&self, other: &Self) -> bool { + self.mem_flags == other.mem_flags + } +} + +impl Eq for MemFlagsSet {} + +impl Hash for MemFlagsSet { + fn hash(&self, state: &mut H) { + self.mem_flags.hash(state); + } +} + +impl MemFlagsSet { + /// Create a new empty set. + pub fn new() -> Self { + Self { + mem_flags: PrimaryMap::new(), + dedupe_map: HashMap::new(), } - if self.can_move() { - write!(f, " can_move")?; + } + + /// Insert new mem flags into this set. + /// + /// Returns an existing `MemFlags` if the data already exists. + pub fn insert(&mut self, data: MemFlagsData) -> Result { + if let Some(&existing) = self.dedupe_map.get(&data) { + return Ok(existing); } - if self.read_bit(BIT_BIG_ENDIAN) { - write!(f, " big")?; + let next = u32::try_from(self.mem_flags.len()) + .ok() + .and_then(MemFlags::with_number) + .ok_or(MemFlagsSetOverflow)?; + let key = self.mem_flags.push(data); + debug_assert_eq!(key, next); + self.dedupe_map.insert(data, key); + Ok(key) + } + + /// Insert new mem flags into this set, panicking if the index does not fit. + pub fn insert_unchecked(&mut self, data: MemFlagsData) -> MemFlags { + match self.insert(data) { + Ok(flags) => flags, + Err(_) => panic!("MemFlags index overflow"), } - if self.read_bit(BIT_LITTLE_ENDIAN) { - write!(f, " little")?; + } + + /// Returns `true` if the given mem flags reference is valid. + pub fn is_valid(&self, mf: MemFlags) -> bool { + self.mem_flags.is_valid(mf) + } + + /// Clear the set. + pub fn clear(&mut self) { + *self = Self::new(); + } + + /// Find the entity index for an existing [`MemFlagsData`] value. + pub fn get(&self, data: MemFlagsData) -> Option { + self.dedupe_map.get(&data).copied() + } +} + +// NB: Do not implement `IndexMut` because mem flags data is deduped and shared +// by many instructions. +impl Index for MemFlagsSet { + type Output = MemFlagsData; + + fn index(&self, mf: MemFlags) -> &MemFlagsData { + &self.mem_flags[mf] + } +} + +/// A deduplicated set of alias regions. +/// +/// Deduplication is based on `user_id`; the description string is not +/// considered. +#[derive(Clone, PartialEq)] +#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))] +pub struct AliasRegionSet { + alias_regions: PrimaryMap, + dedupe_map: HashMap, +} + +impl Hash for AliasRegionSet { + fn hash(&self, state: &mut H) { + self.alias_regions.hash(state); + } +} + +impl AliasRegionSet { + /// Create a new empty set. + pub fn new() -> Self { + Self { + alias_regions: PrimaryMap::new(), + dedupe_map: HashMap::new(), } - match self.alias_region() { - None => {} - Some(AliasRegion::Heap) => write!(f, " heap")?, - Some(AliasRegion::Table) => write!(f, " table")?, - Some(AliasRegion::Vmctx) => write!(f, " vmctx")?, + } + + /// Insert a new alias region into this set. + /// + /// Returns an existing `AliasRegion` if one with the same `user_id` + /// already exists. + pub fn insert(&mut self, data: AliasRegionData) -> AliasRegion { + if let Some(&existing) = self.dedupe_map.get(&data.user_id) { + return existing; } - Ok(()) + let user_id = data.user_id; + let key = self.alias_regions.push(data); + self.dedupe_map.insert(user_id, key); + key + } + + /// Push a new alias region, bypassing deduplication. + /// + /// This is used by the CLIF text parser to faithfully represent the + /// source text. The verifier will then check for duplicate `user_id`s. + pub fn push(&mut self, data: AliasRegionData) -> AliasRegion { + let user_id = data.user_id; + let key = self.alias_regions.push(data); + self.dedupe_map.insert(user_id, key); + key + } + + /// Returns `true` if this set already contains a region with the given + /// `user_id`. + pub fn contains(&self, user_id: u32) -> bool { + self.dedupe_map.contains_key(&user_id) + } + + /// Returns `true` if the given alias region reference is valid. + pub fn is_valid(&self, ar: AliasRegion) -> bool { + self.alias_regions.is_valid(ar) + } + + /// Return the number of alias regions in the set. + pub fn len(&self) -> usize { + self.alias_regions.len() + } + + /// Iterate over all alias regions and their data. + pub fn iter(&self) -> impl Iterator { + self.alias_regions.iter() + } + + /// Clear the set. + pub fn clear(&mut self) { + self.alias_regions.clear(); + self.dedupe_map.clear(); + } +} + +// NB: Do not implement `IndexMut` because alias region data is deduped and +// shared by many mem flags. +impl Index for AliasRegionSet { + type Output = AliasRegionData; + + fn index(&self, ar: AliasRegion) -> &AliasRegionData { + &self.alias_regions[ar] } } #[cfg(test)] mod tests { use super::*; + use cranelift_entity::EntityRef; #[test] fn roundtrip_traps() { for trap in TrapCode::non_user_traps().iter().copied() { - let flags = MemFlagsData::new().with_trap_code(Some(trap)); - assert_eq!(flags.trap_code(), Some(trap)); + let _flags = MemFlagsData::new().with_trap_code(Some(trap)); } - let flags = MemFlagsData::new().with_trap_code(None); - assert_eq!(flags.trap_code(), None); + let _flags = MemFlagsData::new().with_trap_code(None); } #[test] fn cannot_set_big_and_little() { - let mut big = MemFlagsData::new().with_endianness(Endianness::Big); - assert!(big.set_by_name("little").is_err()); + let _big = MemFlagsData::new().with_endianness(Endianness::Big); - let mut little = MemFlagsData::new().with_endianness(Endianness::Little); - assert!(little.set_by_name("big").is_err()); + let _little = MemFlagsData::new().with_endianness(Endianness::Little); } #[test] fn only_one_region() { - let mut big = MemFlagsData::new().with_alias_region(Some(AliasRegion::Heap)); - assert!(big.set_by_name("table").is_err()); - assert!(big.set_by_name("vmctx").is_err()); + let region0 = AliasRegion::new(0); + let region1 = AliasRegion::new(1); + let flags = MemFlagsData::new().with_alias_region(Some(region0)); + assert_eq!(flags.alias_region(), Some(region0)); + + let flags = flags.with_alias_region(Some(region1)); + assert_eq!(flags.alias_region(), Some(region1)); - let mut big = MemFlagsData::new().with_alias_region(Some(AliasRegion::Table)); - assert!(big.set_by_name("heap").is_err()); - assert!(big.set_by_name("vmctx").is_err()); + let flags = flags.with_alias_region(None); + assert_eq!(flags.alias_region(), None); + } - let mut big = MemFlagsData::new().with_alias_region(Some(AliasRegion::Vmctx)); - assert!(big.set_by_name("heap").is_err()); - assert!(big.set_by_name("table").is_err()); + #[test] + fn clear_removes_entries() { + let mut set = MemFlagsSet::new(); + let trusted = set.insert(MemFlagsData::trusted()).unwrap(); + let custom = MemFlagsData::new() + .with_endianness(Endianness::Big) + .with_alias_region(Some(AliasRegion::new(0))); + let custom_key = set.insert(custom).unwrap(); + assert!(set.is_valid(trusted)); + assert!(set.is_valid(custom_key)); + + set.clear(); + + assert!(!set.is_valid(trusted)); + assert!(!set.is_valid(custom_key)); + let trusted = set.insert(MemFlagsData::trusted()).unwrap(); + assert_eq!(set[trusted], MemFlagsData::trusted()); } } diff --git a/cranelift/codegen/src/ir/mod.rs b/cranelift/codegen/src/ir/mod.rs index 3679948a29b6..d8acfed3ab09 100644 --- a/cranelift/codegen/src/ir/mod.rs +++ b/cranelift/codegen/src/ir/mod.rs @@ -56,7 +56,10 @@ pub use crate::ir::jumptable::JumpTableData; pub use crate::ir::known_symbol::KnownSymbol; pub use crate::ir::layout::Layout; pub use crate::ir::libcall::{LibCall, get_probestack_funcref}; -pub use crate::ir::memflags::{AliasRegion, Endianness, MemFlagsData}; +pub use crate::ir::memflags::{ + AliasRegion, AliasRegionData, AliasRegionSet, Endianness, MachMemFlags, MemFlags, MemFlagsData, + MemFlagsSet, +}; pub use crate::ir::progpoint::ProgramPoint; pub use crate::ir::sourceloc::RelSourceLoc; pub use crate::ir::sourceloc::SourceLoc; diff --git a/cranelift/codegen/src/isa/aarch64/inst.isle b/cranelift/codegen/src/isa/aarch64/inst.isle index 49dc50d858c4..6e3fbcd2f683 100644 --- a/cranelift/codegen/src/isa/aarch64/inst.isle +++ b/cranelift/codegen/src/isa/aarch64/inst.isle @@ -4051,7 +4051,7 @@ (rule 1 (constant_f64 (u64_low32_bits_unset n)) (mov_to_fpu (imm $I64 (ImmExtend.Zero) n) (ScalarSize.Size64))) (rule (constant_f64 n) - (fpu_load64 (AMode.Const (emit_u64_le_const n)) (mem_flags_trusted))) + (fpu_load64 (AMode.Const (emit_u64_le_const n)) (mem_flags_trusted_data))) ;; Tests whether the low 32 bits in the input are all zero. (decl u64_low32_bits_unset (u64) u64) @@ -4074,7 +4074,7 @@ ;; Base case is to load the constant from memory. (rule (constant_f128 n) - (fpu_load128 (AMode.Const (emit_u128_le_const n)) (mem_flags_trusted))) + (fpu_load128 (AMode.Const (emit_u128_le_const n)) (mem_flags_trusted_data))) ;; Lower a vector splat with a constant parameter. ;; @@ -4292,7 +4292,7 @@ ;; the stack; the presence of the record is guaranteed by the ;; `preserve_frame_pointers` setting. (addr AMode (AMode.FPOffset 8)) - (_ Unit (emit (MInst.ULoad64 dst addr (mem_flags_trusted))))) + (_ Unit (emit (MInst.ULoad64 dst addr (mem_flags_trusted_data))))) dst)) (rule (aarch64_link) @@ -4303,7 +4303,7 @@ ;; before returning. (let ((addr AMode (AMode.FPOffset 8)) (lr WritableReg (writable_link_reg)) - (_ Unit (emit (MInst.ULoad64 lr addr (mem_flags_trusted)))) + (_ Unit (emit (MInst.ULoad64 lr addr (mem_flags_trusted_data)))) (_ Unit (emit (MInst.Xpaclri)))) (mov_from_preg (preg_link)))) diff --git a/cranelift/codegen/src/isa/aarch64/lower.isle b/cranelift/codegen/src/isa/aarch64/lower.isle index dafd56631d7f..28eea60536cd 100644 --- a/cranelift/codegen/src/isa/aarch64/lower.isle +++ b/cranelift/codegen/src/isa/aarch64/lower.isle @@ -2292,7 +2292,7 @@ (rule (lower (has_type ty (splat _ (iconst _ (u64_from_imm64 n))))) (splat_const n (vector_size ty))) -(rule (lower (has_type ty (splat _ x @ (load _ flags _ _)))) +(rule (lower (has_type ty (splat _ x @ (load _ (mem_flags_data flags) _ _)))) (if-let mem_op (is_sinkable_inst x)) (let ((addr Reg (sink_load_into_addr (lane_type ty) mem_op))) (ld1r addr (vector_size ty) flags))) diff --git a/cranelift/codegen/src/isa/pulley_shared/inst.isle b/cranelift/codegen/src/isa/pulley_shared/inst.isle index 7324c3473110..94a09161376f 100644 --- a/cranelift/codegen/src/isa/pulley_shared/inst.isle +++ b/cranelift/codegen/src/isa/pulley_shared/inst.isle @@ -270,9 +270,10 @@ (type SinkableLoad (enum (Load (inst Inst) (ty Type) (addr Value) (offset u8)))) (decl pure partial sinkable_load (Value) SinkableLoad) (rule (sinkable_load value @ (value_type ty)) - (if-let inst @ (load _ flags addr (offset32 offset)) (is_sinkable_inst value)) - (if-let true (is_native_endianness (endianness flags))) - (if-let true (memflags_nontrapping flags)) + (if-let inst @ (load _ (mem_flags_data flags_data) addr (offset32 offset)) + (is_sinkable_inst value)) + (if-let true (is_native_endianness (endianness flags_data))) + (if-let true (memflags_nontrapping flags_data)) (if-let offset8 (i32_try_into_u8 offset)) (SinkableLoad.Load inst ty addr offset8)) diff --git a/cranelift/codegen/src/isa/pulley_shared/lower.isle b/cranelift/codegen/src/isa/pulley_shared/lower.isle index abbff7b49bc2..b907eb9d3509 100644 --- a/cranelift/codegen/src/isa/pulley_shared/lower.isle +++ b/cranelift/codegen/src/isa/pulley_shared/lower.isle @@ -960,73 +960,73 @@ ;;;; Rules for `load` and friends ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -(rule (lower (has_type (ty_int (fits_in_64 ty)) (load _ flags addr offset))) +(rule (lower (has_type (ty_int (fits_in_64 ty)) (load _ (mem_flags_data flags) addr offset))) (gen_xload addr offset flags ty (ExtKind.None))) -(rule 1 (lower (has_type (ty_scalar_float ty) (load _ flags addr offset))) +(rule 1 (lower (has_type (ty_scalar_float ty) (load _ (mem_flags_data flags) addr offset))) (gen_fload addr offset flags ty)) -(rule 3 (lower (has_type $I128 (load _ flags addr offset))) +(rule 3 (lower (has_type $I128 (load _ (mem_flags_data flags) addr offset))) (if-let offsetp8 (i32_checked_add offset 8)) (let ((lo XReg (pulley_xload (amode addr offset) $I64 flags)) (hi XReg (pulley_xload (amode addr offsetp8) $I64 flags))) (value_regs lo hi))) -(rule 0 (lower (has_type (ty_int (fits_in_32 _)) (uload8 _ flags addr offset))) +(rule 0 (lower (has_type (ty_int (fits_in_32 _)) (uload8 _ (mem_flags_data flags) addr offset))) (gen_xload addr offset flags $I8 (ExtKind.Zero32))) -(rule 0 (lower (has_type (ty_int (fits_in_32 _)) (uload16 _ flags addr offset))) +(rule 0 (lower (has_type (ty_int (fits_in_32 _)) (uload16 _ (mem_flags_data flags) addr offset))) (gen_xload addr offset flags $I16 (ExtKind.Zero32))) -(rule 0 (lower (has_type (ty_int (fits_in_32 _)) (uload32 _ flags addr offset))) +(rule 0 (lower (has_type (ty_int (fits_in_32 _)) (uload32 _ (mem_flags_data flags) addr offset))) (gen_xload addr offset flags $I32 (ExtKind.None))) -(rule 1 (lower (has_type $I64 (uload8 _ flags addr offset))) +(rule 1 (lower (has_type $I64 (uload8 _ (mem_flags_data flags) addr offset))) (gen_xload addr offset flags $I8 (ExtKind.Zero64))) -(rule 1 (lower (has_type $I64 (uload16 _ flags addr offset))) +(rule 1 (lower (has_type $I64 (uload16 _ (mem_flags_data flags) addr offset))) (gen_xload addr offset flags $I16 (ExtKind.Zero64))) -(rule 1 (lower (has_type $I64 (uload32 _ flags addr offset))) +(rule 1 (lower (has_type $I64 (uload32 _ (mem_flags_data flags) addr offset))) (gen_xload addr offset flags $I32 (ExtKind.Zero64))) -(rule 0 (lower (has_type (ty_int (fits_in_32 _)) (sload8 _ flags addr offset))) +(rule 0 (lower (has_type (ty_int (fits_in_32 _)) (sload8 _ (mem_flags_data flags) addr offset))) (gen_xload addr offset flags $I8 (ExtKind.Sign32))) -(rule 0 (lower (has_type (ty_int (fits_in_32 _)) (sload16 _ flags addr offset))) +(rule 0 (lower (has_type (ty_int (fits_in_32 _)) (sload16 _ (mem_flags_data flags) addr offset))) (gen_xload addr offset flags $I16 (ExtKind.Sign32))) -(rule 0 (lower (has_type (ty_int (fits_in_32 _)) (sload32 _ flags addr offset))) +(rule 0 (lower (has_type (ty_int (fits_in_32 _)) (sload32 _ (mem_flags_data flags) addr offset))) (gen_xload addr offset flags $I32 (ExtKind.None))) -(rule 1 (lower (has_type $I64 (sload8 _ flags addr offset))) +(rule 1 (lower (has_type $I64 (sload8 _ (mem_flags_data flags) addr offset))) (gen_xload addr offset flags $I8 (ExtKind.Sign64))) -(rule 1 (lower (has_type $I64 (sload16 _ flags addr offset))) +(rule 1 (lower (has_type $I64 (sload16 _ (mem_flags_data flags) addr offset))) (gen_xload addr offset flags $I16 (ExtKind.Sign64))) -(rule 1 (lower (has_type $I64 (sload32 _ flags addr offset))) +(rule 1 (lower (has_type $I64 (sload32 _ (mem_flags_data flags) addr offset))) (gen_xload addr offset flags $I32 (ExtKind.Sign64))) -(rule 2 (lower (has_type (ty_vec128 ty) (load _ flags addr offset))) +(rule 2 (lower (has_type (ty_vec128 ty) (load _ (mem_flags_data flags) addr offset))) (gen_vload addr offset flags ty (VExtKind.None))) -(rule (lower (has_type ty (sload8x8 _ flags addr offset))) +(rule (lower (has_type ty (sload8x8 _ (mem_flags_data flags) addr offset))) (gen_vload addr offset flags ty (VExtKind.S8x8))) -(rule (lower (has_type ty (uload8x8 _ flags addr offset))) +(rule (lower (has_type ty (uload8x8 _ (mem_flags_data flags) addr offset))) (gen_vload addr offset flags ty (VExtKind.U8x8))) -(rule (lower (has_type ty (sload16x4 _ flags addr offset))) +(rule (lower (has_type ty (sload16x4 _ (mem_flags_data flags) addr offset))) (gen_vload addr offset flags ty (VExtKind.S16x4))) -(rule (lower (has_type ty (uload16x4 _ flags addr offset))) +(rule (lower (has_type ty (uload16x4 _ (mem_flags_data flags) addr offset))) (gen_vload addr offset flags ty (VExtKind.U16x4))) -(rule (lower (has_type ty (sload32x2 _ flags addr offset))) +(rule (lower (has_type ty (sload32x2 _ (mem_flags_data flags) addr offset))) (gen_vload addr offset flags ty (VExtKind.S32x2))) -(rule (lower (has_type ty (uload32x2 _ flags addr offset))) +(rule (lower (has_type ty (uload32x2 _ (mem_flags_data flags) addr offset))) (gen_vload addr offset flags ty (VExtKind.U32x2))) ;; Helper to generate an `xload*` instruction, of which there are many. This @@ -1255,27 +1255,27 @@ ;;;; Rules for `store` and friends ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -(rule (lower (store flags src @ (value_type (ty_int (fits_in_64 ty))) addr offset)) +(rule (lower (store (mem_flags_data flags) src @ (value_type (ty_int (fits_in_64 ty))) addr offset)) (side_effect (gen_store src addr offset flags ty))) -(rule 1 (lower (store flags src @ (value_type (ty_scalar_float ty)) addr offset)) +(rule 1 (lower (store (mem_flags_data flags) src @ (value_type (ty_scalar_float ty)) addr offset)) (side_effect (gen_store src addr offset flags ty))) -(rule (lower (istore8 flags src addr offset)) +(rule (lower (istore8 (mem_flags_data flags) src addr offset)) (side_effect (gen_store src addr offset flags $I8))) -(rule (lower (istore16 flags src addr offset)) +(rule (lower (istore16 (mem_flags_data flags) src addr offset)) (side_effect (gen_store src addr offset flags $I16))) -(rule (lower (istore32 flags src addr offset)) +(rule (lower (istore32 (mem_flags_data flags) src addr offset)) (side_effect (gen_store src addr offset flags $I32))) -(rule 2 (lower (store flags src @ (value_type (ty_vec128 ty)) addr offset)) +(rule 2 (lower (store (mem_flags_data flags) src @ (value_type (ty_vec128 ty)) addr offset)) (side_effect (gen_store src addr offset flags ty))) ;; i128 stores -(rule 3 (lower (store flags src @ (value_type $I128) addr offset)) +(rule 3 (lower (store (mem_flags_data flags) src @ (value_type $I128) addr offset)) (let ((src_regs ValueRegs src) (src_lo XReg (value_regs_get src_regs 0)) diff --git a/cranelift/codegen/src/isa/riscv64/inst.isle b/cranelift/codegen/src/isa/riscv64/inst.isle index f7a17d3c1cd8..80d812aaf249 100644 --- a/cranelift/codegen/src/isa/riscv64/inst.isle +++ b/cranelift/codegen/src/isa/riscv64/inst.isle @@ -1939,7 +1939,7 @@ (gen_load (gen_const_amode (emit_u64_le_const c)) (LoadOP.Ld) - (mem_flags_trusted))) + (mem_flags_trusted_data))) ;; Imm12 Rules diff --git a/cranelift/codegen/src/isa/riscv64/inst_vector.isle b/cranelift/codegen/src/isa/riscv64/inst_vector.isle index 550236b14cfc..da13fe08eac2 100644 --- a/cranelift/codegen/src/isa/riscv64/inst_vector.isle +++ b/cranelift/codegen/src/isa/riscv64/inst_vector.isle @@ -1552,7 +1552,7 @@ (vec_load (element_width_from_type ty) (VecAMode.UnitStride (gen_const_amode n)) - (mem_flags_trusted) + (mem_flags_trusted_data) (unmasked) ty)) diff --git a/cranelift/codegen/src/isa/riscv64/lower.isle b/cranelift/codegen/src/isa/riscv64/lower.isle index 9966609ec6a0..a074c9f903df 100644 --- a/cranelift/codegen/src/isa/riscv64/lower.isle +++ b/cranelift/codegen/src/isa/riscv64/lower.isle @@ -2235,7 +2235,7 @@ ;; Avoid unnecessary moves to floating point registers for `F16` memory to memory copies when ;; `Zfhmin` is unavailable. (rule 3 (lower (store (little_or_native_endian store_flags) - (sinkable_load inst $F16 (little_or_native_endian load_flags) load_addr load_offset) store_addr store_offset)) + (sinkable_load inst $F16 load_flags load_addr load_offset) store_addr store_offset)) (if-let false (has_zfhmin)) (rv_store (amode store_addr store_offset) (StoreOP.Sh) store_flags (gen_sunk_load inst (amode load_addr load_offset) (LoadOP.Lh) load_flags))) diff --git a/cranelift/codegen/src/isa/s390x/abi.rs b/cranelift/codegen/src/isa/s390x/abi.rs index 573e9c08332e..42bbe3d23d99 100644 --- a/cranelift/codegen/src/isa/s390x/abi.rs +++ b/cranelift/codegen/src/isa/s390x/abi.rs @@ -526,7 +526,7 @@ impl ABIMachineSpec for S390xMachineDeps { base: from_reg, index: zero_reg(), disp: imm, - flags: MemFlagsData::trusted(), + flags: MemFlagsData::trusted().into(), }, }); } else if let Some(imm) = SImm20::maybe_from_i64(imm as i64) { @@ -536,7 +536,7 @@ impl ABIMachineSpec for S390xMachineDeps { base: from_reg, index: zero_reg(), disp: imm, - flags: MemFlagsData::trusted(), + flags: MemFlagsData::trusted().into(), }, }); } else { diff --git a/cranelift/codegen/src/isa/s390x/inst.isle b/cranelift/codegen/src/isa/s390x/inst.isle index d3b3ba6b3844..7f194c42df2d 100644 --- a/cranelift/codegen/src/isa/s390x/inst.isle +++ b/cranelift/codegen/src/isa/s390x/inst.isle @@ -2030,7 +2030,7 @@ ;; Sinkable big-endian load instruction. (decl sinkable_load (Inst) Value) (extractor (sinkable_load inst) - (sinkable_inst (and inst (load _ (bigendian) _addr _offset)))) + (sinkable_inst (and inst (load _ (mem_flags_data (bigendian)) _addr _offset)))) ;; Sinkable big-endian load instruction (32/64-bit types only). (decl sinkable_load_32_64 (Inst) Value) @@ -2045,60 +2045,60 @@ ;; Sinkable little-endian load instruction. (decl sinkable_load_little (Inst) Value) (extractor (sinkable_load_little inst) - (sinkable_inst (and inst (load _ (littleendian) _addr _offset)))) + (sinkable_inst (and inst (load _ (mem_flags_data (littleendian)) _addr _offset)))) ;; Sinkable big-endian sload16 instruction. (decl sinkable_sload16 (Inst) Value) (extractor (sinkable_sload16 inst) - (sinkable_inst (and inst (sload16 _ (bigendian) _addr _offset)))) + (sinkable_inst (and inst (sload16 _ (mem_flags_data (bigendian)) _addr _offset)))) ;; Sinkable big-endian sload32 instruction. (decl sinkable_sload32 (Inst) Value) (extractor (sinkable_sload32 inst) - (sinkable_inst (and inst (sload32 _ (bigendian) _addr _offset)))) + (sinkable_inst (and inst (sload32 _ (mem_flags_data (bigendian)) _addr _offset)))) ;; Sinkable big-endian uload16 instruction. (decl sinkable_uload16 (Inst) Value) (extractor (sinkable_uload16 inst) - (sinkable_inst (and inst (uload16 _ (bigendian) _addr _offset)))) + (sinkable_inst (and inst (uload16 _ (mem_flags_data (bigendian)) _addr _offset)))) ;; Sinkable big-endian uload32 instruction. (decl sinkable_uload32 (Inst) Value) (extractor (sinkable_uload32 inst) - (sinkable_inst (and inst (uload32 _ (bigendian) _addr _offset)))) + (sinkable_inst (and inst (uload32 _ (mem_flags_data (bigendian)) _addr _offset)))) ;; Sink a load instruction, returning its address as `MemArg`. ;; This is a side-effectful operation, see `sink_inst`. (decl sink_load (Inst) MemArg) -(rule (sink_load inst @ (load _ flags addr offset)) +(rule (sink_load inst @ (load _ (mem_flags_data flags) addr offset)) (let ((_ Unit (sink_inst inst))) (lower_address flags addr offset))) ;; Sink a sload16 instruction, returning its address as `MemArg`. ;; This is a side-effectful operation, see `sink_inst`. (decl sink_sload16 (Inst) MemArg) -(rule (sink_sload16 inst @ (sload16 _ flags addr offset)) +(rule (sink_sload16 inst @ (sload16 _ (mem_flags_data flags) addr offset)) (let ((_ Unit (sink_inst inst))) (lower_address flags addr offset))) ;; Sink a sload32 instruction, returning its address as `MemArg`. ;; This is a side-effectful operation, see `sink_inst`. (decl sink_sload32 (Inst) MemArg) -(rule (sink_sload32 inst @ (sload32 _ flags addr offset)) +(rule (sink_sload32 inst @ (sload32 _ (mem_flags_data flags) addr offset)) (let ((_ Unit (sink_inst inst))) (lower_address flags addr offset))) ;; Sink a uload16 instruction, returning its address as `MemArg`. ;; This is a side-effectful operation, see `sink_inst`. (decl sink_uload16 (Inst) MemArg) -(rule (sink_uload16 inst @ (uload16 _ flags addr offset)) +(rule (sink_uload16 inst @ (uload16 _ (mem_flags_data flags) addr offset)) (let ((_ Unit (sink_inst inst))) (lower_address flags addr offset))) ;; Sink a uload32 instruction, returning its address as `MemArg`. ;; This is a side-effectful operation, see `sink_inst`. (decl sink_uload32 (Inst) MemArg) -(rule (sink_uload32 inst @ (uload32 _ flags addr offset)) +(rule (sink_uload32 inst @ (uload32 _ (mem_flags_data flags) addr offset)) (let ((_ Unit (sink_inst inst))) (lower_address flags addr offset))) diff --git a/cranelift/codegen/src/isa/s390x/inst/args.rs b/cranelift/codegen/src/isa/s390x/inst/args.rs index c4a97a958b55..1a559ae5677f 100644 --- a/cranelift/codegen/src/isa/s390x/inst/args.rs +++ b/cranelift/codegen/src/isa/s390x/inst/args.rs @@ -1,6 +1,6 @@ //! S390x ISA definitions: instruction arguments. -use crate::ir::MemFlagsData; +use crate::ir::MachMemFlags; use crate::ir::condcodes::{FloatCC, IntCC}; use crate::isa::s390x::inst::*; @@ -18,7 +18,7 @@ pub enum MemArg { base: Reg, index: Reg, disp: UImm12, - flags: MemFlagsData, + flags: MachMemFlags, }, /// Base register, index register, and 20-bit signed displacement. @@ -26,7 +26,7 @@ pub enum MemArg { base: Reg, index: Reg, disp: SImm20, - flags: MemFlagsData, + flags: MachMemFlags, }, /// PC-relative Reference to a label. @@ -39,7 +39,7 @@ pub enum MemArg { Symbol { name: Box, offset: i32, - flags: MemFlagsData, + flags: MachMemFlags, }, // @@ -50,7 +50,7 @@ pub enum MemArg { RegOffset { reg: Reg, off: i64, - flags: MemFlagsData, + flags: MachMemFlags, }, /// Offset from the stack pointer at function entry. @@ -80,7 +80,8 @@ pub enum MemArg { impl MemArg { /// Memory reference using an address in a register. - pub fn reg(reg: Reg, flags: MemFlagsData) -> MemArg { + pub fn reg(reg: Reg, flags: impl Into) -> MemArg { + let flags = flags.into(); MemArg::BXD12 { base: reg, index: zero_reg(), @@ -90,7 +91,8 @@ impl MemArg { } /// Memory reference using the sum of two registers as an address. - pub fn reg_plus_reg(reg1: Reg, reg2: Reg, flags: MemFlagsData) -> MemArg { + pub fn reg_plus_reg(reg1: Reg, reg2: Reg, flags: impl Into) -> MemArg { + let flags = flags.into(); MemArg::BXD12 { base: reg1, index: reg2, @@ -100,23 +102,24 @@ impl MemArg { } /// Memory reference using the sum of a register an offset as address. - pub fn reg_plus_off(reg: Reg, off: i64, flags: MemFlagsData) -> MemArg { + pub fn reg_plus_off(reg: Reg, off: i64, flags: impl Into) -> MemArg { + let flags = flags.into(); MemArg::RegOffset { reg, off, flags } } - pub(crate) fn get_flags(&self) -> MemFlagsData { + pub(crate) fn get_flags(&self) -> MachMemFlags { match self { MemArg::BXD12 { flags, .. } => *flags, MemArg::BXD20 { flags, .. } => *flags, MemArg::RegOffset { flags, .. } => *flags, - MemArg::Label { .. } => MemFlagsData::trusted(), - MemArg::Constant { .. } => MemFlagsData::trusted(), + MemArg::Label { .. } => MachMemFlags::trusted(), + MemArg::Constant { .. } => MachMemFlags::trusted(), MemArg::Symbol { flags, .. } => *flags, - MemArg::InitialSPOffset { .. } => MemFlagsData::trusted(), - MemArg::IncomingArgOffset { .. } => MemFlagsData::trusted(), - MemArg::OutgoingArgOffset { .. } => MemFlagsData::trusted(), - MemArg::SlotOffset { .. } => MemFlagsData::trusted(), - MemArg::SpillOffset { .. } => MemFlagsData::trusted(), + MemArg::InitialSPOffset { .. } => MachMemFlags::trusted(), + MemArg::IncomingArgOffset { .. } => MachMemFlags::trusted(), + MemArg::OutgoingArgOffset { .. } => MachMemFlags::trusted(), + MemArg::SlotOffset { .. } => MachMemFlags::trusted(), + MemArg::SpillOffset { .. } => MachMemFlags::trusted(), } } } diff --git a/cranelift/codegen/src/isa/s390x/inst/emit_tests.rs b/cranelift/codegen/src/isa/s390x/inst/emit_tests.rs index ddc95fda643f..98c7c2ca6b83 100644 --- a/cranelift/codegen/src/isa/s390x/inst/emit_tests.rs +++ b/cranelift/codegen/src/isa/s390x/inst/emit_tests.rs @@ -1,4 +1,4 @@ -use crate::ir::{MemFlagsData, TrapCode}; +use crate::ir::{MachMemFlags, TrapCode}; use crate::isa::s390x::inst::*; use crate::isa::s390x::settings as s390x_settings; @@ -536,7 +536,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "5A102000", @@ -551,7 +551,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "4A102000", @@ -566,7 +566,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: simm20_zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000005A", @@ -581,7 +581,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: simm20_zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000007A", @@ -596,7 +596,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000008", @@ -611,7 +611,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000038", @@ -626,7 +626,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000018", @@ -641,7 +641,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "5E102000", @@ -656,7 +656,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: simm20_zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000005E", @@ -671,7 +671,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000000A", @@ -686,7 +686,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000001A", @@ -701,7 +701,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "5B102000", @@ -716,7 +716,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "4B102000", @@ -731,7 +731,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: simm20_zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000005B", @@ -746,7 +746,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: simm20_zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000007B", @@ -761,7 +761,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000009", @@ -776,7 +776,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000039", @@ -791,7 +791,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000019", @@ -806,7 +806,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "5F102000", @@ -821,7 +821,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: simm20_zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000005F", @@ -836,7 +836,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000000B", @@ -851,7 +851,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000001B", @@ -866,7 +866,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "71102000", @@ -881,7 +881,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "4C102000", @@ -896,7 +896,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: simm20_zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000051", @@ -911,7 +911,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: simm20_zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000007C", @@ -926,7 +926,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000000C", @@ -941,7 +941,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000003C", @@ -956,7 +956,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000001C", @@ -971,7 +971,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "54102000", @@ -986,7 +986,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: simm20_zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000054", @@ -1001,7 +1001,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000080", @@ -1016,7 +1016,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "56102000", @@ -1031,7 +1031,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: simm20_zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000056", @@ -1046,7 +1046,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000081", @@ -1061,7 +1061,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "57102000", @@ -1076,7 +1076,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: simm20_zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000057", @@ -1091,7 +1091,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000082", @@ -1725,7 +1725,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "59102000", @@ -1739,7 +1739,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: simm20_zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000059", @@ -1764,7 +1764,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "49102000", @@ -1778,7 +1778,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: simm20_zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000079", @@ -1803,7 +1803,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000020", @@ -1828,7 +1828,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000034", @@ -1853,7 +1853,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000030", @@ -1878,7 +1878,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "55102000", @@ -1892,7 +1892,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: simm20_zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000055", @@ -1928,7 +1928,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000021", @@ -1964,7 +1964,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000031", @@ -2748,7 +2748,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB45000080F8", @@ -2763,7 +2763,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB450FFF7FF8", @@ -2778,7 +2778,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB45600080F8", @@ -2793,7 +2793,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB456FFF7FF8", @@ -2808,7 +2808,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB45000080E8", @@ -2823,7 +2823,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB450FFF7FE8", @@ -2838,7 +2838,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB45600080E8", @@ -2853,7 +2853,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB456FFF7FE8", @@ -2868,7 +2868,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB45000080FA", @@ -2883,7 +2883,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB450FFF7FFA", @@ -2898,7 +2898,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB45600080FA", @@ -2913,7 +2913,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB456FFF7FFA", @@ -2928,7 +2928,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB45000080EA", @@ -2943,7 +2943,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB450FFF7FEA", @@ -2958,7 +2958,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB45600080EA", @@ -2973,7 +2973,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB456FFF7FEA", @@ -2988,7 +2988,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB45000080F4", @@ -3003,7 +3003,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB450FFF7FF4", @@ -3018,7 +3018,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB45600080F4", @@ -3033,7 +3033,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB456FFF7FF4", @@ -3048,7 +3048,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB45000080E4", @@ -3063,7 +3063,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB450FFF7FE4", @@ -3078,7 +3078,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB45600080E4", @@ -3093,7 +3093,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB456FFF7FE4", @@ -3108,7 +3108,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB45000080F6", @@ -3123,7 +3123,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB450FFF7FF6", @@ -3138,7 +3138,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB45600080F6", @@ -3153,7 +3153,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB456FFF7FF6", @@ -3168,7 +3168,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB45000080E6", @@ -3183,7 +3183,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB450FFF7FE6", @@ -3198,7 +3198,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB45600080E6", @@ -3213,7 +3213,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB456FFF7FE6", @@ -3228,7 +3228,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB45000080F7", @@ -3243,7 +3243,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB450FFF7FF7", @@ -3258,7 +3258,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB45600080F7", @@ -3273,7 +3273,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB456FFF7FF7", @@ -3288,7 +3288,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB45000080E7", @@ -3303,7 +3303,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB450FFF7FE7", @@ -3318,7 +3318,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB45600080E7", @@ -3333,7 +3333,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB456FFF7FE7", @@ -3348,7 +3348,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: UImm12::maybe_from_u64(0).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "BA450000", @@ -3363,7 +3363,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "BA450FFF", @@ -3378,7 +3378,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB4500008014", @@ -3393,7 +3393,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB450FFF7F14", @@ -3408,7 +3408,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: UImm12::maybe_from_u64(0).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "BA456000", @@ -3423,7 +3423,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "BA456FFF", @@ -3438,7 +3438,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB4560008014", @@ -3453,7 +3453,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB456FFF7F14", @@ -3468,7 +3468,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB4500008030", @@ -3483,7 +3483,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB450FFF7F30", @@ -3498,7 +3498,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB4560008030", @@ -3513,7 +3513,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB456FFF7F30", @@ -3528,7 +3528,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "58102000", @@ -3541,7 +3541,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "58102FFF", @@ -3554,7 +3554,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020008058", @@ -3567,7 +3567,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F58", @@ -3580,7 +3580,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "58123000", @@ -3593,7 +3593,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "58123FFF", @@ -3606,7 +3606,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230008058", @@ -3619,7 +3619,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F58", @@ -3632,7 +3632,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000094", @@ -3645,7 +3645,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF0094", @@ -3658,7 +3658,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020008094", @@ -3671,7 +3671,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F94", @@ -3684,7 +3684,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230000094", @@ -3697,7 +3697,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF0094", @@ -3710,7 +3710,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230008094", @@ -3723,7 +3723,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F94", @@ -3736,7 +3736,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000076", @@ -3749,7 +3749,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF0076", @@ -3762,7 +3762,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020008076", @@ -3775,7 +3775,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F76", @@ -3788,7 +3788,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230000076", @@ -3801,7 +3801,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF0076", @@ -3814,7 +3814,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230008076", @@ -3827,7 +3827,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F76", @@ -3840,7 +3840,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000095", @@ -3853,7 +3853,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF0095", @@ -3866,7 +3866,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020008095", @@ -3879,7 +3879,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F95", @@ -3892,7 +3892,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230000095", @@ -3905,7 +3905,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF0095", @@ -3918,7 +3918,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230008095", @@ -3931,7 +3931,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F95", @@ -3944,7 +3944,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "48102000", @@ -3957,7 +3957,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "48102FFF", @@ -3970,7 +3970,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020008078", @@ -3983,7 +3983,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F78", @@ -3996,7 +3996,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "48123000", @@ -4009,7 +4009,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "48123FFF", @@ -4022,7 +4022,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230008078", @@ -4035,7 +4035,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F78", @@ -4048,7 +4048,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000004", @@ -4061,7 +4061,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF0004", @@ -4074,7 +4074,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020008004", @@ -4087,7 +4087,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F04", @@ -4100,7 +4100,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230000004", @@ -4113,7 +4113,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF0004", @@ -4126,7 +4126,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230008004", @@ -4139,7 +4139,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F04", @@ -4152,7 +4152,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000090", @@ -4165,7 +4165,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF0090", @@ -4178,7 +4178,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020008090", @@ -4191,7 +4191,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F90", @@ -4204,7 +4204,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230000090", @@ -4217,7 +4217,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF0090", @@ -4230,7 +4230,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230008090", @@ -4243,7 +4243,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F90", @@ -4256,7 +4256,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000077", @@ -4269,7 +4269,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF0077", @@ -4282,7 +4282,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020008077", @@ -4295,7 +4295,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F77", @@ -4308,7 +4308,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230000077", @@ -4321,7 +4321,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF0077", @@ -4334,7 +4334,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230008077", @@ -4347,7 +4347,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F77", @@ -4360,7 +4360,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000091", @@ -4373,7 +4373,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF0091", @@ -4386,7 +4386,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020008091", @@ -4399,7 +4399,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F91", @@ -4412,7 +4412,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230000091", @@ -4425,7 +4425,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF0091", @@ -4438,7 +4438,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230008091", @@ -4451,7 +4451,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F91", @@ -4464,7 +4464,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000015", @@ -4477,7 +4477,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF0015", @@ -4490,7 +4490,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020008015", @@ -4503,7 +4503,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F15", @@ -4516,7 +4516,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230000015", @@ -4529,7 +4529,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF0015", @@ -4542,7 +4542,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230008015", @@ -4555,7 +4555,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F15", @@ -4568,7 +4568,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000016", @@ -4581,7 +4581,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF0016", @@ -4594,7 +4594,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020008016", @@ -4607,7 +4607,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F16", @@ -4620,7 +4620,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230000016", @@ -4633,7 +4633,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF0016", @@ -4646,7 +4646,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230008016", @@ -4659,7 +4659,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F16", @@ -4672,7 +4672,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000014", @@ -4685,7 +4685,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF0014", @@ -4698,7 +4698,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020008014", @@ -4711,7 +4711,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F14", @@ -4724,7 +4724,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230000014", @@ -4737,7 +4737,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF0014", @@ -4750,7 +4750,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230008014", @@ -4763,7 +4763,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F14", @@ -4857,7 +4857,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000001F", @@ -4870,7 +4870,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF001F", @@ -4883,7 +4883,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000801F", @@ -4896,7 +4896,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F1F", @@ -4909,7 +4909,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123000001F", @@ -4922,7 +4922,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF001F", @@ -4935,7 +4935,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123000801F", @@ -4948,7 +4948,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F1F", @@ -4961,7 +4961,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000001E", @@ -4974,7 +4974,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF001E", @@ -4987,7 +4987,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000801E", @@ -5000,7 +5000,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F1E", @@ -5013,7 +5013,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123000001E", @@ -5026,7 +5026,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF001E", @@ -5039,7 +5039,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123000801E", @@ -5052,7 +5052,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F1E", @@ -5065,7 +5065,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000000F", @@ -5078,7 +5078,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF000F", @@ -5091,7 +5091,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000800F", @@ -5104,7 +5104,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F0F", @@ -5117,7 +5117,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123000000F", @@ -5130,7 +5130,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF000F", @@ -5143,7 +5143,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123000800F", @@ -5156,7 +5156,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F0F", @@ -5170,7 +5170,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "42102000", @@ -5183,7 +5183,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "42102FFF", @@ -5196,7 +5196,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020008072", @@ -5209,7 +5209,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F72", @@ -5222,7 +5222,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "42123000", @@ -5235,7 +5235,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "42123FFF", @@ -5248,7 +5248,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230008072", @@ -5261,7 +5261,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F72", @@ -5274,7 +5274,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "40102000", @@ -5287,7 +5287,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "40102FFF", @@ -5300,7 +5300,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020008070", @@ -5313,7 +5313,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F70", @@ -5326,7 +5326,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "40123000", @@ -5339,7 +5339,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "40123FFF", @@ -5352,7 +5352,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230008070", @@ -5365,7 +5365,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F70", @@ -5378,7 +5378,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "50102000", @@ -5391,7 +5391,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "50102FFF", @@ -5404,7 +5404,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020008050", @@ -5417,7 +5417,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F50", @@ -5430,7 +5430,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "50123000", @@ -5443,7 +5443,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "50123FFF", @@ -5456,7 +5456,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230008050", @@ -5469,7 +5469,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F50", @@ -5482,7 +5482,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020000024", @@ -5495,7 +5495,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF0024", @@ -5508,7 +5508,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020008024", @@ -5521,7 +5521,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F24", @@ -5534,7 +5534,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230000024", @@ -5547,7 +5547,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF0024", @@ -5560,7 +5560,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230008024", @@ -5573,7 +5573,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F24", @@ -5587,7 +5587,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "92FF2000", @@ -5600,7 +5600,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "92002FFF", @@ -5613,7 +5613,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EBFF20008052", @@ -5626,7 +5626,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB002FFF7F52", @@ -5639,7 +5639,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E54420008000", @@ -5652,7 +5652,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E5442FFF7FFF", @@ -5665,7 +5665,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E54C20008000", @@ -5678,7 +5678,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E54C2FFF7FFF", @@ -5691,7 +5691,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E54820008000", @@ -5704,7 +5704,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E5482FFF7FFF", @@ -5718,7 +5718,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000003F", @@ -5731,7 +5731,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF003F", @@ -5744,7 +5744,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000803F", @@ -5757,7 +5757,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F3F", @@ -5770,7 +5770,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123000003F", @@ -5783,7 +5783,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF003F", @@ -5796,7 +5796,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123000803F", @@ -5809,7 +5809,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F3F", @@ -5822,7 +5822,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000003E", @@ -5835,7 +5835,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF003E", @@ -5848,7 +5848,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000803E", @@ -5861,7 +5861,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F3E", @@ -5874,7 +5874,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123000003E", @@ -5887,7 +5887,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF003E", @@ -5900,7 +5900,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123000803E", @@ -5913,7 +5913,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F3E", @@ -5926,7 +5926,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000002F", @@ -5939,7 +5939,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF002F", @@ -5952,7 +5952,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102000802F", @@ -5965,7 +5965,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F2F", @@ -5978,7 +5978,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123000002F", @@ -5991,7 +5991,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF002F", @@ -6004,7 +6004,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123000802F", @@ -6017,7 +6017,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F2F", @@ -6063,7 +6063,7 @@ fn test_s390x_binemit() { base: gpr(15), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB8CF0008004", @@ -6077,7 +6077,7 @@ fn test_s390x_binemit() { base: gpr(15), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB8CFFFF7F04", @@ -6092,7 +6092,7 @@ fn test_s390x_binemit() { base: gpr(15), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB8CF0008024", @@ -6106,7 +6106,7 @@ fn test_s390x_binemit() { base: gpr(15), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "EB8CFFFF7F24", @@ -6120,7 +6120,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "41100000", @@ -6133,7 +6133,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "41100FFF", @@ -6146,7 +6146,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31000008071", @@ -6159,7 +6159,7 @@ fn test_s390x_binemit() { base: zero_reg(), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3100FFF7F71", @@ -6172,7 +6172,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "41102000", @@ -6185,7 +6185,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "41102FFF", @@ -6198,7 +6198,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020008071", @@ -6211,7 +6211,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F71", @@ -6224,7 +6224,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "41123000", @@ -6237,7 +6237,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "41123FFF", @@ -6250,7 +6250,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31230008071", @@ -6263,7 +6263,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3123FFF7F71", @@ -6285,7 +6285,7 @@ fn test_s390x_binemit() { mem: MemArg::Symbol { name: Box::new(ExternalName::testcase("test0")), offset: 64, - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "C01000000000", @@ -6298,7 +6298,7 @@ fn test_s390x_binemit() { mem: MemArg::RegOffset { reg: gpr(2), off: 0, - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "41102000", @@ -6310,7 +6310,7 @@ fn test_s390x_binemit() { mem: MemArg::RegOffset { reg: gpr(2), off: 4095, - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "41102FFF", @@ -6322,7 +6322,7 @@ fn test_s390x_binemit() { mem: MemArg::RegOffset { reg: gpr(2), off: -524288, - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E31020008071", @@ -6334,7 +6334,7 @@ fn test_s390x_binemit() { mem: MemArg::RegOffset { reg: gpr(2), off: 524287, - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E3102FFF7F71", @@ -6346,7 +6346,7 @@ fn test_s390x_binemit() { mem: MemArg::RegOffset { reg: gpr(2), off: -2147483648, - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "C0118000000041112000", @@ -6358,7 +6358,7 @@ fn test_s390x_binemit() { mem: MemArg::RegOffset { reg: gpr(2), off: 2147483647, - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "C0117FFFFFFF41112000", @@ -6932,7 +6932,7 @@ fn test_s390x_binemit() { base: gpr(6), index: zero_reg(), disp: UImm12::maybe_from_u64(0).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, ], @@ -10750,7 +10750,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E71020000806", @@ -10763,7 +10763,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E7102FFF0806", @@ -10776,7 +10776,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E71230000806", @@ -10789,7 +10789,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E61020004806", @@ -10802,7 +10802,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6102FFF4806", @@ -10815,7 +10815,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E61230004806", @@ -10828,7 +10828,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E61020001806", @@ -10841,7 +10841,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6102FFF1806", @@ -10854,7 +10854,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E61230001806", @@ -10867,7 +10867,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E61020002806", @@ -10880,7 +10880,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6102FFF2806", @@ -10893,7 +10893,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E61230002806", @@ -10906,7 +10906,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E61020003806", @@ -10919,7 +10919,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6102FFF3806", @@ -10932,7 +10932,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E61230003806", @@ -10945,7 +10945,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E61020001807", @@ -10958,7 +10958,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6102FFF1807", @@ -10971,7 +10971,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E61230001807", @@ -10984,7 +10984,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E61020002807", @@ -10997,7 +10997,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6102FFF2807", @@ -11010,7 +11010,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E61230002807", @@ -11023,7 +11023,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E61020003807", @@ -11036,7 +11036,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6102FFF3807", @@ -11049,7 +11049,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E61230003807", @@ -11062,7 +11062,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E7102000080E", @@ -11075,7 +11075,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E7102FFF080E", @@ -11088,7 +11088,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E7123000080E", @@ -11101,7 +11101,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6102000480E", @@ -11114,7 +11114,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6102FFF480E", @@ -11127,7 +11127,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6123000480E", @@ -11140,7 +11140,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6102000180E", @@ -11153,7 +11153,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6102FFF180E", @@ -11166,7 +11166,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6123000180E", @@ -11179,7 +11179,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6102000280E", @@ -11192,7 +11192,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6102FFF280E", @@ -11205,7 +11205,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6123000280E", @@ -11218,7 +11218,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6102000380E", @@ -11231,7 +11231,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6102FFF380E", @@ -11244,7 +11244,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6123000380E", @@ -11257,7 +11257,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6102000180F", @@ -11270,7 +11270,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6102FFF180F", @@ -11283,7 +11283,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6123000180F", @@ -11296,7 +11296,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6102000280F", @@ -11309,7 +11309,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6102FFF280F", @@ -11322,7 +11322,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6123000280F", @@ -11335,7 +11335,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6102000380F", @@ -11348,7 +11348,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6102FFF380F", @@ -11361,7 +11361,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E6123000380F", @@ -11375,7 +11375,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(128).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E71020800805", @@ -11389,7 +11389,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(128).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E71020801805", @@ -11403,7 +11403,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(128).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E71020802805", @@ -11417,7 +11417,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(128).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E71020803805", @@ -11431,7 +11431,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(128).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E61020801805", @@ -11445,7 +11445,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(128).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E61020802805", @@ -11459,7 +11459,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(128).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, }, "E61020803805", @@ -11588,7 +11588,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 15, }, @@ -11604,7 +11604,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -11620,7 +11620,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 15, }, @@ -11636,7 +11636,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -11652,7 +11652,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 7, }, @@ -11668,7 +11668,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -11684,7 +11684,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 7, }, @@ -11700,7 +11700,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -11716,7 +11716,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 3, }, @@ -11732,7 +11732,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -11748,7 +11748,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 3, }, @@ -11764,7 +11764,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -11780,7 +11780,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 1, }, @@ -11796,7 +11796,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -11812,7 +11812,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 1, }, @@ -11828,7 +11828,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -11843,7 +11843,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -11858,7 +11858,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -11873,7 +11873,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -11888,7 +11888,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -11903,7 +11903,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -11918,7 +11918,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -11933,7 +11933,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -11948,7 +11948,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -11963,7 +11963,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -11978,7 +11978,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -11993,7 +11993,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12008,7 +12008,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12023,7 +12023,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12038,7 +12038,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12053,7 +12053,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12068,7 +12068,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12083,7 +12083,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12098,7 +12098,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12113,7 +12113,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12128,7 +12128,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12143,7 +12143,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12158,7 +12158,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12173,7 +12173,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12188,7 +12188,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12203,7 +12203,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 15, }, @@ -12218,7 +12218,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12233,7 +12233,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 15, }, @@ -12248,7 +12248,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12263,7 +12263,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 7, }, @@ -12278,7 +12278,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12293,7 +12293,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 7, }, @@ -12308,7 +12308,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12323,7 +12323,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12338,7 +12338,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12353,7 +12353,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12368,7 +12368,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12383,7 +12383,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12398,7 +12398,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12413,7 +12413,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12428,7 +12428,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12443,7 +12443,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12458,7 +12458,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12473,7 +12473,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12488,7 +12488,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12503,7 +12503,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12518,7 +12518,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12533,7 +12533,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12548,7 +12548,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12563,7 +12563,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12578,7 +12578,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12593,7 +12593,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12608,7 +12608,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12623,7 +12623,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12638,7 +12638,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12653,7 +12653,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12668,7 +12668,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12684,7 +12684,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12700,7 +12700,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12716,7 +12716,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12732,7 +12732,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12748,7 +12748,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12764,7 +12764,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12780,7 +12780,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12796,7 +12796,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12812,7 +12812,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12828,7 +12828,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12844,7 +12844,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12860,7 +12860,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12875,7 +12875,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12890,7 +12890,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12905,7 +12905,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12920,7 +12920,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12935,7 +12935,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12950,7 +12950,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12965,7 +12965,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12980,7 +12980,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -12995,7 +12995,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13010,7 +13010,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13025,7 +13025,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13040,7 +13040,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13055,7 +13055,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13070,7 +13070,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13085,7 +13085,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13100,7 +13100,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13115,7 +13115,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 7, }, @@ -13130,7 +13130,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13145,7 +13145,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 7, }, @@ -13160,7 +13160,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13175,7 +13175,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13190,7 +13190,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13205,7 +13205,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13220,7 +13220,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13235,7 +13235,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13250,7 +13250,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13265,7 +13265,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13280,7 +13280,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13295,7 +13295,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13310,7 +13310,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13325,7 +13325,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13340,7 +13340,7 @@ fn test_s390x_binemit() { base: gpr(2), index: zero_reg(), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13355,7 +13355,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::zero(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13370,7 +13370,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: UImm12::maybe_from_u64(4095).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13385,7 +13385,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(-524288).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, @@ -13400,7 +13400,7 @@ fn test_s390x_binemit() { base: gpr(3), index: gpr(2), disp: SImm20::maybe_from_i64(524287).unwrap(), - flags: MemFlagsData::trusted(), + flags: MachMemFlags::trusted(), }, lane_imm: 0, }, diff --git a/cranelift/codegen/src/isa/s390x/inst/mod.rs b/cranelift/codegen/src/isa/s390x/inst/mod.rs index 92240788035b..a201bbdd3efb 100644 --- a/cranelift/codegen/src/isa/s390x/inst/mod.rs +++ b/cranelift/codegen/src/isa/s390x/inst/mod.rs @@ -3553,7 +3553,7 @@ impl Inst { base, index, disp: offset, - flags, + flags: flags.into(), }; let mem = mem.pretty_print_default(); format!("{op} {rd}, {mem}") @@ -3578,7 +3578,7 @@ impl Inst { base, index, disp: offset, - flags, + flags: flags.into(), }; let mem = mem.pretty_print_default(); format!("{op} {rd}, {mem}") diff --git a/cranelift/codegen/src/isa/s390x/lower.isle b/cranelift/codegen/src/isa/s390x/lower.isle index 75b096fb05cf..560ed86ddca9 100644 --- a/cranelift/codegen/src/isa/s390x/lower.isle +++ b/cranelift/codegen/src/isa/s390x/lower.isle @@ -2303,7 +2303,7 @@ ;; be optimized further, but we don't bother at the moment since due to our ;; choice of lane order depending on the current function ABI, this case will ;; currently never arise in practice. -(rule 4 (lower (bitcast (vr128_ty out_ty) flags x @ (value_type (vr128_ty in_ty)))) +(rule 4 (lower (bitcast (vr128_ty out_ty) (mem_flags_data flags) x @ (value_type (vr128_ty in_ty)))) (abi_vec_elt_rev (lane_order_from_memflags flags) out_ty (abi_vec_elt_rev (lane_order_from_memflags flags) in_ty x))) @@ -2443,14 +2443,14 @@ (vec_replicate_lane ty x (be_lane_idx ty idx))) ;; Extract vector lane and store to big-endian memory. -(rule 6 (lower (store flags @ (bigendian) +(rule 6 (lower (store (mem_flags_data flags @ (bigendian)) (extractlane _ x @ (value_type ty) (u8_from_uimm8 idx)) addr offset)) (side_effect (vec_store_lane ty x (lower_address flags addr offset) (be_lane_idx ty idx)))) ;; Extract vector lane and store to little-endian memory. -(rule 5 (lower (store flags @ (littleendian) +(rule 5 (lower (store (mem_flags_data flags @ (littleendian)) (extractlane _ x @ (value_type ty) (u8_from_uimm8 idx)) addr offset)) (side_effect (vec_store_lane_little ty x @@ -2848,74 +2848,74 @@ ;;;; Rules for `load` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; Load 8-bit integers. -(rule (lower (load $I8 flags addr offset)) +(rule (lower (load $I8 (mem_flags_data flags) addr offset)) (zext32_mem $I8 (lower_address flags addr offset))) ;; Load 16-bit big-endian integers. -(rule (lower (load $I16 flags @ (bigendian) addr offset)) +(rule (lower (load $I16 (mem_flags_data flags @ (bigendian)) addr offset)) (zext32_mem $I16 (lower_address flags addr offset))) ;; Load 16-bit little-endian integers. -(rule -1 (lower (load $I16 flags @ (littleendian) addr offset)) +(rule -1 (lower (load $I16 (mem_flags_data flags @ (littleendian)) addr offset)) (loadrev16 (lower_address flags addr offset))) ;; Load 32-bit big-endian integers. -(rule (lower (load $I32 flags @ (bigendian) addr offset)) +(rule (lower (load $I32 (mem_flags_data flags @ (bigendian)) addr offset)) (load32 (lower_address flags addr offset))) ;; Load 32-bit little-endian integers. -(rule -1 (lower (load $I32 flags @ (littleendian) addr offset)) +(rule -1 (lower (load $I32 (mem_flags_data flags @ (littleendian)) addr offset)) (loadrev32 (lower_address flags addr offset))) ;; Load 64-bit big-endian integers. -(rule (lower (load $I64 flags @ (bigendian) addr offset)) +(rule (lower (load $I64 (mem_flags_data flags @ (bigendian)) addr offset)) (load64 (lower_address flags addr offset))) ;; Load 64-bit little-endian integers. -(rule -1 (lower (load $I64 flags @ (littleendian) addr offset)) +(rule -1 (lower (load $I64 (mem_flags_data flags @ (littleendian)) addr offset)) (loadrev64 (lower_address flags addr offset))) ;; Load 16-bit big-endian floating-point values (as vector lane). -(rule (lower (load $F16 flags @ (bigendian) addr offset)) +(rule (lower (load $F16 (mem_flags_data flags @ (bigendian)) addr offset)) (vec_load_lane_undef $F16X8 (lower_address flags addr offset) 0)) ;; Load 16-bit little-endian floating-point values (as vector lane). -(rule -1 (lower (load $F16 flags @ (littleendian) addr offset)) +(rule -1 (lower (load $F16 (mem_flags_data flags @ (littleendian)) addr offset)) (vec_load_lane_little_undef $F16X8 (lower_address flags addr offset) 0)) ;; Load 32-bit big-endian floating-point values (as vector lane). -(rule (lower (load $F32 flags @ (bigendian) addr offset)) +(rule (lower (load $F32 (mem_flags_data flags @ (bigendian)) addr offset)) (vec_load_lane_undef $F32X4 (lower_address flags addr offset) 0)) ;; Load 32-bit little-endian floating-point values (as vector lane). -(rule -1 (lower (load $F32 flags @ (littleendian) addr offset)) +(rule -1 (lower (load $F32 (mem_flags_data flags @ (littleendian)) addr offset)) (vec_load_lane_little_undef $F32X4 (lower_address flags addr offset) 0)) ;; Load 64-bit big-endian floating-point values (as vector lane). -(rule (lower (load $F64 flags @ (bigendian) addr offset)) +(rule (lower (load $F64 (mem_flags_data flags @ (bigendian)) addr offset)) (vec_load_lane_undef $F64X2 (lower_address flags addr offset) 0)) ;; Load 64-bit little-endian floating-point values (as vector lane). -(rule -1 (lower (load $F64 flags @ (littleendian) addr offset)) +(rule -1 (lower (load $F64 (mem_flags_data flags @ (littleendian)) addr offset)) (vec_load_lane_little_undef $F64X2 (lower_address flags addr offset) 0)) ;; Load 128-bit big-endian vector values, BE lane order - direct load. -(rule 4 (lower (load (vr128_ty ty) flags @ (bigendian) addr offset)) +(rule 4 (lower (load (vr128_ty ty) (mem_flags_data flags @ (bigendian)) addr offset)) (if-let (LaneOrder.BigEndian) (lane_order)) (vec_load ty (lower_address flags addr offset))) ;; Load 128-bit little-endian vector values, BE lane order - byte-reversed load. -(rule 3 (lower (load (vr128_ty ty) flags @ (littleendian) addr offset)) +(rule 3 (lower (load (vr128_ty ty) (mem_flags_data flags @ (littleendian)) addr offset)) (if-let (LaneOrder.BigEndian) (lane_order)) (vec_load_byte_rev ty flags addr offset)) ;; Load 128-bit big-endian vector values, LE lane order - element-reversed load. -(rule 2 (lower (load (vr128_ty ty) flags @ (bigendian) addr offset)) +(rule 2 (lower (load (vr128_ty ty) (mem_flags_data flags @ (bigendian)) addr offset)) (if-let (LaneOrder.LittleEndian) (lane_order)) (vec_load_elt_rev ty flags addr offset)) ;; Load 128-bit little-endian vector values, LE lane order - fully-reversed load. -(rule 1 (lower (load (vr128_ty ty) flags @ (littleendian) addr offset)) +(rule 1 (lower (load (vr128_ty ty) (mem_flags_data flags @ (littleendian)) addr offset)) (if-let (LaneOrder.LittleEndian) (lane_order)) (vec_load_full_rev ty flags addr offset)) @@ -3018,42 +3018,42 @@ ;;;; Rules for `uload8` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; 16- or 32-bit target types. -(rule (lower (uload8 (gpr32_ty _ty) flags addr offset)) +(rule (lower (uload8 (gpr32_ty _ty) (mem_flags_data flags) addr offset)) (zext32_mem $I8 (lower_address flags addr offset))) ;; 64-bit target types. -(rule 1 (lower (uload8 (gpr64_ty _ty) flags addr offset)) +(rule 1 (lower (uload8 (gpr64_ty _ty) (mem_flags_data flags) addr offset)) (zext64_mem $I8 (lower_address flags addr offset))) ;;;; Rules for `sload8` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; 16- or 32-bit target types. -(rule (lower (sload8 (gpr32_ty _ty) flags addr offset)) +(rule (lower (sload8 (gpr32_ty _ty) (mem_flags_data flags) addr offset)) (sext32_mem $I8 (lower_address flags addr offset))) ;; 64-bit target types. -(rule 1 (lower (sload8 (gpr64_ty _ty) flags addr offset)) +(rule 1 (lower (sload8 (gpr64_ty _ty) (mem_flags_data flags) addr offset)) (sext64_mem $I8 (lower_address flags addr offset))) ;;;; Rules for `uload16` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; 32-bit target type, big-endian source value. -(rule 3 (lower (uload16 (gpr32_ty _ty) flags @ (bigendian) addr offset)) +(rule 3 (lower (uload16 (gpr32_ty _ty) (mem_flags_data flags @ (bigendian)) addr offset)) (zext32_mem $I16 (lower_address flags addr offset))) ;; 32-bit target type, little-endian source value (via explicit extension). -(rule 1 (lower (uload16 (gpr32_ty _ty) flags @ (littleendian) addr offset)) +(rule 1 (lower (uload16 (gpr32_ty _ty) (mem_flags_data flags @ (littleendian)) addr offset)) (let ((reg16 Reg (loadrev16 (lower_address flags addr offset)))) (zext32_reg $I16 reg16))) ;; 64-bit target type, big-endian source value. -(rule 4 (lower (uload16 (gpr64_ty _ty) flags @ (bigendian) addr offset)) +(rule 4 (lower (uload16 (gpr64_ty _ty) (mem_flags_data flags @ (bigendian)) addr offset)) (zext64_mem $I16 (lower_address flags addr offset))) ;; 64-bit target type, little-endian source value (via explicit extension). -(rule 2 (lower (uload16 (gpr64_ty _ty) flags @ (littleendian) addr offset)) +(rule 2 (lower (uload16 (gpr64_ty _ty) (mem_flags_data flags @ (littleendian)) addr offset)) (let ((reg16 Reg (loadrev16 (lower_address flags addr offset)))) (zext64_reg $I16 reg16))) @@ -3061,20 +3061,20 @@ ;;;; Rules for `sload16` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; 32-bit target type, big-endian source value. -(rule 2 (lower (sload16 (gpr32_ty _ty) flags @ (bigendian) addr offset)) +(rule 2 (lower (sload16 (gpr32_ty _ty) (mem_flags_data flags @ (bigendian)) addr offset)) (sext32_mem $I16 (lower_address flags addr offset))) ;; 32-bit target type, little-endian source value (via explicit extension). -(rule 0 (lower (sload16 (gpr32_ty _ty) flags @ (littleendian) addr offset)) +(rule 0 (lower (sload16 (gpr32_ty _ty) (mem_flags_data flags @ (littleendian)) addr offset)) (let ((reg16 Reg (loadrev16 (lower_address flags addr offset)))) (sext32_reg $I16 reg16))) ;; 64-bit target type, big-endian source value. -(rule 3 (lower (sload16 (gpr64_ty _ty) flags @ (bigendian) addr offset)) +(rule 3 (lower (sload16 (gpr64_ty _ty) (mem_flags_data flags @ (bigendian)) addr offset)) (sext64_mem $I16 (lower_address flags addr offset))) ;; 64-bit target type, little-endian source value (via explicit extension). -(rule 1 (lower (sload16 (gpr64_ty _ty) flags @ (littleendian) addr offset)) +(rule 1 (lower (sload16 (gpr64_ty _ty) (mem_flags_data flags @ (littleendian)) addr offset)) (let ((reg16 Reg (loadrev16 (lower_address flags addr offset)))) (sext64_reg $I16 reg16))) @@ -3082,11 +3082,11 @@ ;;;; Rules for `uload32` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; 64-bit target type, big-endian source value. -(rule 1 (lower (uload32 (gpr64_ty _ty) flags @ (bigendian) addr offset)) +(rule 1 (lower (uload32 (gpr64_ty _ty) (mem_flags_data flags @ (bigendian)) addr offset)) (zext64_mem $I32 (lower_address flags addr offset))) ;; 64-bit target type, little-endian source value (via explicit extension). -(rule (lower (uload32 (gpr64_ty _ty) flags @ (littleendian) addr offset)) +(rule (lower (uload32 (gpr64_ty _ty) (mem_flags_data flags @ (littleendian)) addr offset)) (let ((reg32 Reg (loadrev32 (lower_address flags addr offset)))) (zext64_reg $I32 reg32))) @@ -3094,11 +3094,11 @@ ;;;; Rules for `sload32` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; 64-bit target type, big-endian source value. -(rule 1 (lower (sload32 (gpr64_ty _ty) flags @ (bigendian) addr offset)) +(rule 1 (lower (sload32 (gpr64_ty _ty) (mem_flags_data flags @ (bigendian)) addr offset)) (sext64_mem $I32 (lower_address flags addr offset))) ;; 64-bit target type, little-endian source value (via explicit extension). -(rule (lower (sload32 (gpr64_ty _ty) flags @ (littleendian) addr offset)) +(rule (lower (sload32 (gpr64_ty _ty) (mem_flags_data flags @ (littleendian)) addr offset)) (let ((reg32 Reg (loadrev32 (lower_address flags addr offset)))) (sext64_reg $I32 reg32))) @@ -3106,27 +3106,27 @@ ;;;; Rules for `uloadNxM` and `sloadNxM` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; Unsigned 8->16 bit extension. -(rule (lower (uload8x8 $I16X8 flags addr offset)) +(rule (lower (uload8x8 $I16X8 (mem_flags_data flags) addr offset)) (vec_unpacku_high $I8X16 (load_v64 $I8X16 flags addr offset))) ;; Signed 8->16 bit extension. -(rule (lower (sload8x8 $I16X8 flags addr offset)) +(rule (lower (sload8x8 $I16X8 (mem_flags_data flags) addr offset)) (vec_unpacks_high $I8X16 (load_v64 $I8X16 flags addr offset))) ;; Unsigned 16->32 bit extension. -(rule (lower (uload16x4 $I32X4 flags addr offset)) +(rule (lower (uload16x4 $I32X4 (mem_flags_data flags) addr offset)) (vec_unpacku_high $I16X8 (load_v64 $I16X8 flags addr offset))) ;; Signed 16->32 bit extension. -(rule (lower (sload16x4 $I32X4 flags addr offset)) +(rule (lower (sload16x4 $I32X4 (mem_flags_data flags) addr offset)) (vec_unpacks_high $I16X8 (load_v64 $I16X8 flags addr offset))) ;; Unsigned 32->64 bit extension. -(rule (lower (uload32x2 $I64X2 flags addr offset)) +(rule (lower (uload32x2 $I64X2 (mem_flags_data flags) addr offset)) (vec_unpacku_high $I32X4 (load_v64 $I32X4 flags addr offset))) ;; Signed 32->64 bit extension. -(rule (lower (sload32x2 $I64X2 flags addr offset)) +(rule (lower (sload32x2 $I64X2 (mem_flags_data flags) addr offset)) (vec_unpacks_high $I32X4 (load_v64 $I32X4 flags addr offset))) @@ -3184,77 +3184,77 @@ ;; `istoreNN`, and `atomic_store` instructions, so we share common helpers. ;; Store 8-bit integer type, main lowering entry point. -(rule (lower (store flags val @ (value_type $I8) addr offset)) +(rule (lower (store (mem_flags_data flags) val @ (value_type $I8) addr offset)) (side_effect (istore8_impl flags val addr offset))) ;; Store 16-bit integer type, main lowering entry point. -(rule (lower (store flags val @ (value_type $I16) addr offset)) +(rule (lower (store (mem_flags_data flags) val @ (value_type $I16) addr offset)) (side_effect (istore16_impl flags val addr offset))) ;; Store 32-bit integer type, main lowering entry point. -(rule (lower (store flags val @ (value_type $I32) addr offset)) +(rule (lower (store (mem_flags_data flags) val @ (value_type $I32) addr offset)) (side_effect (istore32_impl flags val addr offset))) ;; Store 64-bit integer type, main lowering entry point. -(rule (lower (store flags val @ (value_type $I64) addr offset)) +(rule (lower (store (mem_flags_data flags) val @ (value_type $I64) addr offset)) (side_effect (istore64_impl flags val addr offset))) ;; Store 16-bit big-endian floating-point type (as vector lane). -(rule -1 (lower (store flags @ (bigendian) +(rule -1 (lower (store (mem_flags_data flags @ (bigendian)) val @ (value_type $F16) addr offset)) (side_effect (vec_store_lane $F16X8 val (lower_address flags addr offset) 0))) ;; Store 16-bit little-endian floating-point type (as vector lane). -(rule (lower (store flags @ (littleendian) +(rule (lower (store (mem_flags_data flags @ (littleendian)) val @ (value_type $F16) addr offset)) (side_effect (vec_store_lane_little $F16X8 val (lower_address flags addr offset) 0))) ;; Store 32-bit big-endian floating-point type (as vector lane). -(rule -1 (lower (store flags @ (bigendian) +(rule -1 (lower (store (mem_flags_data flags @ (bigendian)) val @ (value_type $F32) addr offset)) (side_effect (vec_store_lane $F32X4 val (lower_address flags addr offset) 0))) ;; Store 32-bit little-endian floating-point type (as vector lane). -(rule (lower (store flags @ (littleendian) +(rule (lower (store (mem_flags_data flags @ (littleendian)) val @ (value_type $F32) addr offset)) (side_effect (vec_store_lane_little $F32X4 val (lower_address flags addr offset) 0))) ;; Store 64-bit big-endian floating-point type (as vector lane). -(rule -1 (lower (store flags @ (bigendian) +(rule -1 (lower (store (mem_flags_data flags @ (bigendian)) val @ (value_type $F64) addr offset)) (side_effect (vec_store_lane $F64X2 val (lower_address flags addr offset) 0))) ;; Store 64-bit little-endian floating-point type (as vector lane). -(rule (lower (store flags @ (littleendian) +(rule (lower (store (mem_flags_data flags @ (littleendian)) val @ (value_type $F64) addr offset)) (side_effect (vec_store_lane_little $F64X2 val (lower_address flags addr offset) 0))) ;; Store 128-bit big-endian vector type, BE lane order - direct store. -(rule 4 (lower (store flags @ (bigendian) +(rule 4 (lower (store (mem_flags_data flags @ (bigendian)) val @ (value_type (vr128_ty ty)) addr offset)) (if-let (LaneOrder.BigEndian) (lane_order)) (side_effect (vec_store val (lower_address flags addr offset)))) ;; Store 128-bit little-endian vector type, BE lane order - byte-reversed store. -(rule 3 (lower (store flags @ (littleendian) +(rule 3 (lower (store (mem_flags_data flags @ (littleendian)) val @ (value_type (vr128_ty ty)) addr offset)) (if-let (LaneOrder.BigEndian) (lane_order)) (side_effect (vec_store_byte_rev ty val flags addr offset))) ;; Store 128-bit big-endian vector type, LE lane order - element-reversed store. -(rule 2 (lower (store flags @ (bigendian) +(rule 2 (lower (store (mem_flags_data flags @ (bigendian)) val @ (value_type (vr128_ty ty)) addr offset)) (if-let (LaneOrder.LittleEndian) (lane_order)) (side_effect (vec_store_elt_rev ty val flags addr offset))) ;; Store 128-bit little-endian vector type, LE lane order - fully-reversed store. -(rule 1 (lower (store flags @ (littleendian) +(rule 1 (lower (store (mem_flags_data flags @ (littleendian)) val @ (value_type (vr128_ty ty)) addr offset)) (if-let (LaneOrder.LittleEndian) (lane_order)) (side_effect (vec_store_full_rev ty val flags addr offset))) @@ -3358,7 +3358,7 @@ ;;;; Rules for 8-bit integer stores ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; Main `istore8` lowering entry point, dispatching to the helper. -(rule (lower (istore8 flags val addr offset)) +(rule (lower (istore8 (mem_flags_data flags) val addr offset)) (side_effect (istore8_impl flags val addr offset))) ;; Helper to store 8-bit integer types. @@ -3376,7 +3376,7 @@ ;;;; Rules for 16-bit integer stores ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; Main `istore16` lowering entry point, dispatching to the helper. -(rule (lower (istore16 flags val addr offset)) +(rule (lower (istore16 (mem_flags_data flags) val addr offset)) (side_effect (istore16_impl flags val addr offset))) ;; Helper to store 16-bit integer types. @@ -3402,7 +3402,7 @@ ;;;; Rules for 32-bit integer stores ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; Main `istore32` lowering entry point, dispatching to the helper. -(rule (lower (istore32 flags val addr offset)) +(rule (lower (istore32 (mem_flags_data flags) val addr offset)) (side_effect (istore32_impl flags val addr offset))) ;; Helper to store 32-bit integer types. @@ -3444,42 +3444,42 @@ ;; Atomic operations that do not require a compare-and-swap loop. ;; Atomic AND for 32/64-bit big-endian types, using a single instruction. -(rule 1 (lower (atomic_rmw (ty_32_or_64 ty) flags @ (bigendian) (AtomicRmwOp.And) addr src)) +(rule 1 (lower (atomic_rmw (ty_32_or_64 ty) (mem_flags_data flags @ (bigendian)) (AtomicRmwOp.And) addr src)) (atomic_rmw_and ty (put_in_reg src) (lower_address flags addr (zero_offset)))) ;; Atomic AND for 32/64-bit big-endian types, using byte-swapped input/output. -(rule (lower (atomic_rmw (ty_32_or_64 ty) flags @ (littleendian) (AtomicRmwOp.And) addr src)) +(rule (lower (atomic_rmw (ty_32_or_64 ty) (mem_flags_data flags @ (littleendian)) (AtomicRmwOp.And) addr src)) (bswap_reg ty (atomic_rmw_and ty (bswap_reg ty (put_in_reg src)) (lower_address flags addr (zero_offset))))) ;; Atomic OR for 32/64-bit big-endian types, using a single instruction. -(rule 1 (lower (atomic_rmw (ty_32_or_64 ty) flags @ (bigendian) (AtomicRmwOp.Or) addr src)) +(rule 1 (lower (atomic_rmw (ty_32_or_64 ty) (mem_flags_data flags @ (bigendian)) (AtomicRmwOp.Or) addr src)) (atomic_rmw_or ty (put_in_reg src) (lower_address flags addr (zero_offset)))) ;; Atomic OR for 32/64-bit little-endian types, using byte-swapped input/output. -(rule (lower (atomic_rmw (ty_32_or_64 ty) flags @ (littleendian) (AtomicRmwOp.Or) addr src)) +(rule (lower (atomic_rmw (ty_32_or_64 ty) (mem_flags_data flags @ (littleendian)) (AtomicRmwOp.Or) addr src)) (bswap_reg ty (atomic_rmw_or ty (bswap_reg ty (put_in_reg src)) (lower_address flags addr (zero_offset))))) ;; Atomic XOR for 32/64-bit big-endian types, using a single instruction. -(rule 1 (lower (atomic_rmw (ty_32_or_64 ty) flags @ (bigendian) (AtomicRmwOp.Xor) addr src)) +(rule 1 (lower (atomic_rmw (ty_32_or_64 ty) (mem_flags_data flags @ (bigendian)) (AtomicRmwOp.Xor) addr src)) (atomic_rmw_xor ty (put_in_reg src) (lower_address flags addr (zero_offset)))) ;; Atomic XOR for 32/64-bit little-endian types, using byte-swapped input/output. -(rule (lower (atomic_rmw (ty_32_or_64 ty) flags @ (littleendian) (AtomicRmwOp.Xor) addr src)) +(rule (lower (atomic_rmw (ty_32_or_64 ty) (mem_flags_data flags @ (littleendian)) (AtomicRmwOp.Xor) addr src)) (bswap_reg ty (atomic_rmw_xor ty (bswap_reg ty (put_in_reg src)) (lower_address flags addr (zero_offset))))) ;; Atomic ADD for 32/64-bit big-endian types, using a single instruction. -(rule (lower (atomic_rmw (ty_32_or_64 ty) flags @ (bigendian) (AtomicRmwOp.Add) addr src)) +(rule (lower (atomic_rmw (ty_32_or_64 ty) (mem_flags_data flags @ (bigendian)) (AtomicRmwOp.Add) addr src)) (atomic_rmw_add ty (put_in_reg src) (lower_address flags addr (zero_offset)))) ;; Atomic SUB for 32/64-bit big-endian types, using atomic ADD with negated input. -(rule (lower (atomic_rmw (ty_32_or_64 ty) flags @ (bigendian) (AtomicRmwOp.Sub) addr src)) +(rule (lower (atomic_rmw (ty_32_or_64 ty) (mem_flags_data flags @ (bigendian)) (AtomicRmwOp.Sub) addr src)) (atomic_rmw_add ty (neg_reg ty (put_in_reg src)) (lower_address flags addr (zero_offset)))) @@ -3487,7 +3487,7 @@ ;; Atomic operations that require a compare-and-swap loop. ;; Operations for 32/64-bit types can use a fullword compare-and-swap loop. -(rule -1 (lower (atomic_rmw (ty_32_or_64 ty) flags op addr src)) +(rule -1 (lower (atomic_rmw (ty_32_or_64 ty) (mem_flags_data flags) op addr src)) (let ((src_reg Reg (put_in_reg src)) (addr_reg Reg (put_in_reg addr)) ;; Create body of compare-and-swap loop. @@ -3499,7 +3499,7 @@ (casloop ib ty flags addr_reg val1))) ;; Operations for 8/16-bit types must operate on the surrounding aligned word. -(rule -2 (lower (atomic_rmw (ty_8_or_16 ty) flags op addr src)) +(rule -2 (lower (atomic_rmw (ty_8_or_16 ty) (mem_flags_data flags) op addr src)) (let ((src_reg Reg (put_in_reg src)) (addr_reg Reg (put_in_reg addr)) ;; Prepare access to surrounding aligned word. @@ -3696,19 +3696,19 @@ ;;;; Rules for `atomic_cas` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; 32/64-bit big-endian atomic compare-and-swap instruction. -(rule 2 (lower (atomic_cas (ty_32_or_64 ty) flags @ (bigendian) addr src1 src2)) +(rule 2 (lower (atomic_cas (ty_32_or_64 ty) (mem_flags_data flags @ (bigendian)) addr src1 src2)) (atomic_cas_impl ty (put_in_reg src1) (put_in_reg src2) (lower_address flags addr (zero_offset)))) ;; 32/64-bit little-endian atomic compare-and-swap instruction. ;; Implemented by byte-swapping old/new inputs and the output. -(rule 1 (lower (atomic_cas (ty_32_or_64 ty) flags @ (littleendian) addr src1 src2)) +(rule 1 (lower (atomic_cas (ty_32_or_64 ty) (mem_flags_data flags @ (littleendian)) addr src1 src2)) (bswap_reg ty (atomic_cas_impl ty (bswap_reg ty (put_in_reg src1)) (bswap_reg ty (put_in_reg src2)) (lower_address flags addr (zero_offset))))) ;; 8/16-bit atomic compare-and-swap implemented via loop. -(rule (lower (atomic_cas (ty_8_or_16 ty) flags addr src1 src2)) +(rule (lower (atomic_cas (ty_8_or_16 ty) (mem_flags_data flags) addr src1 src2)) (let ((src1_reg Reg (put_in_reg src1)) (src2_reg Reg (put_in_reg src2)) (addr_reg Reg (put_in_reg addr)) @@ -3765,31 +3765,31 @@ ;; Atomic loads can be implemented via regular loads on this platform. ;; 8-bit atomic load. -(rule (lower (atomic_load $I8 flags addr)) +(rule (lower (atomic_load $I8 (mem_flags_data flags) addr)) (zext32_mem $I8 (lower_address flags addr (zero_offset)))) ;; 16-bit big-endian atomic load. -(rule 1 (lower (atomic_load $I16 flags @ (bigendian) addr)) +(rule 1 (lower (atomic_load $I16 (mem_flags_data flags @ (bigendian)) addr)) (zext32_mem $I16 (lower_address flags addr (zero_offset)))) ;; 16-bit little-endian atomic load. -(rule (lower (atomic_load $I16 flags @ (littleendian) addr)) +(rule (lower (atomic_load $I16 (mem_flags_data flags @ (littleendian)) addr)) (loadrev16 (lower_address flags addr (zero_offset)))) ;; 32-bit big-endian atomic load. -(rule 1 (lower (atomic_load $I32 flags @ (bigendian) addr)) +(rule 1 (lower (atomic_load $I32 (mem_flags_data flags @ (bigendian)) addr)) (load32 (lower_address flags addr (zero_offset)))) ;; 32-bit little-endian atomic load. -(rule (lower (atomic_load $I32 flags @ (littleendian) addr)) +(rule (lower (atomic_load $I32 (mem_flags_data flags @ (littleendian)) addr)) (loadrev32 (lower_address flags addr (zero_offset)))) ;; 64-bit big-endian atomic load. -(rule 1 (lower (atomic_load $I64 flags @ (bigendian) addr)) +(rule 1 (lower (atomic_load $I64 (mem_flags_data flags @ (bigendian)) addr)) (load64 (lower_address flags addr (zero_offset)))) ;; 64-bit little-endian atomic load. -(rule (lower (atomic_load $I64 flags @ (littleendian) addr)) +(rule (lower (atomic_load $I64 (mem_flags_data flags @ (littleendian)) addr)) (loadrev64 (lower_address flags addr (zero_offset)))) @@ -3802,19 +3802,19 @@ (side_effect (fence_impl)))) ;; 8-bit atomic store. -(rule (lower (atomic_store flags val @ (value_type $I8) addr)) +(rule (lower (atomic_store (mem_flags_data flags) val @ (value_type $I8) addr)) (atomic_store_impl (istore8_impl flags val addr (zero_offset)))) ;; 16-bit atomic store. -(rule (lower (atomic_store flags val @ (value_type $I16) addr)) +(rule (lower (atomic_store (mem_flags_data flags) val @ (value_type $I16) addr)) (atomic_store_impl (istore16_impl flags val addr (zero_offset)))) ;; 32-bit atomic store. -(rule (lower (atomic_store flags val @ (value_type $I32) addr)) +(rule (lower (atomic_store (mem_flags_data flags) val @ (value_type $I32) addr)) (atomic_store_impl (istore32_impl flags val addr (zero_offset)))) ;; 64-bit atomic store. -(rule (lower (atomic_store flags val @ (value_type $I64) addr)) +(rule (lower (atomic_store (mem_flags_data flags) val @ (value_type $I64) addr)) (atomic_store_impl (istore64_impl flags val addr (zero_offset)))) diff --git a/cranelift/codegen/src/isa/s390x/lower/isle.rs b/cranelift/codegen/src/isa/s390x/lower/isle.rs index a19a0f1de6ac..619c0a83fb21 100644 --- a/cranelift/codegen/src/isa/s390x/lower/isle.rs +++ b/cranelift/codegen/src/isa/s390x/lower/isle.rs @@ -688,7 +688,7 @@ impl generated_code::Context for IsleContext<'_, '_, MInst, S390xBackend> { base: x, index: y, disp: UImm12::maybe_from_u64(bias as u64).unwrap(), - flags, + flags: flags.into(), } } @@ -705,14 +705,14 @@ impl generated_code::Context for IsleContext<'_, '_, MInst, S390xBackend> { base: x, index: y, disp: imm, - flags, + flags: flags.into(), } } else { MemArg::BXD20 { base: x, index: y, disp: *offset, - flags, + flags: flags.into(), } } } @@ -727,7 +727,7 @@ impl generated_code::Context for IsleContext<'_, '_, MInst, S390xBackend> { MemArg::Symbol { name: Box::new(name), offset, - flags, + flags: flags.into(), } } @@ -736,7 +736,7 @@ impl generated_code::Context for IsleContext<'_, '_, MInst, S390xBackend> { MemArg::Symbol { name: Box::new(ExternalName::KnownSymbol(KnownSymbol::ElfGlobalOffsetTable)), offset: 0, - flags: MemFlagsData::trusted(), + flags: MemFlagsData::trusted().into(), } } diff --git a/cranelift/codegen/src/isa/x64/abi.rs b/cranelift/codegen/src/isa/x64/abi.rs index 3dd4c90488d7..7961044fb117 100644 --- a/cranelift/codegen/src/isa/x64/abi.rs +++ b/cranelift/codegen/src/isa/x64/abi.rs @@ -1,7 +1,8 @@ //! Implementation of the standard x64 ABI. use crate::CodegenResult; -use crate::ir::{self, LibCall, MemFlagsData, Signature, TrapCode, types}; +use crate::ir::MemFlagsData; +use crate::ir::{self, LibCall, Signature, TrapCode, types}; use crate::ir::{ExternalName, types::*}; use crate::isa; use crate::isa::winch; diff --git a/cranelift/codegen/src/isa/x64/lower.isle b/cranelift/codegen/src/isa/x64/lower.isle index 1a9d4b569233..cc91a0ab79f5 100644 --- a/cranelift/codegen/src/isa/x64/lower.isle +++ b/cranelift/codegen/src/isa/x64/lower.isle @@ -64,7 +64,7 @@ ;; For more details on this see the `emit.rs` logic to emit ;; `LoadEffectiveAddress`. (rule iadd_base_case_32_or_64_lea -5 (lower (has_type (ty_32_or_64 ty) (iadd _ x y))) - (x64_lea ty (to_amode_add (mem_flags_trusted) x y (zero_offset)))) + (x64_lea ty (to_amode_add (mem_flags_trusted_data) x y (zero_offset)))) ;; Higher-priority cases than the previous two where a load can be sunk into ;; the add instruction itself. Note that both operands are tested for @@ -663,7 +663,7 @@ base_mask_addr mask_offset 0 - (mem_flags_trusted)))) + (mem_flags_trusted_data)))) (rule (ishl_i8x16_mask (RegMemImm.Mem amt)) (ishl_i8x16_mask (RegMemImm.Reg (x64_movq_rm amt)))) @@ -767,7 +767,7 @@ base_mask_addr mask_offset 0 - (mem_flags_trusted)))) + (mem_flags_trusted_data)))) (rule (ushr_i8x16_mask (RegMemImm.Mem amt)) (ushr_i8x16_mask (RegMemImm.Reg (x64_movq_rm amt)))) @@ -3302,7 +3302,7 @@ (has_type (ty_32_or_64 ty) (iadd _ (and (sinkable_load sink) - (load _ flags addr offset)) + (load _ (mem_flags_data flags) addr offset)) src2)) addr offset)) @@ -3317,7 +3317,7 @@ (iadd _ src2 (and (sinkable_load sink) - (load _ flags addr offset)))) + (load _ (mem_flags_data flags) addr offset)))) addr offset)) (let ((_ RegMemImm sink)) @@ -3330,7 +3330,7 @@ (has_type (ty_32_or_64 ty) (isub _ (and (sinkable_load sink) - (load _ flags addr offset)) + (load _ (mem_flags_data flags) addr offset)) src2)) addr offset)) @@ -3344,7 +3344,7 @@ (has_type (ty_32_or_64 ty) (band _ (and (sinkable_load sink) - (load _ flags addr offset)) + (load _ (mem_flags_data flags) addr offset)) src2)) addr offset)) @@ -3359,7 +3359,7 @@ (band _ src2 (and (sinkable_load sink) - (load _ flags addr offset)))) + (load _ (mem_flags_data flags) addr offset)))) addr offset)) (let ((_ RegMemImm sink)) @@ -3372,7 +3372,7 @@ (has_type (ty_32_or_64 ty) (bor _ (and (sinkable_load sink) - (load _ flags addr offset)) + (load _ (mem_flags_data flags) addr offset)) src2)) addr offset)) @@ -3387,7 +3387,7 @@ (bor _ src2 (and (sinkable_load sink) - (load _ flags addr offset)))) + (load _ (mem_flags_data flags) addr offset)))) addr offset)) (let ((_ RegMemImm sink)) @@ -3400,7 +3400,7 @@ (has_type (ty_32_or_64 ty) (bxor _ (and (sinkable_load sink) - (load _ flags addr offset)) + (load _ (mem_flags_data flags) addr offset)) src2)) addr offset)) @@ -3415,7 +3415,7 @@ (bxor _ src2 (and (sinkable_load sink) - (load _ flags addr offset)))) + (load _ (mem_flags_data flags) addr offset)))) addr offset)) (let ((_ RegMemImm sink)) @@ -3474,7 +3474,7 @@ (rule (lower (has_type (and (fits_in_64 ty) (ty_int _)) (atomic_cas _ (little_or_native_endian flags) address expected replacement))) (x64_cmpxchg ty expected replacement (to_amode flags address (zero_offset)))) -(rule 1 (lower (has_type $I128 (atomic_cas _ flags address expected replacement))) +(rule 1 (lower (has_type $I128 (atomic_cas _ (mem_flags_data flags) address expected replacement))) (if-let true (has_cmpxchg16b)) (x64_cmpxchg16b expected replacement (to_amode flags address (zero_offset)))) @@ -3641,7 +3641,7 @@ (x64_rsp)) (rule (lower (get_return_address _)) - (x64_movq_rm (Amode.ImmReg 8 (x64_rbp) (mem_flags_trusted)))) + (x64_movq_rm (Amode.ImmReg 8 (x64_rbp) (mem_flags_trusted_data)))) ;; Rules for `jump` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; diff --git a/cranelift/codegen/src/isa/x64/lower.rs b/cranelift/codegen/src/isa/x64/lower.rs index 346ab7558195..28a7f2ac3ebd 100644 --- a/cranelift/codegen/src/isa/x64/lower.rs +++ b/cranelift/codegen/src/isa/x64/lower.rs @@ -289,7 +289,7 @@ fn lower_to_amode(ctx: &mut Lower, spec: InsnInput, offset: i32) -> Amode let final_offset = (offset as i64).wrapping_add(cst as i64); if let Ok(final_offset) = i32::try_from(final_offset) { let base = put_input_in_reg(ctx, add_inputs[1 - input]); - return Amode::imm_reg(final_offset, base).with_flags(flags); + return Amode::imm_reg(final_offset, base).with_flags(flags.into()); } } } @@ -307,11 +307,11 @@ fn lower_to_amode(ctx: &mut Lower, spec: InsnInput, offset: i32) -> Amode Gpr::unwrap_new(index), shift, ) - .with_flags(flags); + .with_flags(flags.into()); } let input = put_input_in_reg(ctx, spec); - Amode::imm_reg(offset, input).with_flags(flags) + Amode::imm_reg(offset, input).with_flags(flags.into()) } //============================================================================= diff --git a/cranelift/codegen/src/isa/x64/lower/isle.rs b/cranelift/codegen/src/isa/x64/lower/isle.rs index ab1fe1dce06d..35124d19137e 100644 --- a/cranelift/codegen/src/isa/x64/lower/isle.rs +++ b/cranelift/codegen/src/isa/x64/lower/isle.rs @@ -11,9 +11,7 @@ use super::{MergeableLoadSize, is_int_or_ref_ty, is_mergeable_load, lower_to_amo use crate::ir::condcodes::{FloatCC, IntCC}; use crate::ir::immediates::*; use crate::ir::types::*; -use crate::ir::{ - BlockCall, Inst, InstructionData, LibCall, MemFlagsData, Opcode, TrapCode, Value, ValueList, -}; +use crate::ir::{BlockCall, Inst, InstructionData, LibCall, Opcode, TrapCode, Value, ValueList}; use crate::isa::x64::X64Backend; use crate::isa::x64::inst::{ReturnCallInfo, args::*, regs}; use crate::isa::x64::lower::{InsnInput, emit_vm_call}; diff --git a/cranelift/codegen/src/isle_prelude.rs b/cranelift/codegen/src/isle_prelude.rs index 864102246fa1..ea5e60745b21 100644 --- a/cranelift/codegen/src/isle_prelude.rs +++ b/cranelift/codegen/src/isle_prelude.rs @@ -819,14 +819,36 @@ macro_rules! isle_common_prelude_methods { } #[inline] - fn mem_flags_trusted(&mut self) -> MemFlagsData { + fn mem_flags_trusted(&mut self) -> MemFlags { + self.dfg() + .mem_flags + .get(MemFlagsData::trusted()) + .expect("trusted MemFlagsData not found in DFG") + } + + #[inline] + fn mem_flags_data(&mut self, flags: MemFlags) -> Option { + Some(self.dfg().mem_flags[flags]) + } + + #[inline] + fn mem_flags_intern(&mut self, data: MemFlagsData) -> MemFlags { + self.dfg() + .mem_flags + .get(data) + .expect("MemFlagsData not found in DFG") + } + + #[inline] + fn mem_flags_trusted_data(&mut self) -> MemFlagsData { MemFlagsData::trusted() } #[inline] - fn little_or_native_endian(&mut self, flags: MemFlagsData) -> Option { - match flags.explicit_endianness() { - Some(crate::ir::Endianness::Little) | None => Some(flags), + fn little_or_native_endian(&mut self, flags: MemFlags) -> Option { + let data = self.dfg().mem_flags[flags]; + match data.explicit_endianness() { + Some(crate::ir::Endianness::Little) | None => Some(data), Some(crate::ir::Endianness::Big) => None, } } diff --git a/cranelift/codegen/src/legalizer/globalvalue.rs b/cranelift/codegen/src/legalizer/globalvalue.rs index 0f9578eab990..bf11d665de91 100644 --- a/cranelift/codegen/src/legalizer/globalvalue.rs +++ b/cranelift/codegen/src/legalizer/globalvalue.rs @@ -34,7 +34,15 @@ pub fn expand_global_value( offset, global_type, flags, - } => load_addr(inst, func, base, offset, global_type, flags, isa), + } => load_addr( + inst, + func, + base, + offset, + global_type, + func.dfg.mem_flags[flags], + isa, + ), ir::GlobalValueData::Symbol { tls, .. } => symbol(inst, func, global_value, isa, tls), ir::GlobalValueData::DynScaleTargetConst { vector_type } => { const_vector_scale(inst, func, vector_type, isa) diff --git a/cranelift/codegen/src/machinst/lower.rs b/cranelift/codegen/src/machinst/lower.rs index 60af54811384..0a09edc5c374 100644 --- a/cranelift/codegen/src/machinst/lower.rs +++ b/cranelift/codegen/src/machinst/lower.rs @@ -9,15 +9,15 @@ use crate::entity::SecondaryMap; use crate::inst_predicates::{has_lowering_side_effect, is_constant_64bit}; use crate::ir::{ ArgumentPurpose, Block, BlockArg, Constant, ConstantData, DataFlowGraph, ExternalName, - Function, GlobalValue, GlobalValueData, Immediate, Inst, InstructionData, MemFlagsData, - RelSourceLoc, SigRef, Signature, Type, Value, ValueDef, ValueLabelAssignments, ValueLabelStart, + Function, GlobalValue, GlobalValueData, Immediate, Inst, InstructionData, RelSourceLoc, SigRef, + Signature, Type, Value, ValueDef, ValueLabelAssignments, ValueLabelStart, }; use crate::machinst::valueregs::InvalidSentinel; use crate::machinst::{ ABIMachineSpec, BackwardsInsnIndex, BlockIndex, BlockLoweringOrder, CallArgList, CallInfo, - CallRetList, Callee, InsnIndex, LoweredBlock, MachLabel, Reg, Sig, SigSet, TryCallInfo, VCode, - VCodeBuilder, VCodeConstant, VCodeConstantData, VCodeConstants, VCodeInst, ValueRegs, Writable, - writable_value_regs, + CallRetList, Callee, InsnIndex, LoweredBlock, MachLabel, MachMemFlags, Reg, Sig, SigSet, + TryCallInfo, VCode, VCodeBuilder, VCodeConstant, VCodeConstantData, VCodeConstants, VCodeInst, + ValueRegs, Writable, writable_value_regs, }; use crate::settings::Flags; use crate::{CodegenError, CodegenResult, trace}; @@ -1420,14 +1420,16 @@ impl<'func, I: VCodeInst> Lower<'func, I> { } /// Returns the memory flags of a given memory access. - pub fn memflags(&self, ir_inst: Inst) -> Option { + pub fn memflags(&self, ir_inst: Inst) -> Option { match &self.f.dfg.insts[ir_inst] { - &InstructionData::AtomicCas { flags, .. } => Some(flags), - &InstructionData::AtomicRmw { flags, .. } => Some(flags), + &InstructionData::AtomicCas { flags, .. } => Some(self.f.dfg.mem_flags[flags].into()), + &InstructionData::AtomicRmw { flags, .. } => Some(self.f.dfg.mem_flags[flags].into()), &InstructionData::Load { flags, .. } | &InstructionData::LoadNoOffset { flags, .. } - | &InstructionData::Store { flags, .. } => Some(flags), - &InstructionData::StoreNoOffset { flags, .. } => Some(flags), + | &InstructionData::Store { flags, .. } => Some(self.f.dfg.mem_flags[flags].into()), + &InstructionData::StoreNoOffset { flags, .. } => { + Some(self.f.dfg.mem_flags[flags].into()) + } _ => None, } } diff --git a/cranelift/codegen/src/machinst/mod.rs b/cranelift/codegen/src/machinst/mod.rs index a7edc3498d80..b9d57d099d8e 100644 --- a/cranelift/codegen/src/machinst/mod.rs +++ b/cranelift/codegen/src/machinst/mod.rs @@ -46,7 +46,8 @@ use crate::binemit::{Addend, CodeInfo, CodeOffset, Reloc}; use crate::ir::{ - self, DynamicStackSlot, RelSourceLoc, StackSlot, Type, function::FunctionParameters, + self, DynamicStackSlot, Endianness, RelSourceLoc, StackSlot, TrapCode, Type, + function::FunctionParameters, }; use crate::isa::FunctionAlignment; use crate::result::CodegenResult; @@ -55,7 +56,9 @@ use crate::settings::Flags; use crate::value_label::ValueLabelsRanges; use alloc::string::String; use alloc::vec::Vec; +use core::fmt; use core::fmt::Debug; +use core::num::NonZeroU8; use cranelift_control::ControlPlane; use cranelift_entity::PrimaryMap; use regalloc2::VReg; @@ -64,6 +67,186 @@ use smallvec::{SmallVec, smallvec}; #[cfg(feature = "enable-serde")] use serde_derive::{Deserialize, Serialize}; +/// Guaranteed to use "natural alignment" for the given type. +const BIT_ALIGNED: u16 = 1 << 0; + +/// A load that reads data in memory that does not change for the +/// duration of the function's execution. +const BIT_READONLY: u16 = 1 << 1; + +/// Load multi-byte values from memory in a little-endian format. +const BIT_LITTLE_ENDIAN: u16 = 1 << 2; + +/// Load multi-byte values from memory in a big-endian format. +const BIT_BIG_ENDIAN: u16 = 1 << 3; + +/// Trap code, if any, for this memory operation. +const MASK_TRAP_CODE: u16 = ((1 << TRAP_CODE_BITS) - 1) << TRAP_CODE_OFFSET; +const TRAP_CODE_BITS: u16 = 8; +const TRAP_CODE_OFFSET: u16 = 7; + +/// Whether this memory operation may be freely moved by the optimizer. +const BIT_CAN_MOVE: u16 = 1 << 15; + +/// Backend memory-operation flags. +/// +/// These are the bit-packed flags that backends operate on directly. +/// +/// Unlike [`ir::MemFlagsData`], this does not carry alias-region metadata. +#[derive(Clone, Copy, Debug, Hash, PartialEq, Eq)] +#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))] +pub struct MachMemFlags { + // Bit layout: + // + // - Bit 0: aligned + // - Bit 1: readonly + // - Bit 2: little-endian + // - Bit 3: big-endian + // - Bits 4..6: unused + // - Bits 7..14: trap code + // - Bit 15: can_move + bits: u16, +} + +impl MachMemFlags { + /// Create a new empty set of flags. + pub const fn new() -> Self { + Self { bits: 0 }.with_trap_code(Some(TrapCode::HEAP_OUT_OF_BOUNDS)) + } + + /// Create a set of flags representing an access from a "trusted" address. + pub const fn trusted() -> Self { + Self::new().with_notrap().with_aligned() + } + + const fn read_bit(self, bit: u16) -> bool { + self.bits & bit != 0 + } + + const fn with_bit(mut self, bit: u16) -> Self { + self.bits |= bit; + self + } + + /// Return endianness of the memory access. + pub const fn endianness(self, native_endianness: Endianness) -> Endianness { + if self.read_bit(BIT_LITTLE_ENDIAN) { + Endianness::Little + } else if self.read_bit(BIT_BIG_ENDIAN) { + Endianness::Big + } else { + native_endianness + } + } + + /// Return endianness of the memory access, if explicitly specified. + pub const fn explicit_endianness(self) -> Option { + if self.read_bit(BIT_LITTLE_ENDIAN) { + Some(Endianness::Little) + } else if self.read_bit(BIT_BIG_ENDIAN) { + Some(Endianness::Big) + } else { + None + } + } + + /// Set endianness of the memory access, returning new flags. + pub const fn with_endianness(self, endianness: Endianness) -> Self { + let res = match endianness { + Endianness::Little => self.with_bit(BIT_LITTLE_ENDIAN), + Endianness::Big => self.with_bit(BIT_BIG_ENDIAN), + }; + assert!(!(res.read_bit(BIT_LITTLE_ENDIAN) && res.read_bit(BIT_BIG_ENDIAN))); + res + } + + /// Test if this memory access cannot trap. + pub const fn notrap(self) -> bool { + self.trap_code().is_none() + } + + /// Set these flags to indicate this access does not trap. + pub const fn with_notrap(self) -> Self { + self.with_trap_code(None) + } + + /// Test if the `can_move` flag is set. + pub const fn can_move(self) -> bool { + self.read_bit(BIT_CAN_MOVE) + } + + /// Set the `can_move` flag, returning new flags. + pub const fn with_can_move(self) -> Self { + self.with_bit(BIT_CAN_MOVE) + } + + /// Test if the `aligned` flag is set. + pub const fn aligned(self) -> bool { + self.read_bit(BIT_ALIGNED) + } + + /// Set the `aligned` flag, returning new flags. + pub const fn with_aligned(self) -> Self { + self.with_bit(BIT_ALIGNED) + } + + /// Test if the `readonly` flag is set. + pub const fn readonly(self) -> bool { + self.read_bit(BIT_READONLY) + } + + /// Set the `readonly` flag, returning new flags. + pub const fn with_readonly(self) -> Self { + self.with_bit(BIT_READONLY) + } + + /// Get the trap code to report if this memory access traps. + pub const fn trap_code(self) -> Option { + let byte = ((self.bits & MASK_TRAP_CODE) >> TRAP_CODE_OFFSET) as u8; + match NonZeroU8::new(byte) { + Some(code) => Some(TrapCode::from_raw(code)), + None => None, + } + } + + /// Configures these flags with the specified trap code `code`. + pub const fn with_trap_code(mut self, code: Option) -> Self { + let bits = match code { + Some(code) => code.as_raw().get() as u16, + None => 0, + }; + self.bits &= !MASK_TRAP_CODE; + self.bits |= bits << TRAP_CODE_OFFSET; + self + } +} + +impl fmt::Display for MachMemFlags { + fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result { + match self.trap_code() { + None => write!(f, " notrap")?, + Some(TrapCode::HEAP_OUT_OF_BOUNDS) => {} + Some(t) => write!(f, " {t}")?, + } + if self.aligned() { + write!(f, " aligned")?; + } + if self.readonly() { + write!(f, " readonly")?; + } + if self.can_move() { + write!(f, " can_move")?; + } + if self.read_bit(BIT_BIG_ENDIAN) { + write!(f, " big")?; + } + if self.read_bit(BIT_LITTLE_ENDIAN) { + write!(f, " little")?; + } + Ok(()) + } +} + #[macro_use] pub mod isle; diff --git a/cranelift/codegen/src/prelude.isle b/cranelift/codegen/src/prelude.isle index 3eb978744864..8c9c33321a3e 100644 --- a/cranelift/codegen/src/prelude.isle +++ b/cranelift/codegen/src/prelude.isle @@ -359,19 +359,30 @@ (decl pure ty_equal (Type Type) bool) (extern constructor ty_equal ty_equal) -;;;; `cranelift_codegen::ir::MemFlagsData ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +;;;; `cranelift_codegen::ir::MemFlags ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; Provide model for the MemFlagsData type (declared in generated clif_lower.isle). -(model MemFlagsData (type (bv 16))) +;; Provide model for the MemFlags type (declared in generated clif_lower.isle). +(model MemFlags (type (bv 16))) -;; `MemFlagsData::trusted` -(spec (mem_flags_trusted) - (provide (= result #x0003))) -(decl pure mem_flags_trusted () MemFlagsData) +;; Insert or reuse the trusted `MemFlagsData` value in the DFG's `MemFlagsSet`. +(decl mem_flags_trusted () MemFlags) (extern constructor mem_flags_trusted mem_flags_trusted) +;; Resolve a MemFlags entity to its MemFlagsData. +(decl mem_flags_data (MemFlagsData) MemFlags) +(extern extractor mem_flags_data mem_flags_data) + +;; Convert MemFlagsData back to a MemFlags entity index, inserting it if needed. +(decl mem_flags_intern (MemFlagsData) MemFlags) +(extern constructor mem_flags_intern mem_flags_intern) + +;; Returns the trusted MemFlagsData value directly (for helpers that still take MemFlagsData). +(decl pure mem_flags_trusted_data () MemFlagsData) +(extern constructor mem_flags_trusted_data mem_flags_trusted_data) + ;; Determine if flags specify little- or native-endian. -(decl little_or_native_endian (MemFlagsData) MemFlagsData) +;; Takes a MemFlags entity and returns the resolved MemFlagsData. +(decl little_or_native_endian (MemFlagsData) MemFlags) (extern extractor little_or_native_endian little_or_native_endian) ;;;; Helpers for Working with Flags ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; diff --git a/cranelift/codegen/src/verifier/mod.rs b/cranelift/codegen/src/verifier/mod.rs index 9645f7d900ba..766e06e0b7a4 100644 --- a/cranelift/codegen/src/verifier/mod.rs +++ b/cranelift/codegen/src/verifier/mod.rs @@ -72,7 +72,8 @@ use crate::ir::instructions::{CallInfo, InstructionFormat, ResolvedConstraint}; use crate::ir::{self, ArgumentExtension, BlockArg, ExceptionTable}; use crate::ir::{ ArgumentPurpose, Block, Constant, DynamicStackSlot, FuncRef, Function, GlobalValue, Inst, - JumpTable, MemFlagsData, Opcode, SigRef, StackSlot, Type, Value, ValueDef, ValueList, types, + JumpTable, MemFlags, MemFlagsData, Opcode, SigRef, StackSlot, Type, Value, ValueDef, ValueList, + types, }; use crate::ir::{ExceptionTableItem, Signature}; use crate::isa::{CallConv, TargetIsa}; @@ -388,7 +389,7 @@ impl<'a> Verifier<'a> { } } } - ir::GlobalValueData::Load { base, .. } => { + ir::GlobalValueData::Load { base, flags, .. } => { if let Some(isa) = self.isa { let base_type = self.func.global_values[base].global_type(isa); let pointer_type = isa.pointer_type(); @@ -401,6 +402,12 @@ impl<'a> Verifier<'a> { )); } } + let flags_data = self.func.dfg.mem_flags[flags]; + if let Some(region) = flags_data.alias_region() { + if !self.func.dfg.alias_regions.is_valid(region) { + errors.report((gv, format!("undefined alias region {region}"))); + } + } } _ => {} } @@ -410,6 +417,24 @@ impl<'a> Verifier<'a> { Ok(()) } + fn verify_alias_regions(&self, errors: &mut VerifierErrors) -> VerifierStepResult { + let mut seen_user_ids = crate::HashMap::new(); + for (ar, ar_data) in self.func.dfg.alias_regions.iter() { + if let Some(&prev) = seen_user_ids.get(&ar_data.user_id) { + errors.report(( + ar, + format!( + "duplicate alias region user_id {}: {} and {}", + ar_data.user_id, prev, ar + ), + )); + } else { + seen_user_ids.insert(ar_data.user_id, ar); + } + } + Ok(()) + } + /// Check that the given block can be encoded as a BB, by checking that only /// branching instructions are ending the block. fn encodable_as_bb(&self, block: Block, errors: &mut VerifierErrors) -> VerifierStepResult { @@ -520,6 +545,20 @@ impl<'a> Verifier<'a> { self.verify_inst_result(inst, res, errors)?; } + // Verify alias region references in memflags. + if let Some(flags) = self.func.dfg.insts[inst].memflags() { + let flags_data = self.func.dfg.mem_flags[flags]; + if let Some(region) = flags_data.alias_region() { + if !self.func.dfg.alias_regions.is_valid(region) { + errors.report(( + inst, + self.context(inst), + format!("undefined alias region {region}"), + )); + } + } + } + match self.func.dfg.insts[inst] { MultiAry { ref args, .. } => { self.verify_value_list(inst, args, errors)?; @@ -1091,12 +1130,13 @@ impl<'a> Verifier<'a> { fn verify_bitcast( &self, inst: Inst, - flags: MemFlagsData, + flags: MemFlags, arg: Value, errors: &mut VerifierErrors, ) -> VerifierStepResult { let typ = self.func.dfg.ctrl_typevar(inst); let value_type = self.func.dfg.value_type(arg); + let flags_data = self.func.dfg.mem_flags[flags]; if typ.bits() != value_type.bits() { errors.fatal(( @@ -1108,15 +1148,15 @@ impl<'a> Verifier<'a> { typ.bits() ), )) - } else if flags != MemFlagsData::new() - && flags != MemFlagsData::new().with_endianness(ir::Endianness::Little) - && flags != MemFlagsData::new().with_endianness(ir::Endianness::Big) + } else if flags_data != MemFlagsData::new() + && flags_data != MemFlagsData::new().with_endianness(ir::Endianness::Little) + && flags_data != MemFlagsData::new().with_endianness(ir::Endianness::Big) { errors.fatal(( inst, "The bitcast instruction only accepts the `big` or `little` memory flags", )) - } else if flags == MemFlagsData::new() && typ.lane_count() != value_type.lane_count() { + } else if flags_data == MemFlagsData::new() && typ.lane_count() != value_type.lane_count() { errors.fatal(( inst, "Byte order specifier required for bitcast instruction changing lane count", @@ -1822,7 +1862,7 @@ impl<'a> Verifier<'a> { match *inst_data { ir::InstructionData::Store { flags, .. } => { - if flags.readonly() { + if self.func.dfg.mem_flags[flags].readonly() { errors.fatal(( inst, self.context(inst), @@ -2080,6 +2120,7 @@ impl<'a> Verifier<'a> { pub fn run(&self, errors: &mut VerifierErrors) -> VerifierStepResult { self.verify_global_values(errors)?; + self.verify_alias_regions(errors)?; self.typecheck_entry_block_params(errors)?; self.check_entry_not_cold(errors)?; self.typecheck_function_signature(errors)?; diff --git a/cranelift/codegen/src/write.rs b/cranelift/codegen/src/write.rs index ab15294a6086..d4472241a632 100644 --- a/cranelift/codegen/src/write.rs +++ b/cranelift/codegen/src/write.rs @@ -52,9 +52,24 @@ pub trait FuncWriter { self.write_entity_definition(w, func, ss.into(), slot)?; } + for (ar, ar_data) in func.dfg.alias_regions.iter() { + any = true; + self.write_entity_definition( + w, + func, + ar.into(), + &format_args!("{} \"{}\"", ar_data.user_id, ar_data.description), + )?; + } + for (gv, gv_data) in &func.global_values { any = true; - self.write_entity_definition(w, func, gv.into(), gv_data)?; + self.write_entity_definition( + w, + func, + gv.into(), + &gv_data.display(&func.dfg.mem_flags), + )?; } // Write out all signatures before functions since function declarations can refer to @@ -381,8 +396,10 @@ pub fn write_operands(w: &mut dyn Write, dfg: &DataFlowGraph, inst: Inst) -> fmt match dfg.insts[inst] { AtomicRmw { op, args, .. } => write!(w, " {} {}, {}", op, args[0], args[1]), AtomicCas { args, .. } => write!(w, " {}, {}, {}", args[0], args[1], args[2]), - LoadNoOffset { flags, arg, .. } => write!(w, "{flags} {arg}"), - StoreNoOffset { flags, args, .. } => write!(w, "{} {}, {}", flags, args[0], args[1]), + LoadNoOffset { flags, arg, .. } => write!(w, "{} {arg}", dfg.mem_flags[flags]), + StoreNoOffset { flags, args, .. } => { + write!(w, "{} {}, {}", dfg.mem_flags[flags], args[0], args[1]) + } Unary { arg, .. } => write!(w, " {arg}"), UnaryImm { imm, .. } => write!(w, " {}", { let mut imm = imm; @@ -516,13 +533,17 @@ pub fn write_operands(w: &mut dyn Write, dfg: &DataFlowGraph, inst: Inst) -> fmt } => write!(w, " {arg}, {dynamic_stack_slot}"), Load { flags, arg, offset, .. - } => write!(w, "{flags} {arg}{offset}"), + } => write!(w, "{} {arg}{offset}", dfg.mem_flags[flags]), Store { flags, args, offset, .. - } => write!(w, "{} {}, {}{}", flags, args[0], args[1], offset), + } => write!( + w, + "{} {}, {}{}", + dfg.mem_flags[flags], args[0], args[1], offset + ), Trap { code, .. } => write!(w, " {code}"), CondTrap { arg, code, .. } => write!(w, " {arg}, {code}"), ExceptionHandlerAddress { block, imm, .. } => write!(w, " {block}, {imm}"), diff --git a/cranelift/entity/src/packed_option.rs b/cranelift/entity/src/packed_option.rs index fd1451802a8f..b8fdc8e59ed7 100644 --- a/cranelift/entity/src/packed_option.rs +++ b/cranelift/entity/src/packed_option.rs @@ -40,6 +40,14 @@ where } impl PackedOption { + /// Const constructor wrapping a raw `T`. + /// + /// To create `None`, pass `T::reserved_value()`. To create `Some(val)`, + /// pass a non-reserved `val`. + pub const fn new(val: T) -> Self { + Self(val) + } + /// Returns `true` if the packed option is a `None` value. pub fn is_none(&self) -> bool { self.0.is_reserved_value() diff --git a/cranelift/filetests/filetests/alias/categories.clif b/cranelift/filetests/filetests/alias/categories.clif index 1e2c2b3e3a05..ead8492affe3 100644 --- a/cranelift/filetests/filetests/alias/categories.clif +++ b/cranelift/filetests/filetests/alias/categories.clif @@ -7,14 +7,17 @@ target aarch64 function %f0(i64, i64) -> i32, i32 { + region0 = 0 "heap" + region1 = 1 "table" + block0(v0: i64, v1: i64): v2 = iconst.i32 42 v3 = iconst.i32 43 - store.i32 heap v2, v0+8 - store.i32 table v3, v1+8 + store.i32 region0 v2, v0+8 + store.i32 region1 v3, v1+8 - v4 = load.i32 heap v0+8 - v5 = load.i32 table v1+8 + v4 = load.i32 region0 v0+8 + v5 = load.i32 region1 v1+8 ; check: v4 -> v2 ; check: v5 -> v3 diff --git a/cranelift/filetests/filetests/alias/eight_regions.clif b/cranelift/filetests/filetests/alias/eight_regions.clif new file mode 100644 index 000000000000..ce5038bb4ea1 --- /dev/null +++ b/cranelift/filetests/filetests/alias/eight_regions.clif @@ -0,0 +1,56 @@ +test alias-analysis +set opt_level=speed +target aarch64 + +;; Test that eight distinct alias regions are tracked independently. + +function %eight_regions(i64, i64, i64, i64, i64, i64, i64, i64) -> i32, i32, i32, i32, i32, i32, i32, i32 { + region0 = 0 "region A" + region1 = 1 "region B" + region2 = 2 "region C" + region3 = 3 "region D" + region4 = 4 "region E" + region5 = 5 "region F" + region6 = 6 "region G" + region7 = 7 "region H" + +block0(v0: i64, v1: i64, v2: i64, v3: i64, v4: i64, v5: i64, v6: i64, v7: i64): + v100 = iconst.i32 10 + v101 = iconst.i32 11 + v102 = iconst.i32 12 + v103 = iconst.i32 13 + v104 = iconst.i32 14 + v105 = iconst.i32 15 + v106 = iconst.i32 16 + v107 = iconst.i32 17 + + ;; Store to each region. + store.i32 region0 v100, v0 + store.i32 region1 v101, v1 + store.i32 region2 v102, v2 + store.i32 region3 v103, v3 + store.i32 region4 v104, v4 + store.i32 region5 v105, v5 + store.i32 region6 v106, v6 + store.i32 region7 v107, v7 + + ;; Load from each region: should alias the corresponding store. + v200 = load.i32 region0 v0 + ; check: v200 -> v100 + v201 = load.i32 region1 v1 + ; check: v201 -> v101 + v202 = load.i32 region2 v2 + ; check: v202 -> v102 + v203 = load.i32 region3 v3 + ; check: v203 -> v103 + v204 = load.i32 region4 v4 + ; check: v204 -> v104 + v205 = load.i32 region5 v5 + ; check: v205 -> v105 + v206 = load.i32 region6 v6 + ; check: v206 -> v106 + v207 = load.i32 region7 v7 + ; check: v207 -> v107 + + return v200, v201, v202, v203, v204, v205, v206, v207 +} diff --git a/cranelift/filetests/filetests/alias/fence.clif b/cranelift/filetests/filetests/alias/fence.clif index b279e384dc30..be19db1effac 100644 --- a/cranelift/filetests/filetests/alias/fence.clif +++ b/cranelift/filetests/filetests/alias/fence.clif @@ -9,36 +9,38 @@ function %f0(i64 vmctx, i32) -> i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 gv0 = vmctx gv1 = load.i64 notrap readonly aligned gv0+8 + region0 = 0 "vmctx" + block0(v0: i64, v1: i32): v2 = global_value.i64 gv1 v3 = load.i32 v2+8 - v4 = load.i32 vmctx v0+16 + v4 = load.i32 region0 v0+16 atomic_store.i32 v1, v0 - v5 = load.i32 vmctx v0+16 - ; check: v5 = load.i32 vmctx v0+16 + v5 = load.i32 region0 v0+16 + ; check: v5 = load.i32 region0 v0+16 v6 = atomic_cas.i32 v0, v1, v1 - v7 = load.i32 vmctx v0+16 - ; check: v7 = load.i32 vmctx v0+16 + v7 = load.i32 region0 v0+16 + ; check: v7 = load.i32 region0 v0+16 fence - v8 = load.i32 vmctx v0+16 - ; check: v8 = load.i32 vmctx v0+16 + v8 = load.i32 region0 v0+16 + ; check: v8 = load.i32 region0 v0+16 v9 = atomic_rmw.i32 add v0, v1 - v10 = load.i32 vmctx v0+16 - ; check: v10 = load.i32 vmctx v0+16 + v10 = load.i32 region0 v0+16 + ; check: v10 = load.i32 region0 v0+16 v11 = atomic_load.i32 v0 - v12 = load.i32 vmctx v0+16 - ; check: v12 = load.i32 vmctx v0+16 + v12 = load.i32 region0 v0+16 + ; check: v12 = load.i32 region0 v0+16 return v3, v4, v5, v6, v7, v8, v9, v10, v11, v12 } diff --git a/cranelift/filetests/filetests/alias/idempotent-store.clif b/cranelift/filetests/filetests/alias/idempotent-store.clif index 4808f1270962..b82bdd5514e8 100644 --- a/cranelift/filetests/filetests/alias/idempotent-store.clif +++ b/cranelift/filetests/filetests/alias/idempotent-store.clif @@ -4,61 +4,73 @@ target x86_64 ;; Same block: idempotent store after load should be removed. function %idempotent_store_after_load(i64) { + region0 = 0 "heap" block0(v0: i64): - v1 = load.i32 heap v0+8 - store.i32 heap v1, v0+8 + v1 = load.i32 region0 v0+8 + store.i32 region0 v1, v0+8 return } ; function %idempotent_store_after_load(i64) fast { +; region0 = 0 "heap" +; ; block0(v0: i64): -; v1 = load.i32 heap v0+8 +; v1 = load.i32 region0 v0+8 ; return ; } ;; Same block: idempotent store after store should be removed. function %idempotent_store_after_store(i64, i32) { + region0 = 0 "heap" block0(v0: i64, v1: i32): - store.i32 heap v1, v0+8 - store.i32 heap v1, v0+8 + store.i32 region0 v1, v0+8 + store.i32 region0 v1, v0+8 return } ; function %idempotent_store_after_store(i64, i32) fast { +; region0 = 0 "heap" +; ; block0(v0: i64, v1: i32): -; store heap v1, v0+8 +; store region0 v1, v0+8 ; return ; } ;; Same block: non-idempotent store (different value) should NOT be removed. function %non_idempotent_store(i64, i32, i32) { + region0 = 0 "heap" block0(v0: i64, v1: i32, v2: i32): - store.i32 heap v1, v0+8 - store.i32 heap v2, v0+8 + store.i32 region0 v1, v0+8 + store.i32 region0 v2, v0+8 return } ; function %non_idempotent_store(i64, i32, i32) fast { +; region0 = 0 "heap" +; ; block0(v0: i64, v1: i32, v2: i32): -; store heap v1, v0+8 -; store heap v2, v0+8 +; store region0 v1, v0+8 +; store region0 v2, v0+8 ; return ; } ;; Cross block: idempotent store in dominated block should be removed. function %cross_block_dominated(i64) { + region0 = 0 "heap" block0(v0: i64): - v1 = load.i32 heap v0+8 + v1 = load.i32 region0 v0+8 jump block1 block1: - store.i32 heap v1, v0+8 + store.i32 region0 v1, v0+8 return } ; function %cross_block_dominated(i64) fast { +; region0 = 0 "heap" +; ; block0(v0: i64): -; v1 = load.i32 heap v0+8 +; v1 = load.i32 region0 v0+8 ; jump block1 ; ; block1: @@ -70,70 +82,77 @@ block1: ;; block4, but block4 also has an in-edge from block3, so the store in block4 is ;; not dominated by the store in block2 and must be kept. function %cross_block_not_dominated(i64, i32) { + region0 = 0 "heap" block0(v0: i64, v1: i32): brif v1, block2, block3 block2: - store.i32 heap v1, v0+8 + store.i32 region0 v1, v0+8 jump block4 block3: jump block4 block4: - store.i32 heap v1, v0+8 + store.i32 region0 v1, v0+8 return } ; function %cross_block_not_dominated(i64, i32) fast { +; region0 = 0 "heap" +; ; block0(v0: i64, v1: i32): ; brif v1, block2, block3 ; ; block2: -; store.i32 heap v1, v0+8 +; store.i32 region0 v1, v0+8 ; jump block4 ; ; block3: ; jump block4 ; ; block4: -; store.i32 heap v1, v0+8 +; store.i32 region0 v1, v0+8 ; return ; } ;; Function call between load and store breaks the optimization. function %call_barrier(i64) { + region0 = 0 "heap" fn0 = %g(i64) block0(v0: i64): - v1 = load.i32 heap v0+8 + v1 = load.i32 region0 v0+8 call fn0(v0) - store.i32 heap v1, v0+8 + store.i32 region0 v1, v0+8 return } ; function %call_barrier(i64) fast { +; region0 = 0 "heap" ; sig0 = (i64) fast ; fn0 = %g sig0 ; ; block0(v0: i64): -; v1 = load.i32 heap v0+8 +; v1 = load.i32 region0 v0+8 ; call fn0(v0) -; store heap v1, v0+8 +; store region0 v1, v0+8 ; return ; } ;; Removing an idempotent store should preserve RLE for subsequent loads. function %idempotent_store_then_load(i64) -> i32 { + region0 = 0 "heap" block0(v0: i64): - v1 = load.i32 heap v0+8 - store.i32 heap v1, v0+8 - v2 = load.i32 heap v0+8 + v1 = load.i32 region0 v0+8 + store.i32 region0 v1, v0+8 + v2 = load.i32 region0 v0+8 return v2 } ; function %idempotent_store_then_load(i64) -> i32 fast { +; region0 = 0 "heap" +; ; block0(v0: i64): -; v1 = load.i32 heap v0+8 +; v1 = load.i32 region0 v0+8 ; return v1 ; } - diff --git a/cranelift/filetests/filetests/alias/same-description.clif b/cranelift/filetests/filetests/alias/same-description.clif new file mode 100644 index 000000000000..85a496d6e98c --- /dev/null +++ b/cranelift/filetests/filetests/alias/same-description.clif @@ -0,0 +1,30 @@ +test alias-analysis +set opt_level=speed +target aarch64 + +;; Check that two alias regions with the same description are NOT treated as +;; identical. Even though region0 and region1 both have the description "", +;; they are different entities and stores to one should not be considered to +;; alias loads from the other. + +function %same_description_different_regions(i64, i64) -> i32 { + + region0 = 0 "" + region1 = 1 "" + +block0(v0: i64, v1: i64): + v2 = iconst.i32 42 + store.i32 region0 v2, v0 + + v3 = iconst.i32 99 + store.i32 region1 v3, v1 + + ;; This load is from region0. The intervening store was to region1. + ;; Because region0 and region1 are different entities (even though they + ;; share the same description), the store to region1 does NOT invalidate + ;; the load from region0. So this load should be optimized to v2. + v4 = load.i32 region0 v0 + ; check: v4 -> v2 + + return v4 +} diff --git a/cranelift/filetests/filetests/egraph/alias_analysis.clif b/cranelift/filetests/filetests/egraph/alias_analysis.clif index 83fa31de618a..0c03cf42b599 100644 --- a/cranelift/filetests/filetests/egraph/alias_analysis.clif +++ b/cranelift/filetests/filetests/egraph/alias_analysis.clif @@ -3,11 +3,13 @@ set opt_level=speed target x86_64 function %f(i64) -> i64 { + region0 = 0 "heap" + block0(v0: i64): v1 = iconst.i64 0 v2 = bor.i64 v0, v1 - v3 = load.i64 heap v0 - v4 = load.i64 heap v2 + v3 = load.i64 region0 v0 + v4 = load.i64 region0 v2 v5 = band.i64 v3, v4 store.i64 v0, v5 v6 = load.i64 v3 @@ -15,7 +17,7 @@ block0(v0: i64): return v7 } -; check: v3 = load.i64 heap v0 +; check: v3 = load.i64 region0 v0 ; check: store v0, v3 ; check: v7 = load.i64 v0 ; check: return v7 diff --git a/cranelift/filetests/filetests/egraph/exponential-selects.clif b/cranelift/filetests/filetests/egraph/exponential-selects.clif index 465ad704c437..d683dcafb8bc 100644 --- a/cranelift/filetests/filetests/egraph/exponential-selects.clif +++ b/cranelift/filetests/filetests/egraph/exponential-selects.clif @@ -46,6 +46,8 @@ target s390x fn9 = colocated %FmaF32 sig9 fn10 = %FmaF64 sig10 + region0 = 0 "heap" + block0(v0: i64x2, v1: i128, v2: i16x8, v3: f64, v4: i64, v5: i16, v6: i32x4, v7: f32, v8: f32x4, v9: i8x16, v10: f64x2, v11: i32, v12: i8): v62 = iconst.i16 -11823 v63 = iconst.i16 -11823 @@ -58,27 +60,27 @@ target s390x v70 = iconst.i64 0 v71 = uextend.i128 v70 ; v70 = 0 v72 = stack_addr.i64 ss1 - store notrap heap v71, v72 + store notrap region0 v71, v72 v73 = stack_addr.i64 ss1+16 - store notrap heap v71, v73 + store notrap region0 v71, v73 v74 = stack_addr.i64 ss1+32 - store notrap heap v71, v74 + store notrap region0 v71, v74 v75 = stack_addr.i64 ss1+48 - store notrap heap v71, v75 + store notrap region0 v71, v75 v76 = stack_addr.i64 ss1+64 - store notrap heap v71, v76 + store notrap region0 v71, v76 v77 = stack_addr.i64 ss0 - store notrap heap v71, v77 + store notrap region0 v71, v77 v78 = stack_addr.i64 ss0+16 - store notrap heap v71, v78 + store notrap region0 v71, v78 v79 = stack_addr.i64 ss0+32 - store notrap heap v71, v79 + store notrap region0 v71, v79 v80 = stack_addr.i64 ss0+48 - store notrap heap v71, v80 + store notrap region0 v71, v80 v81 = stack_addr.i64 ss0+64 - store notrap heap v71, v81 + store notrap region0 v71, v81 v82 = stack_addr.i64 ss0+80 - store notrap heap v67, v82 ; v67 = 0 + store notrap region0 v67, v82 ; v67 = 0 v83 = select_spectre_guard v4, v2, v2 v84 = vhigh_bits.i64 v8 v85 = select v11, v7, v7 diff --git a/cranelift/filetests/filetests/egraph/issue-7891.clif b/cranelift/filetests/filetests/egraph/issue-7891.clif index 35ad0df73bb6..2d9d49799be8 100644 --- a/cranelift/filetests/filetests/egraph/issue-7891.clif +++ b/cranelift/filetests/filetests/egraph/issue-7891.clif @@ -41,6 +41,8 @@ target x86_64 ; https://github.com/bytecodealliance/wasmtime/pull/7891 function %bad_param_reuse(i32) -> i8 { + region0 = 0 "heap" + block0(v0: i32): v1 = iconst.i32 0 brif v0, block1, block2(v0) @@ -74,11 +76,13 @@ block3: ; check: return v7 function %bad_effect_reuse(i64) -> i8 { + region0 = 0 "heap" + block0(v0: i64): brif v0, block1, block2 block1: - v1 = load.i64 heap v0 + v1 = load.i64 region0 v0 v2 = isub v1, v1 ; v2 simplifies to `iconst 0`, which is equivalent to v4 v3 = icmp eq v0, v2 @@ -93,7 +97,7 @@ block2: } ; check: block1: -; check: v1 = load.i64 heap v0 +; check: v1 = load.i64 region0 v0 ; check: v6 = iconst.i64 0 ; check: v7 = icmp.i64 eq v0, v6 ; v6 = 0 ; check: return v7 diff --git a/cranelift/filetests/filetests/egraph/load-hoist.clif b/cranelift/filetests/filetests/egraph/load-hoist.clif index bebb72367217..cdb130ce103c 100644 --- a/cranelift/filetests/filetests/egraph/load-hoist.clif +++ b/cranelift/filetests/filetests/egraph/load-hoist.clif @@ -10,6 +10,8 @@ function %can_move_hoists(i64 vmctx, i64, i32, i32) -> i32 fast { gv4 = load.i64 notrap aligned readonly gv3+80 stack_limit = gv2 + region0 = 0 "heap" + block0(v0: i64, v1: i64, v2: i32, v3: i32): v5 = iconst.i32 0 jump block2(v5, v2, v3) ; v5 = 0 @@ -18,7 +20,7 @@ function %can_move_hoists(i64 vmctx, i64, i32, i32) -> i32 fast { v9 = load.i64 notrap aligned readonly can_move v0+80 v8 = uextend.i64 v7 v10 = iadd v9, v8 - v11 = load.i32 little heap v10 + v11 = load.i32 little region0 v10 v16 = iconst.i32 1 v17 = isub v15, v16 ; v16 = 1 v12 = iadd v6, v11 @@ -40,7 +42,7 @@ function %can_move_hoists(i64 vmctx, i64, i32, i32) -> i32 fast { ; check: v9 = load.i64 notrap aligned readonly can_move v0+80 ; check: block2(v6: i32, v7: i32, v15: i32): ; check: v10 = iadd.i64 v9, v8 -; check: v11 = load.i32 little heap v10 +; check: v11 = load.i32 little region0 v10 ; check: brif v19, block2(v12, v21, v19), block4 function %non_can_move_does_not_hoist(i64 vmctx, i64, i32, i32) -> i32 fast { @@ -51,6 +53,8 @@ function %non_can_move_does_not_hoist(i64 vmctx, i64, i32, i32) -> i32 fast { gv4 = load.i64 notrap aligned readonly gv3+80 stack_limit = gv2 + region0 = 0 "heap" + block0(v0: i64, v1: i64, v2: i32, v3: i32): v5 = iconst.i32 0 jump block2(v5, v2, v3) ; v5 = 0 @@ -59,7 +63,7 @@ function %non_can_move_does_not_hoist(i64 vmctx, i64, i32, i32) -> i32 fast { v9 = load.i64 notrap aligned readonly v0+80 v8 = uextend.i64 v7 v10 = iadd v9, v8 - v11 = load.i32 little heap v10 + v11 = load.i32 little region0 v10 v16 = iconst.i32 1 v17 = isub v15, v16 ; v16 = 1 v12 = iadd v6, v11 diff --git a/cranelift/filetests/filetests/inline/alias_regions.clif b/cranelift/filetests/filetests/inline/alias_regions.clif new file mode 100644 index 000000000000..710da8324129 --- /dev/null +++ b/cranelift/filetests/filetests/inline/alias_regions.clif @@ -0,0 +1,52 @@ +test inline precise-output +target x86_64 + +;; The callee uses region0 (user_id 100, same as caller's region0) and +;; region1 (user_id 200, not in caller). After inlining, region0 should be +;; deduplicated and region1 should be added to the caller. + +function %callee(i64, i64) -> i32 { + region0 = 100 "shared region" + region1 = 200 "callee-only region" +block0(v0: i64, v1: i64): + v2 = load.i32 notrap aligned region0 v0 + v3 = load.i32 notrap aligned region1 v1 + v4 = iadd v2, v3 + return v4 +} + +; (no functions inlined into %callee) + +function %caller(i64, i64) -> i32 { + region0 = 100 "shared region" + fn0 = %callee(i64, i64) -> i32 +block0(v0: i64, v1: i64): + ;; Uses the same region (user_id 100) as the callee. + v2 = load.i32 notrap aligned region0 v0 + v3 = call fn0(v0, v1) + v4 = iadd v2, v3 + return v4 +} + +; function %caller(i64, i64) -> i32 fast { +; region0 = 100 "shared region" +; region1 = 200 "callee-only region" +; sig0 = (i64, i64) -> i32 fast +; fn0 = %callee sig0 +; +; block0(v0: i64, v1: i64): +; v2 = load.i32 notrap aligned region0 v0 +; jump block1 +; +; block1: +; v6 = load.i32 notrap aligned region0 v0 +; v7 = load.i32 notrap aligned region1 v1 +; v8 = iadd v6, v7 +; jump block2(v8) +; +; block2(v5: i32): +; v3 -> v5 +; v4 = iadd.i32 v2, v3 +; return v4 +; } + diff --git a/cranelift/filetests/filetests/isa/aarch64/bti.clif b/cranelift/filetests/filetests/isa/aarch64/bti.clif index 72c7e648c394..f4bad9d5951b 100644 --- a/cranelift/filetests/filetests/isa/aarch64/bti.clif +++ b/cranelift/filetests/filetests/isa/aarch64/bti.clif @@ -3,6 +3,8 @@ set unwind_info=false target aarch64 use_bti function %f1(i32) -> i32 { + region0 = 0 "table" + block0(v0: i32): br_table v0, block4, [block1, block2, block3] @@ -85,9 +87,11 @@ block5(v5: i32): ; ret function %f2(i64) -> i64 { + region0 = 0 "table" + block0(v0: i64): v1 = ireduce.i32 v0 - v2 = load.i64 notrap aligned table v0 + v2 = load.i64 notrap aligned region0 v0 br_table v1, block1, [block2] block1: @@ -142,6 +146,8 @@ block2: function %f3(i64) -> i64 { fn0 = %g(i64) -> i64 + region0 = 0 "table" + block0(v0: i64): v1 = call fn0(v0) return v1 diff --git a/cranelift/filetests/filetests/isa/aarch64/bti_with_csdb.clif b/cranelift/filetests/filetests/isa/aarch64/bti_with_csdb.clif index 3c00aee53480..19caa72f44ad 100644 --- a/cranelift/filetests/filetests/isa/aarch64/bti_with_csdb.clif +++ b/cranelift/filetests/filetests/isa/aarch64/bti_with_csdb.clif @@ -3,6 +3,8 @@ set unwind_info=false target aarch64 use_bti use_csdb function %f1(i32) -> i32 { + region0 = 0 "table" + block0(v0: i32): br_table v0, block4, [block1, block2, block3] @@ -86,9 +88,11 @@ block5(v5: i32): ; ret function %f2(i64) -> i64 { + region0 = 0 "table" + block0(v0: i64): v1 = ireduce.i32 v0 - v2 = load.i64 notrap aligned table v0 + v2 = load.i64 notrap aligned region0 v0 br_table v1, block1, [block2] block1: @@ -144,6 +148,8 @@ block2: function %f3(i64) -> i64 { fn0 = %g(i64) -> i64 + region0 = 0 "table" + block0(v0: i64): v1 = call fn0(v0) return v1 diff --git a/cranelift/filetests/filetests/isa/riscv64/issue-12811.clif b/cranelift/filetests/filetests/isa/riscv64/issue-12811.clif index ad844e43faec..00dcbc2720f0 100644 --- a/cranelift/filetests/filetests/isa/riscv64/issue-12811.clif +++ b/cranelift/filetests/filetests/isa/riscv64/issue-12811.clif @@ -17,6 +17,8 @@ function u0:388(i64 vmctx) tail { fn1 = colocated u0:1 sig1 stack_limit = gv2 + region0 = 0 "heap" + block0(v0: i64): v8 = iconst.i32 0 v10 = iconst.i32 0 @@ -103,7 +105,7 @@ block0(v0: i64): v2120 = iconst.i64 0 v2135 = iconst.i64 0 v2138 = iconst.i64 0 - store little heap v2135, v2138 + store little region0 v2135, v2138 v22604 = iconst.i64 0xa575_8d25 v22610 = iadd v17, v22604 v2172 = iconst.i64 0 @@ -123,7 +125,7 @@ block0(v0: i64): v2331 = iconst.i64 0 v2335 = iconst.i64 0x7644_47b1_426b_e08d v2344 = iconst.i64 0 - store little heap v24488, v17 + store little region0 v24488, v17 v2402 = iconst.i64 0 v2419 = iconst.i64 0 v22655 = iconst.i64 0xdb0f_f6d3 @@ -176,7 +178,7 @@ block0(v0: i64): v2757 = iconst.i64 0 v2766 = iconst.i64 0 v2784 = iconst.i64 0 - store little heap v24502, v2784 + store little region0 v24502, v2784 v22694 = iconst.i64 0xd31a_4fa5 v2795 = iadd v17, v22694 v2801 = iconst.i64 0 @@ -212,10 +214,10 @@ block0(v0: i64): v3117 = iconst.i64 0 v3122 = iconst.i64 0 v22727 = iconst.i64 0 - store little heap v24502, v22727 + store little region0 v24502, v22727 v3130 = iconst.i64 0x0d0a_8676_0499_d6a2 v3135 = iconst.i64 0 - store little heap v24502, v17 + store little region0 v24502, v17 v3146 = iconst.i64 0 v3152 = iconst.i64 0 v3158 = iconst.i64 0x7043_623e_9ceb_ec55 @@ -263,7 +265,7 @@ block0(v0: i64): v3668 = iconst.i64 0 v3680 = iconst.i64 0 v22792 = iconst.i64 0 - store little heap v24502, v22792 + store little region0 v24502, v22792 v3731 = iconst.i64 0 v3742 = iconst.i64 0 v3748 = iconst.i64 0 @@ -342,7 +344,7 @@ block0(v0: i64): v4465 = iconst.i64 0 v4471 = iconst.i64 0 v4476 = iconst.i64 0 - store little heap v4471, v4476 + store little region0 v4471, v4476 v4506 = iconst.i64 0 v4512 = iconst.i64 0 v4524 = iconst.i64 0 @@ -391,9 +393,9 @@ block0(v0: i64): v4933 = iconst.i64 0 v4939 = iconst.i64 0 v4945 = iconst.i64 0 - store little heap v24475, v4945 + store little region0 v24475, v4945 v4966 = iconst.i64 0 - store little heap v24502, v4966 + store little region0 v24502, v4966 v4977 = iconst.i64 0 v4987 = iconst.i64 0 v5022 = iconst.i64 0 @@ -1042,7 +1044,7 @@ block0(v0: i64): v10760 = iconst.i64 0 v10766 = iconst.i64 0 v10772 = iconst.i64 0 - store little heap v24475, v10772 + store little region0 v24475, v10772 v10778 = iconst.i64 0 v23674 = iconst.i64 0 v10791 = iconst.i64 0 @@ -1059,7 +1061,7 @@ block0(v0: i64): v10930 = iconst.i64 0 v10943 = iconst.i64 0 v10946 = iconst.i64 0 - store little heap v10943, v10946 + store little region0 v10943, v10946 v10952 = iconst.i64 0 v10973 = iconst.i64 0 v10987 = iconst.i64 0 @@ -1369,13 +1371,13 @@ block0(v0: i64): v13795 = iconst.i64 0 v13822 = iconst.i64 0 v13864 = iconst.i64 0 - store little heap v24488, v13864 + store little region0 v24488, v13864 v23993 = iconst.i64 0xdad1_1f59 v23999 = iadd v17, v23993 v24003 = iconst.i64 0x8560_7b1f v24009 = iadd v17, v24003 v13919 = iconst.i64 0 - store little heap v24490, v13919 + store little region0 v24490, v13919 v13938 = iconst.i64 0 v13944 = iconst.i64 0 v13961 = iconst.i64 0 @@ -1384,9 +1386,9 @@ block0(v0: i64): v13993 = iconst.i64 0 v14022 = iconst.i64 0 v14027 = iconst.i64 0 - store little heap v24502, v14027 + store little region0 v24502, v14027 v14033 = iconst.i64 0 - store little heap v24502, v14033 + store little region0 v24502, v14033 v14039 = iconst.i64 0 v14043 = iconst.i64 -1984357341440851753 v14076 = iconst.i64 0 @@ -1411,15 +1413,15 @@ block0(v0: i64): v14254 = iconst.i64 0 v14266 = iconst.i64 0 v14276 = iconst.i64 0 - store little heap v24502, v14276 + store little region0 v24502, v14276 v14292 = iconst.i64 0 - store little heap v24502, v14292 + store little region0 v24502, v14292 v14298 = iconst.i64 0 - store little heap v24488, v14298 + store little region0 v24488, v14298 v14308 = iconst.i64 0 v14319 = iconst.i64 0 v14330 = iconst.i64 0 - store little heap v8, v14330 + store little region0 v8, v14330 v14353 = iconst.i64 0 v14359 = iconst.i64 0 v14365 = iconst.i64 0 @@ -1603,27 +1605,27 @@ block0(v0: i64): v24564 = iconst.i32 3016 v24642 = iconst.i32 1 v24643 = iconst.i32 2 - store little heap v24211, v17 - store little heap v24211, v58 - store little heap v24211, v65 - store little heap v24219, v178 - store little heap v102, v108 - store little heap v102, v201 + store little region0 v24211, v17 + store little region0 v24211, v58 + store little region0 v24211, v65 + store little region0 v24219, v178 + store little region0 v102, v108 + store little region0 v102, v201 v370 = iconst.i64 0 v1523 = iconst.i32 0 v2807 = iconst.i64 0 v2948 = iconst.i64 0 - store little heap v24490, v3588 - store little heap v24488, v22782 - store little heap v24488, v3645 - store little heap v24475, v3651 - store little heap v24490, v3657 - store little heap v24477, v3668 - store little heap v8, v1786 + store little region0 v24490, v3588 + store little region0 v24488, v22782 + store little region0 v24488, v3645 + store little region0 v24475, v3651 + store little region0 v24490, v3657 + store little region0 v24477, v3668 + store little region0 v8, v1786 v4087 = iconst.i64 0 - store little heap v24488, v5224 - store little heap v8, v5229 - store little heap v24502, v5242 + store little region0 v24488, v5224 + store little region0 v8, v5229 + store little region0 v24502, v5242 v10864 = iconst.i64 0 v10934 = iconst.i32 0 v11734 = iconst.i64 0 @@ -1636,138 +1638,138 @@ block0(v0: i64): v14756 = iconst.i64 0 v15000 = iconst.i64 0 v15250 = iconst.i32 0 - store little heap v24488, v15302 - store little heap v24236, v24250 - store little heap v370, v375 - store little heap v24263, v24264 + store little region0 v24488, v15302 + store little region0 v24236, v24250 + store little region0 v370, v375 + store little region0 v24263, v24264 v4239 = iconst.i64 0 - store little heap v24488, v4249 - store little heap v24488, v5194 - store little heap v24488, v5248 + store little region0 v24488, v4249 + store little region0 v24488, v5194 + store little region0 v24488, v5248 v5401 = iconst.i64 0 - store little heap v5401, v5404 + store little region0 v5401, v5404 v5600 = iconst.i64 0 - store little heap v24488, v17 - store little heap v24502, v6194 + store little region0 v24488, v17 + store little region0 v24502, v6194 v6220 = iconst.i64 0 v6359 = iconst.i32 0 - store little heap v6359, v1786 - store little heap v24488, v6368 - store little heap v24488, v17 - store little heap v24502, v23117 - store little heap v8, v6461 - store little heap v24477, v6580 - store little heap v24475, v6603 - store little heap v24502, v23194 + store little region0 v6359, v1786 + store little region0 v24488, v6368 + store little region0 v24488, v17 + store little region0 v24502, v23117 + store little region0 v8, v6461 + store little region0 v24477, v6580 + store little region0 v24475, v6603 + store little region0 v24502, v23194 v8089 = iconst.i64 0 v8111 = iconst.i64 0 - store little heap v24488, v8192 - store little heap v24488, v8198 - store little heap v24490, v8272 - store little heap v24488, v8530 - store little heap v8, v8535 + store little region0 v24488, v8192 + store little region0 v24488, v8198 + store little region0 v24490, v8272 + store little region0 v24488, v8530 + store little region0 v8, v8535 v9110 = iconst.i32 0 v9147 = iconst.i32 0 - store little heap v24488, v17 - store little heap v9719, v2901 - store little heap v10403, v10406 - store little heap v10864, v10867 + store little region0 v24488, v17 + store little region0 v9719, v2901 + store little region0 v10403, v10406 + store little region0 v10864, v10867 v11265 = iconst.i32 0 - store little heap v24488, v17 - store little heap v24502, v23940 - store little heap v14699, v14704 - store little heap v24488, v17 - store little heap v15250, v15255 - store little heap v8, v15284 + store little region0 v24488, v17 + store little region0 v24502, v23940 + store little region0 v14699, v14704 + store little region0 v24488, v17 + store little region0 v15250, v15255 + store little region0 v8, v15284 v15411 = iconst.i64 0 v15662 = iconst.i32 0 - store little heap v15662, v15667 + store little region0 v15662, v15667 v15873 = iconst.i32 0 - store little heap v15873, v15878 + store little region0 v15873, v15878 v2619 = iconst.i64 0 v3271 = iconst.i32 0 - store little heap v24543, v5985 - store little heap v24502, v5997 + store little region0 v24543, v5985 + store little region0 v24502, v5997 v6432 = iconst.i64 0 - store little heap v8, v6676 - store little heap v7600, v7603 + store little region0 v8, v6676 + store little region0 v7600, v7603 v7653 = iconst.i64 0 - store little heap v8, v7828 - store little heap v24543, v8248 - store little heap v24550, v8512 + store little region0 v8, v7828 + store little region0 v24543, v8248 + store little region0 v24550, v8512 v9097 = iconst.i64 0 - store little heap v9147, v9152 + store little region0 v9147, v9152 v9560 = iconst.i64 0 - store little heap v9560, v1786 - store little heap v8, v9609 - store little heap v24502, v9728 - store little heap v24488, v9734 - store little heap v24488, v17 - store little heap v24488, v10658 - store little heap v24488, v10663 + store little region0 v9560, v1786 + store little region0 v8, v9609 + store little region0 v24502, v9728 + store little region0 v24488, v9734 + store little region0 v24488, v17 + store little region0 v24488, v10658 + store little region0 v24488, v10663 v11890 = iconst.i32 0 v13061 = iconst.i64 0 v14348 = iconst.i64 0 - store little heap v14665, v1786 - store little heap v24502, v14674 - store little heap v24502, v14926 - store little heap v24475, v3231 + store little region0 v14665, v1786 + store little region0 v24502, v14674 + store little region0 v24502, v14926 + store little region0 v24475, v3231 v3282 = iconst.i64 0 - store little heap v24490, v3494 + store little region0 v24490, v3494 v3728 = iconst.i64 0 v3752 = iconst.i32 0 v4501 = iconst.i64 0 - store little heap v24488, v1786 - store little heap v24488, v4815 + store little region0 v24488, v1786 + store little region0 v24488, v4815 v4972 = iconst.i64 0 - store little heap v4972, v4977 + store little region0 v4972, v4977 v5118 = iconst.i32 0 - store little heap v24502, v5359 + store little region0 v24502, v5359 v5416 = iconst.i64 0 v5425 = iconst.i64 0 v5580 = iconst.i64 0 v5630 = iconst.i64 0 v5639 = iconst.i64 0 v5842 = iconst.i64 0 - store little heap v24490, v17 - store little heap v8, v23040 + store little region0 v24490, v17 + store little region0 v8, v23040 v6441 = iconst.i64 0 v6656 = iconst.i64 0 v6862 = iconst.i64 0 - store little heap v24488, v7382 - store little heap v7386, v1786 - store little heap v24477, v23265 + store little region0 v24488, v7382 + store little region0 v7386, v1786 + store little region0 v24477, v23265 v7807 = iconst.i32 0 - store little heap v7807, v7812 + store little region0 v7807, v7812 v7820 = iconst.i32 0 - store little heap v24477, v7974 - store little heap v24488, v7992 - store little heap v24502, v8156 - store little heap v24502, v8469 - store little heap v24502, v8789 + store little region0 v24477, v7974 + store little region0 v24488, v7992 + store little region0 v24502, v8156 + store little region0 v24502, v8469 + store little region0 v24502, v8789 v9202 = iconst.i64 0 v9250 = iconst.i64 0 - store little heap v24502, v9498 + store little region0 v24502, v9498 v9650 = iconst.i64 0 - store little heap v24488, v9677 - store little heap v8, v1786 - store little heap v24502, v9753 + store little region0 v24488, v9677 + store little region0 v8, v1786 + store little region0 v24502, v9753 v9782 = iconst.i64 0 - store little heap v24490, v1786 + store little region0 v24490, v1786 v10104 = iconst.i64 0 v10113 = iconst.i64 0 - store little heap v24475, v10130 - store little heap v24488, v2901 - store little heap v24488, v17 + store little region0 v24475, v10130 + store little region0 v24488, v2901 + store little region0 v24488, v17 v10589 = iconst.i64 0 - store little heap v10589, v10594 - store little heap v24502, v10600 - store little heap v24488, v17 - store little heap v24502, v10610 + store little region0 v10589, v10594 + store little region0 v24502, v10600 + store little region0 v24488, v17 + store little region0 v24502, v10610 v10693 = iconst.i64 0 v10703 = iconst.i64 0 - store little heap v10703, v3731 - store little heap v24499, v10791 + store little region0 v10703, v3731 + store little region0 v24499, v10791 v10982 = iconst.i64 0 v11224 = iconst.i64 0 v11235 = iconst.i64 0 @@ -1775,320 +1777,320 @@ block0(v0: i64): v11316 = iconst.i64 0 v11475 = iconst.i32 0 v11722 = iconst.i64 0 - store little heap v24477, v12125 - store little heap v24488, v12143 + store little region0 v24477, v12125 + store little region0 v24488, v12143 v12261 = iconst.i64 0 - store little heap v24475, v12671 + store little region0 v24475, v12671 v13070 = iconst.i64 0 v13309 = iconst.i64 0 v13819 = iconst.i64 0 v13977 = iconst.i32 0 - store little heap v24499, v14149 + store little region0 v24499, v14149 v14238 = iconst.i64 0 v14258 = iconst.i32 0 - store little heap v24477, v1786 - store little heap v24490, v14405 - store little heap v24477, v24045 + store little region0 v24477, v1786 + store little region0 v24490, v14405 + store little region0 v24477, v24045 v14597 = iconst.i64 0 v14606 = iconst.i64 0 v15111 = iconst.i64 0 v15547 = iconst.i64 0 v15844 = iconst.i64 0 - store little heap v15844, v15849 + store little region0 v15844, v15849 v3422 = iconst.i64 0 v3431 = iconst.i64 0 - store little heap v24502, v4542 + store little region0 v24502, v4542 v4733 = iconst.i64 0 v4753 = iconst.i64 0 v4906 = iconst.i32 0 - store little heap v4906, v1786 - store little heap v24488, v4915 - store little heap v24502, v5168 - store little heap v24502, v5174 - store little heap v24502, v5563 + store little region0 v4906, v1786 + store little region0 v24488, v4915 + store little region0 v24502, v5168 + store little region0 v24502, v5174 + store little region0 v24502, v5563 v5781 = iconst.i64 0 v5833 = iconst.i64 0 - store little heap v24488, v17 - store little heap v24488, v17 - store little heap v7907, v1786 - store little heap v24477, v8126 - store little heap v24490, v17 - store little heap v24490, v24351 - store little heap v24502, v8690 + store little region0 v24488, v17 + store little region0 v24488, v17 + store little region0 v7907, v1786 + store little region0 v24477, v8126 + store little region0 v24490, v17 + store little region0 v24490, v24351 + store little region0 v24502, v8690 v8879 = iconst.i64 0 - store little heap v8879, v1786 - store little heap v8888, v8893 + store little region0 v8879, v1786 + store little region0 v8888, v8893 v9158 = iconst.i32 0 - store little heap v9158, v2901 - store little heap v24488, v9819 - store little heap v24477, v10542 + store little region0 v9158, v2901 + store little region0 v24488, v9819 + store little region0 v24477, v10542 v10580 = iconst.i64 0 - store little heap v11316, v1786 - store little heap v24488, v11331 - store little heap v24475, v11626 - store little heap v24488, v11760 - store little heap v24490, v12052 + store little region0 v11316, v1786 + store little region0 v24488, v11331 + store little region0 v24475, v11626 + store little region0 v24488, v11760 + store little region0 v24490, v12052 v12869 = iconst.i64 0 v13090 = iconst.i64 0 v13222 = iconst.i32 0 - store little heap v24488, v17 + store little region0 v24488, v17 v14173 = iconst.i64 0 v15445 = iconst.i64 0 v15454 = iconst.i64 0 - store little heap v24477, v15775 + store little region0 v24477, v15775 v15853 = iconst.i64 0 v3737 = iconst.i64 0 - store little heap v24477, v3893 + store little region0 v24477, v3893 v4426 = iconst.i64 0 v4443 = iconst.i64 0 v5179 = iconst.i32 0 v5567 = iconst.i32 0 - store little heap v24502, v5822 - store little heap v24477, v5951 - store little heap v24502, v5963 - store little heap v24488, v6351 - store little heap v24502, v6374 - store little heap v24490, v6387 - store little heap v24488, v1786 - store little heap v24502, v6636 + store little region0 v24502, v5822 + store little region0 v24477, v5951 + store little region0 v24502, v5963 + store little region0 v24488, v6351 + store little region0 v24502, v6374 + store little region0 v24490, v6387 + store little region0 v24488, v1786 + store little region0 v24502, v6636 v7233 = iconst.i64 0 v7898 = iconst.i64 0 v8476 = iconst.i64 0 v8490 = iconst.i64 0 - store little heap v24490, v8899 - store little heap v24502, v9923 + store little region0 v24490, v8899 + store little region0 v24502, v9923 v13280 = iconst.i64 0 v13497 = iconst.i64 0 v13933 = iconst.i64 0 v14084 = iconst.i64 0 - store little heap v24499, v14791 - store little heap v15111, v15116 - store little heap v24502, v17 - store little heap v24488, v15127 - store little heap v15445, v15450 - store little heap v24488, v24127 + store little region0 v24499, v14791 + store little region0 v15111, v15116 + store little region0 v24502, v17 + store little region0 v24488, v15127 + store little region0 v15445, v15450 + store little region0 v24488, v24127 v4578 = iconst.i32 0 - store little heap v24490, v6840 - store little heap v24490, v6905 + store little region0 v24490, v6840 + store little region0 v24490, v6905 v7878 = iconst.i64 0 v8696 = iconst.i32 0 v10167 = iconst.i64 0 - store little heap v24488, v10227 - store little heap v24490, v10324 - store little heap v24511, v1786 + store little region0 v24488, v10227 + store little region0 v24490, v10324 + store little region0 v24511, v1786 v11743 = iconst.i64 0 - store little heap v24490, v12137 - istore8 little heap v24477, v12516 - store little heap v24488, v12540 - store little heap v24475, v13262 - store little heap v24502, v13268 - store little heap v24477, v13529 - store little heap v24488, v2666 + store little region0 v24490, v12137 + istore8 little region0 v24477, v12516 + store little region0 v24488, v12540 + store little region0 v24475, v13262 + store little region0 v24502, v13268 + store little region0 v24477, v13529 + store little region0 v24488, v2666 v3394 = iconst.i64 0 - store little heap v24477, v4852 - store little heap v24488, v7180 + store little region0 v24477, v4852 + store little region0 v24488, v7180 v8870 = iconst.i32 0 - store little heap v24499, v9929 - store little heap v24502, v23591 - store little heap v24488, v10268 + store little region0 v24499, v9929 + store little region0 v24502, v23591 + store little region0 v24488, v10268 v10338 = iconst.i32 0 - store little heap v24477, v17 + store little region0 v24477, v17 v4949 = iconst.i32 0 - store little heap v24488, v7026 - store little heap v24490, v1786 + store little region0 v24488, v7026 + store little region0 v24490, v1786 v14013 = iconst.i64 0 - store little heap v24475, v14365 - store little heap v24477, v14840 - store little heap v24490, v14956 - store little heap v15000, v15005 - store little heap v24488, v3986 + store little region0 v24475, v14365 + store little region0 v24477, v14840 + store little region0 v24490, v14956 + store little region0 v15000, v15005 + store little region0 v24488, v3986 v4957 = iconst.i64 0 - store little heap v24488, v7592 - store little heap v24512, v7922 - store little heap v24488, v8021 + store little region0 v24488, v7592 + store little region0 v24512, v7922 + store little region0 v24488, v8021 v13300 = iconst.i64 0 - store little heap v24499, v14383 + store little region0 v24499, v14383 v14421 = iconst.i32 0 - store little heap v14421, v1786 + store little region0 v14421, v1786 v14622 = iconst.i32 0 - store little heap v14622, v1786 + store little region0 v14622, v1786 v5154 = iconst.i32 0 - store little heap v24477, v7543 - store little heap v24502, v8958 - store little heap v24488, v8964 - store little heap v24488, v8970 - store little heap v10412, v10417 - store little heap v24488, v11138 - store little heap v24488, v11395 + store little region0 v24477, v7543 + store little region0 v24502, v8958 + store little region0 v24488, v8964 + store little region0 v24488, v8970 + store little region0 v10412, v10417 + store little region0 v24488, v11138 + store little region0 v24488, v11395 v13508 = iconst.i32 0 v4374 = iconst.i64 0 - store little heap v4578, v4583 - store little heap v5154, v5157 - store little heap v24488, v17 - store little heap v24502, v2172 - store little heap v24477, v6997 - store little heap v24488, v7002 - store little heap v24502, v7047 - store little heap v24502, v9556 - store little heap v24502, v9569 - store little heap v24488, v9592 - store little heap v24490, v10712 - store little heap v24490, v24351 + store little region0 v4578, v4583 + store little region0 v5154, v5157 + store little region0 v24488, v17 + store little region0 v24502, v2172 + store little region0 v24477, v6997 + store little region0 v24488, v7002 + store little region0 v24502, v7047 + store little region0 v24502, v9556 + store little region0 v24502, v9569 + store little region0 v24488, v9592 + store little region0 v24490, v10712 + store little region0 v24490, v24351 v13647 = iconst.i32 0 - store little heap v24477, v15332 - store little heap v24488, v15338 - store little heap v24490, v24111 - store little heap v24488, v15362 - store little heap v24488, v2178 - store little heap v24488, v17 - store little heap v24488, v2233 - store little heap v24488, v2239 - store little heap v24488, v2245 - store little heap v24502, v2282 - store little heap v24488, v2288 - store little heap v24488, v2293 - store little heap v24502, v2325 - store little heap v24488, v2331 - store little heap v24488, v17 - store little heap v24502, v2344 - store little heap v24488, v1786 - store little heap v24488, v2402 - store little heap v24488, v2419 - store little heap v24488, v2455 - store little heap v24488, v2472 - store little heap v24488, v2478 - store little heap v24488, v2484 - store little heap v24502, v2496 - store little heap v24488, v2502 - store little heap v24488, v2508 - store little heap v24488, v2514 - store little heap v24502, v2526 - store little heap v24488, v2532 - store little heap v24488, v2538 - store little heap v8, v2561 - store little heap v24488, v2591 - store little heap v2619, v2624 - store little heap v24488, v17 - store little heap v24502, v1786 - store little heap v24512, v2654 - store little heap v24488, v2672 - store little heap v24488, v2678 - store little heap v24488, v2696 - store little heap v24488, v2702 - store little heap v24488, v2708 - store little heap v24488, v2728 - store little heap v24488, v2735 - store little heap v8, v2740 - store little heap v24502, v2752 - store little heap v24488, v2757 - store little heap v24488, v17 - store little heap v24488, v2766 - store little heap v24502, v2801 - store little heap v2807, v2812 - store little heap v24488, v17 - store little heap v24502, v2822 - store little heap v24488, v2838 - store little heap v24488, v2844 - store little heap v24488, v2850 - store little heap v24488, v2868 - store little heap v24488, v2874 - store little heap v24502, v2892 - store little heap v2898, v2901 - store little heap v2907, v2912 - store little heap v24488, v2917 - store little heap v24488, v17 - store little heap v24502, v2925 - store little heap v8, v2937 - store little heap v24488, v1786 - store little heap v2948, v2951 - store little heap v24488, v1786 - store little heap v24502, v2989 - store little heap v24502, v2996 - store little heap v24502, v3008 - store little heap v24502, v3043 - store little heap v24488, v3117 - store little heap v8, v3122 - store little heap v24502, v3146 - store little heap v24488, v3152 - store little heap v24502, v3167 - store little heap v8, v3178 - store little heap v24502, v17 - store little heap v24488, v3203 - store little heap v24502, v22736 - store little heap v24488, v1786 - store little heap v24502, v3219 - store little heap v24488, v3225 - store little heap v24502, v3237 - store little heap v24488, v17 - store little heap v3271, v3276 - store little heap v3282, v1786 - store little heap v24502, v3292 - store little heap v24488, v3298 - store little heap v24502, v3381 - store little heap v24488, v3387 - store little heap v8, v1786 - store little heap v3394, v1786 - store little heap v24502, v22756 - store little heap v3422, v1786 - store little heap v3431, v3436 - store little heap v24488, v3442 - store little heap v24502, v3454 - store little heap v24502, v3460 - store little heap v24502, v3472 - store little heap v24502, v3478 - store little heap v24502, v1786 - store little heap v24502, v3547 - store little heap v24488, v3553 - store little heap v24488, v3559 - store little heap v24488, v3565 - store little heap v24502, v3571 - store little heap v24502, v17 - store little heap v24502, v3609 - store little heap v24488, v3621 - store little heap v24488, v17 - store little heap v24502, v3680 - store little heap v3728, v3731 - store little heap v3737, v3742 - store little heap v24488, v3748 - store little heap v3752, v1786 - store little heap v24502, v24351 - store little heap v24502, v3766 - store little heap v24488, v3772 - store little heap v24488, v3778 - store little heap v24502, v3791 - store little heap v24502, v3803 - store little heap v8, v3842 - store little heap v24502, v3924 - store little heap v8, v1786 - store little heap v24488, v3938 - store little heap v24490, v23010 - store little heap v8, v3949 - store little heap v24488, v3955 - store little heap v24488, v3961 - store little heap v24488, v3967 - store little heap v24490, v6116 - store little heap v8, v3998 - store little heap v24502, v4005 - store little heap v24490, v23465 - store little heap v24499, v11017 - store little heap v24502, v11023 - store little heap v11033, v1786 - store little heap v24488, v17 - store little heap v24488, v11057 - store little heap v24488, v14908 - store little heap v24488, v14914 - store little heap v24475, v15189 - store little heap v24475, v15392 - store little heap v15411, v1786 - store little heap v24488, v4018 - store little heap v24488, v22842 - store little heap v24502, v4037 - store little heap v24488, v4049 - store little heap v24502, v4055 - store little heap v24502, v4061 - store little heap v24488, v17 - store little heap v24502, v1786 - store little heap v24490, v9508 + store little region0 v24477, v15332 + store little region0 v24488, v15338 + store little region0 v24490, v24111 + store little region0 v24488, v15362 + store little region0 v24488, v2178 + store little region0 v24488, v17 + store little region0 v24488, v2233 + store little region0 v24488, v2239 + store little region0 v24488, v2245 + store little region0 v24502, v2282 + store little region0 v24488, v2288 + store little region0 v24488, v2293 + store little region0 v24502, v2325 + store little region0 v24488, v2331 + store little region0 v24488, v17 + store little region0 v24502, v2344 + store little region0 v24488, v1786 + store little region0 v24488, v2402 + store little region0 v24488, v2419 + store little region0 v24488, v2455 + store little region0 v24488, v2472 + store little region0 v24488, v2478 + store little region0 v24488, v2484 + store little region0 v24502, v2496 + store little region0 v24488, v2502 + store little region0 v24488, v2508 + store little region0 v24488, v2514 + store little region0 v24502, v2526 + store little region0 v24488, v2532 + store little region0 v24488, v2538 + store little region0 v8, v2561 + store little region0 v24488, v2591 + store little region0 v2619, v2624 + store little region0 v24488, v17 + store little region0 v24502, v1786 + store little region0 v24512, v2654 + store little region0 v24488, v2672 + store little region0 v24488, v2678 + store little region0 v24488, v2696 + store little region0 v24488, v2702 + store little region0 v24488, v2708 + store little region0 v24488, v2728 + store little region0 v24488, v2735 + store little region0 v8, v2740 + store little region0 v24502, v2752 + store little region0 v24488, v2757 + store little region0 v24488, v17 + store little region0 v24488, v2766 + store little region0 v24502, v2801 + store little region0 v2807, v2812 + store little region0 v24488, v17 + store little region0 v24502, v2822 + store little region0 v24488, v2838 + store little region0 v24488, v2844 + store little region0 v24488, v2850 + store little region0 v24488, v2868 + store little region0 v24488, v2874 + store little region0 v24502, v2892 + store little region0 v2898, v2901 + store little region0 v2907, v2912 + store little region0 v24488, v2917 + store little region0 v24488, v17 + store little region0 v24502, v2925 + store little region0 v8, v2937 + store little region0 v24488, v1786 + store little region0 v2948, v2951 + store little region0 v24488, v1786 + store little region0 v24502, v2989 + store little region0 v24502, v2996 + store little region0 v24502, v3008 + store little region0 v24502, v3043 + store little region0 v24488, v3117 + store little region0 v8, v3122 + store little region0 v24502, v3146 + store little region0 v24488, v3152 + store little region0 v24502, v3167 + store little region0 v8, v3178 + store little region0 v24502, v17 + store little region0 v24488, v3203 + store little region0 v24502, v22736 + store little region0 v24488, v1786 + store little region0 v24502, v3219 + store little region0 v24488, v3225 + store little region0 v24502, v3237 + store little region0 v24488, v17 + store little region0 v3271, v3276 + store little region0 v3282, v1786 + store little region0 v24502, v3292 + store little region0 v24488, v3298 + store little region0 v24502, v3381 + store little region0 v24488, v3387 + store little region0 v8, v1786 + store little region0 v3394, v1786 + store little region0 v24502, v22756 + store little region0 v3422, v1786 + store little region0 v3431, v3436 + store little region0 v24488, v3442 + store little region0 v24502, v3454 + store little region0 v24502, v3460 + store little region0 v24502, v3472 + store little region0 v24502, v3478 + store little region0 v24502, v1786 + store little region0 v24502, v3547 + store little region0 v24488, v3553 + store little region0 v24488, v3559 + store little region0 v24488, v3565 + store little region0 v24502, v3571 + store little region0 v24502, v17 + store little region0 v24502, v3609 + store little region0 v24488, v3621 + store little region0 v24488, v17 + store little region0 v24502, v3680 + store little region0 v3728, v3731 + store little region0 v3737, v3742 + store little region0 v24488, v3748 + store little region0 v3752, v1786 + store little region0 v24502, v24351 + store little region0 v24502, v3766 + store little region0 v24488, v3772 + store little region0 v24488, v3778 + store little region0 v24502, v3791 + store little region0 v24502, v3803 + store little region0 v8, v3842 + store little region0 v24502, v3924 + store little region0 v8, v1786 + store little region0 v24488, v3938 + store little region0 v24490, v23010 + store little region0 v8, v3949 + store little region0 v24488, v3955 + store little region0 v24488, v3961 + store little region0 v24488, v3967 + store little region0 v24490, v6116 + store little region0 v8, v3998 + store little region0 v24502, v4005 + store little region0 v24490, v23465 + store little region0 v24499, v11017 + store little region0 v24502, v11023 + store little region0 v11033, v1786 + store little region0 v24488, v17 + store little region0 v24488, v11057 + store little region0 v24488, v14908 + store little region0 v24488, v14914 + store little region0 v24475, v15189 + store little region0 v24475, v15392 + store little region0 v15411, v1786 + store little region0 v24488, v4018 + store little region0 v24488, v22842 + store little region0 v24502, v4037 + store little region0 v24488, v4049 + store little region0 v24502, v4055 + store little region0 v24502, v4061 + store little region0 v24488, v17 + store little region0 v24502, v1786 + store little region0 v24490, v9508 brif v10, block42, block43 block43: @@ -2209,1071 +2211,1071 @@ block81: brif.i32 v1728, block3, block82 block82: - store.i64 little heap v1762, v24483 - store.i64 little heap v24484, v24485 - store.i64 little heap v1813, v1818 - store.i64 little heap v1843, v1848 - store.i64 little heap v1849, v24492 - store.i64 little heap v1878, v1786 - store.i64 little heap v24502, v22570 - store.i64 little heap v1962, v17 - store.i64 little heap v2010, v2015 - store.i64 little heap v2016, v2021 - store.i64 little heap v2109, v2114 - store.i64 little heap v2115, v2120 - store.i64 little heap v24490, v22610 - store.i64 little heap v2252, v2257 - store.i64 little heap v2258, v2263 - store.i64 little heap v2316, v17 - store.i64 little heap v2335, v17 - store.i64 little heap v24502, v2430 - store.i64 little heap v2485, v2490 - store.i64 little heap v2515, v2520 - store.i64 little heap v2545, v2550 - store.i64 little heap v2551, v2556 - store.i64 little heap v2679, v2684 - store.i64 little heap v2685, v2690 - store.i64 little heap v24502, v22682 - store.i64 little heap v24502, v22692 - store.i64 little heap v2741, v2746 - store.i64 little heap v24490, v2795 - store.i64 little heap v2851, v2856 - store.i64 little heap v2857, v2862 - store.i64 little heap v2881, v2886 - store.i64 little heap v24502, v3037 - store.i64 little heap v3096, v1786 - store.i64 little heap v3130, v3135 - store.i64 little heap v3158, v17 - store.i64 little heap v3192, v3197 - store.i64 little heap v3247, v3250 - store.i64 little heap v3324, v17 - store.i64 little heap v3572, v3577 - store.i64 little heap v3625, v17 - store.i64 little heap v3792, v3797 - store.i32 little heap v24477, v22803 - store.i64 little heap v3877, v22812 - store.i64 little heap v3968, v3973 - store.i64 little heap v24502, v22823 - store.i64 little heap v4006, v4011 - store.i64 little heap v4038, v4043 - store.i64 little heap v4063, v4068 - store.i64 little heap v24502, v4081 - store.i64 little heap v4087, v4092 - store.i32 little heap v24488, v4149 - store.i64 little heap v24502, v22851 - store.i64 little heap v4163, v4168 - store.i32 little heap v24488, v4174 - store.i32 little heap v24488, v4180 - store.i64 little heap v4194, v4199 - store.i32 little heap v24488, v4211 - store.i32 little heap v8, v4216 - store.i64 little heap v4217, v4222 - store.i64 little heap v4223, v4228 - store.i64 little heap v24502, v4233 - store.i64 little heap v4239, v4244 - store.i32 little heap v24488, v4260 - store.i32 little heap v24488, v4277 - store.i32 little heap v24488, v4283 - store.i64 little heap v24502, v22871 - store.i64 little heap v4312, v22881 - store.i32 little heap v24488, v4359 - store.i32 little heap v24488, v17 - store.i64 little heap v4374, v4379 - store.i32 little heap v24488, v1786 - store.i64 little heap v24502, v4395 - store.i32 little heap v24488, v4412 - store.i64 little heap v4426, v4431 - store.i64 little heap v4443, v4448 - store.i32 little heap v24488, v4454 - store.i64 little heap v4462, v4465 - store.i32 little heap v24488, v17 - store.i64 little heap v24502, v1786 - store.i64 little heap v4501, v4506 - store.i32 little heap v24488, v4512 - store.i64 little heap v24502, v4524 - store.i32 little heap v24488, v24524 - store.i32 little heap v8, v4611 - store.i64 little heap v24502, v22907 - store.i32 little heap v24488, v24526 - store.i32 little heap v24488, v24528 - store.i32 little heap v8, v4642 - store.i64 little heap v4643, v4648 - store.i32 little heap v24488, v4665 - store.i32 little heap v24488, v24530 - store.i32 little heap v8, v24532 - store.i64 little heap v4676, v4681 - store.i64 little heap v24502, v22934 - store.i32 little heap v24488, v24534 - store.i64 little heap v24502, v24536 - store.i64 little heap v24502, v4713 - store.i64 little heap v4733, v24539 - store.i64 little heap v4753, v4758 - store.i32 little heap v24488, v1786 - store.i32 little heap v24488, v4785 - store.i32 little heap v24488, v4791 - store.i64 little heap v4798, v4803 - store.i64 little heap v4804, v4809 - store.i32 little heap v24488, v4821 - store.i64 little heap v24502, v22954 - store.i64 little heap v4835, v4840 - store.i32 little heap v24488, v4846 - store.i64 little heap v4859, v4864 - store.i64 little heap v24502, v4870 - store.i64 little heap v24502, v4921 - store.i32 little heap v24488, v4927 - store.i64 little heap v24502, v4933 - store.i64 little heap v24502, v4939 - store.i32 little heap v4949, v1786 - store.i64 little heap v4957, v17 - store.i32 little heap v24488, v17 - store.i64 little heap v24502, v4987 - store.i32 little heap v24488, v5022 - store.i64 little heap v5030, v22964 - store.i64 little heap v24502, v22973 - store.i32 little heap v24488, v5048 - store.i32 little heap v24488, v5054 - store.i64 little heap v5061, v5066 - store.i64 little heap v5067, v5072 - store.i32 little heap v24488, v5084 - store.i64 little heap v5091, v5096 - store.i64 little heap v5098, v22982 - store.i32 little heap v5109, v5114 - store.i32 little heap v5118, v1786 - store.i32 little heap v24488, v5127 - store.i64 little heap v24502, v22991 - store.i64 little heap v24502, v5146 - store.i32 little heap v5179, v17 - store.i64 little heap v24502, v23001 - store.i64 little heap v5230, v5235 - store.i32 little heap v24488, v5254 - store.i64 little heap v5261, v5266 - store.i32 little heap v24488, v5279 - store.i32 little heap v24488, v5285 - store.i64 little heap v5292, v5297 - store.i64 little heap v5298, v5303 - v5310 = load.i64 little heap v5309 - store.i64 little heap v24502, v5372 - store.i64 little heap v24502, v5378 - store.i64 little heap v24502, v5410 - store.i64 little heap v5416, v5421 - store.i64 little heap v5425, v1786 - store.i32 little heap v8, v5439 - store.i32 little heap v24488, v5445 - store.i32 little heap v8, v5457 - store.i64 little heap v5458, v5463 - store.i64 little heap v5464, v5469 - store.i32 little heap v24488, v5475 - store.i32 little heap v24488, v5481 - store.i64 little heap v5488, v5493 - store.i64 little heap v5494, v5499 - store.i32 little heap v24488, v5505 - store.i32 little heap v24488, v5511 - store.i64 little heap v5518, v5523 - store.i64 little heap v24502, v5529 - store.i32 little heap v24488, v5538 - store.i32 little heap v24488, v5544 - store.i32 little heap v5567, v1786 - store.i64 little heap v5571, v17 - store.i64 little heap v5580, v5585 - store.i64 little heap v24502, v5591 - store.i64 little heap v5600, v5605 - store.i64 little heap v5630, v1786 - store.i64 little heap v5639, v5644 - store.i32 little heap v24488, v5649 - store.i32 little heap v24488, v17 - store.i64 little heap v5674, v17 - store.i64 little heap v24502, v5683 - store.i64 little heap v24502, v5688 - store.i64 little heap v24502, v24351 - store.i64 little heap v24502, v17 - store.i64 little heap v24502, v23031 - store.i64 little heap v5781, v5786 - store.i32 little heap v24488, v5792 - store.i64 little heap v24502, v5804 - store.i64 little heap v24502, v5810 - store.i64 little heap v5833, v1786 - store.i64 little heap v5842, v5847 - store.i32 little heap v24488, v5863 - store.i32 little heap v24488, v5886 - store.i32 little heap v8, v5891 - store.i64 little heap v5892, v5897 - store.i32 little heap v24488, v5909 - store.i32 little heap v24488, v5915 - store.i64 little heap v5922, v5927 - store.i32 little heap v24488, v5939 - store.i32 little heap v24488, v5945 - store.i32 little heap v8, v5968 - store.i32 little heap v24488, v5979 - store.i32 little heap v24488, v6059 - store.i32 little heap v24488, v6065 - store.i64 little heap v6072, v6077 - store.i64 little heap v24502, v6083 - store.i32 little heap v24488, v6089 - store.i32 little heap v24488, v6095 - store.i64 little heap v6104, v6109 - store.i32 little heap v24488, v6122 - store.i32 little heap v24488, v6128 - store.i64 little heap v6135, v6140 - store.i32 little heap v24488, v17 - store.i64 little heap v6205, v6208 - store.i64 little heap v24502, v6214 - store.i64 little heap v6220, v6225 - store.i32 little heap v24488, v17 - store.i64 little heap v24502, v6234 - store.i64 little heap v24502, v1786 - store.i64 little heap v6245, v6250 - store.i32 little heap v8, v6255 - store.i32 little heap v24488, v6261 - store.i32 little heap v8, v6266 - store.i32 little heap v24488, v6272 - store.i64 little heap v6280, v6285 - store.i32 little heap v24488, v6291 - store.i32 little heap v24488, v6303 - store.i64 little heap v6304, v6309 - store.i64 little heap v24502, v23099 - store.i32 little heap v24488, v6322 - store.i32 little heap v24488, v6328 - store.i64 little heap v6335, v6340 - store.i64 little heap v6341, v6346 - store.i64 little heap v24502, v23108 - v6393 = load.i64 little heap v24545 - store.i64 little heap v6432, v6437 - store.i64 little heap v6441, v1786 - store.i32 little heap v24488, v6467 - store.i32 little heap v24488, v6473 - store.i32 little heap v24488, v6479 - store.i64 little heap v6480, v6485 - store.i64 little heap v6487, v23126 - store.i32 little heap v24488, v6498 - store.i32 little heap v24488, v6504 - store.i64 little heap v6511, v6516 - store.i64 little heap v24502, v6522 - store.i32 little heap v24488, v6528 - store.i32 little heap v24488, v6534 - store.i32 little heap v24488, v6540 - store.i64 little heap v24502, v6546 - store.i64 little heap v6547, v6552 - store.i32 little heap v24488, v6557 - store.i64 little heap v24502, v6574 - store.i32 little heap v24488, v6585 - store.i32 little heap v24488, v6591 - store.i64 little heap v6624, v6629 - store.i64 little heap v6656, v1786 - store.i32 little heap v24488, v6682 - store.i32 little heap v24488, v6688 - store.i64 little heap v24502, v6700 - store.i32 little heap v24488, v6713 - store.i32 little heap v24488, v6719 - store.i32 little heap v8, v23157 - store.i64 little heap v24502, v23166 - store.i64 little heap v6733, v6738 - store.i32 little heap v24488, v6744 - store.i32 little heap v24488, v6750 - store.i32 little heap v24488, v6756 - store.i64 little heap v6758, v23176 - store.i32 little heap v24488, v17 - store.i32 little heap v24488, v6783 - store.i64 little heap v24502, v23185 - store.i32 little heap v24488, v6796 - store.i64 little heap v6810, v6815 - store.i64 little heap v6862, v1786 - store.i32 little heap v8, v6882 - store.i32 little heap v24488, v6888 - store.i32 little heap v24488, v6894 - store.i32 little heap v8, v6899 - store.i64 little heap v6906, v6911 - store.i32 little heap v24488, v6917 - store.i32 little heap v24488, v6923 - store.i64 little heap v6930, v6935 - store.i64 little heap v6936, v6941 - store.i32 little heap v24488, v6953 - store.i32 little heap v8, v6958 - store.i64 little heap v6959, v6964 - store.i64 little heap v24502, v23218 - store.i32 little heap v24488, v6976 - store.i32 little heap v24488, v17 - store.i32 little heap v24488, v6985 - store.i64 little heap v7027, v17 - store.i32 little heap v24488, v24351 - store.i64 little heap v7058, v7063 - store.i32 little heap v8, v7086 - store.i32 little heap v24488, v7092 - store.i32 little heap v24488, v7098 - store.i32 little heap v8, v7103 - store.i64 little heap v24502, v7109 - store.i64 little heap v24502, v7115 - store.i32 little heap v24488, v7121 - store.i32 little heap v24488, v7127 - store.i32 little heap v8, v7132 - store.i64 little heap v7140, v7145 - store.i32 little heap v24488, v7151 - store.i32 little heap v24488, v7157 - store.i64 little heap v7164, v7169 - store.i64 little heap v7170, v7175 - store.i32 little heap v24488, v7193 - store.i64 little heap v24502, v7199 - store.i32 little heap v24488, v7205 - store.i64 little heap v24502, v7212 - store.i64 little heap v24502, v7218 - store.i64 little heap v7233, v7236 - store.i32 little heap v24488, v17 - store.i32 little heap v24488, v7291 - store.i32 little heap v24488, v7297 - store.i32 little heap v8, v7302 - store.i64 little heap v24502, v7309 - store.i64 little heap v7310, v7315 - store.i32 little heap v24488, v7321 - store.i32 little heap v24488, v7327 - store.i64 little heap v7335, v7340 - store.i64 little heap v24502, v23246 - store.i32 little heap v24488, v7353 - store.i32 little heap v24488, v7359 - store.i32 little heap v8, v7364 - store.i64 little heap v7365, v7370 - store.i32 little heap v24488, v7395 - store.i32 little heap v24488, v7413 - store.i32 little heap v24488, v7419 - store.i32 little heap v7441, v1786 - store.i32 little heap v24488, v17 - store.i64 little heap v24502, v7472 - store.i64 little heap v24502, v1786 - store.i32 little heap v24488, v7500 - store.i32 little heap v24488, v7506 - store.i64 little heap v7514, v7519 - store.i64 little heap v7520, v7525 - store.i32 little heap v24488, v7531 - store.i32 little heap v24488, v7537 - store.i64 little heap v7544, v7549 - store.i64 little heap v7550, v7555 - store.i32 little heap v24488, v7561 - store.i32 little heap v24488, v7567 - store.i64 little heap v24502, v7581 - store.i64 little heap v7582, v7587 - store.i32 little heap v24488, v7608 - store.i64 little heap v7625, v7630 - store.i64 little heap v7653, v7658 - store.i64 little heap v24502, v7675 - store.i32 little heap v24488, v7711 - store.i32 little heap v24488, v7717 - store.i64 little heap v7718, v7723 - store.i64 little heap v24502, v23311 - store.i32 little heap v24488, v7736 - store.i32 little heap v24488, v7742 - store.i32 little heap v24488, v7748 - store.i64 little heap v7749, v7754 - store.i64 little heap v7755, v7760 - store.i32 little heap v24488, v7772 - store.i32 little heap v24488, v7778 - store.i64 little heap v7779, v7784 - store.i64 little heap v24502, v7801 - store.i32 little heap v7820, v1786 - store.i32 little heap v24488, v7857 - store.i32 little heap v24488, v17 - store.i64 little heap v7878, v7883 - store.i64 little heap v24502, v7889 - store.i64 little heap v7898, v7903 - store.i32 little heap v24488, v7933 - store.i32 little heap v24488, v7939 - store.i32 little heap v8, v7944 - store.i64 little heap v7945, v7950 - store.i64 little heap v7951, v7956 - store.i32 little heap v24488, v7962 - store.i32 little heap v24488, v7968 - store.i64 little heap v7975, v7980 - store.i64 little heap v7981, v7986 - store.i32 little heap v24488, v7998 - store.i32 little heap v24488, v8004 - store.i64 little heap v8005, v8010 - store.i64 little heap v8011, v8016 - store.i32 little heap v24488, v8032 - store.i64 little heap v24502, v23333 - store.i64 little heap v24502, v8045 - store.i64 little heap v24502, v8057 - store.i64 little heap v24502, v8063 - store.i64 little heap v8089, v17 - store.i64 little heap v8111, v8114 - store.i64 little heap v8145, v8150 - store.i32 little heap v24488, v8162 - store.i32 little heap v24488, v23351 - store.i32 little heap v8, v8174 - store.i64 little heap v8175, v8180 - store.i64 little heap v8181, v8186 - store.i64 little heap v8206, v8211 - store.i64 little heap v8212, v8217 - store.i32 little heap v24488, v17 - store.i32 little heap v24488, v8225 - store.i32 little heap v24488, v8242 - store.i64 little heap v24502, v23369 - store.i64 little heap v24502, v23378 - store.i64 little heap v24502, v8308 - store.i32 little heap v24488, v8326 - store.i32 little heap v24488, v8332 - store.i64 little heap v24502, v8344 - store.i64 little heap v8345, v8350 - store.i32 little heap v24488, v8356 - store.i32 little heap v24488, v8362 - store.i32 little heap v8, v8367 - store.i64 little heap v8368, v8373 - store.i64 little heap v8374, v8379 - store.i32 little heap v24488, v8391 - store.i64 little heap v8399, v23388 - store.i64 little heap v8405, v8410 - store.i32 little heap v24488, v8420 - store.i32 little heap v24488, v8426 - store.i64 little heap v24502, v8432 - store.i32 little heap v24488, v8438 - store.i64 little heap v24502, v8444 - store.i64 little heap v24502, v8450 - store.i32 little heap v24488, v17 - store.i64 little heap v8460, v1786 - store.i64 little heap v8476, v8481 - store.i32 little heap v24488, v1786 - store.i64 little heap v8490, v8495 - store.i64 little heap v8536, v8541 - store.i32 little heap v24488, v8553 - store.i32 little heap v24488, v8559 - store.i32 little heap v8, v8564 - store.i64 little heap v24502, v8570 - store.i64 little heap v8571, v8576 - store.i32 little heap v24488, v8588 - store.i32 little heap v8, v8593 - store.i64 little heap v8594, v8599 - store.i64 little heap v8600, v8605 - store.i32 little heap v24488, v8610 - store.i32 little heap v24488, v8629 - store.i32 little heap v24488, v8642 - store.i32 little heap v8696, v8699 - store.i64 little heap v24502, v1786 - store.i32 little heap v24488, v8735 - store.i32 little heap v24488, v8741 - store.i32 little heap v24488, v8747 - store.i64 little heap v8748, v8753 - store.i64 little heap v8754, v8759 - store.i32 little heap v24488, v8765 - store.i32 little heap v24488, v8771 - store.i32 little heap v8, v8776 - store.i64 little heap v8777, v8782 - store.i32 little heap v24488, v8801 - store.i32 little heap v8, v8806 - store.i64 little heap v24502, v8813 - store.i32 little heap v24488, v8825 - store.i32 little heap v24488, v17 - store.i32 little heap v24488, v8834 - store.i32 little heap v24488, v8846 - store.i64 little heap v24502, v8858 - store.i32 little heap v8870, v1786 - store.i64 little heap v24502, v8908 - store.i64 little heap v24502, v17 - store.i32 little heap v8, v8929 - store.i32 little heap v24488, v8935 - store.i32 little heap v24488, v8941 - store.i32 little heap v8, v8946 - store.i64 little heap v8947, v8952 - store.i32 little heap v8, v8976 - store.i64 little heap v24490, v23418 - store.i64 little heap v24502, v8989 - store.i32 little heap v24488, v8995 - store.i32 little heap v24488, v9001 - store.i64 little heap v24502, v23427 - store.i64 little heap v24502, v9020 - store.i32 little heap v9026, v9031 - store.i32 little heap v24488, v17 - store.i32 little heap v24488, v9040 - store.i64 little heap v24502, v23437 - store.i64 little heap v24502, v9059 - store.i32 little heap v24488, v17 - store.i64 little heap v9067, v17 - store.i64 little heap v24502, v23446 - store.i64 little heap v9097, v9102 - store.i32 little heap v9110, v1786 - store.i32 little heap v24488, v9126 - store.i64 little heap v9131, v3731 - store.i64 little heap v24502, v9196 - store.i64 little heap v9202, v9205 - store.i64 little heap v9211, v9216 - store.i32 little heap v24488, v9222 - store.i64 little heap v24502, v17 - store.i64 little heap v9250, v9255 - store.i64 little heap v9279, v9284 - store.i64 little heap v9285, v9290 - store.i64 little heap v24502, v1786 - store.i64 little heap v24502, v9306 - store.i32 little heap v24488, v9317 - store.i64 little heap v24502, v9329 - store.i64 little heap v24502, v9341 - store.i64 little heap v24502, v23474 - store.i32 little heap v9374, v9379 - store.i32 little heap v24488, v9385 - store.i32 little heap v24488, v9391 - store.i32 little heap v8, v9396 - store.i64 little heap v24502, v9402 - store.i64 little heap v9403, v9408 - store.i64 little heap v9419, v9424 - store.i32 little heap v24488, v9430 - store.i32 little heap v9437, v9440 - store.i64 little heap v24502, v1786 - store.i64 little heap v24502, v23491 - store.i32 little heap v24488, v9502 - store.i64 little heap v24502, v9532 - store.i32 little heap v24488, v9598 - store.i32 little heap v24488, v9604 - store.i64 little heap v9610, v9615 - store.i64 little heap v9616, v9621 - store.i64 little heap v9650, v1786 - store.i64 little heap v24502, v9659 - store.i64 little heap v24502, v24351 - store.i64 little heap v24502, v1786 - store.i64 little heap v9782, v9787 - store.i32 little heap v24488, v17 - store.i32 little heap v24488, v9801 - store.i32 little heap v24488, v9825 - store.i64 little heap v24490, v23553 - store.i64 little heap v9839, v9844 - store.i32 little heap v8, v9861 - store.i64 little heap v24502, v9867 - store.i64 little heap v9868, v9873 - store.i32 little heap v24488, v9879 - store.i64 little heap v9893, v9898 - store.i64 little heap v9899, v9904 - store.i32 little heap v24488, v23562 - store.i64 little heap v24502, v9941 - store.i32 little heap v24488, v17 - store.i64 little heap v24502, v9971 - store.i64 little heap v24502, v9977 - store.i32 little heap v24488, v9987 - store.i32 little heap v24488, v9993 - store.i32 little heap v8, v9998 - store.i64 little heap v24502, v10005 - store.i64 little heap v10006, v10011 - store.i32 little heap v24488, v10017 - store.i32 little heap v24488, v17 - store.i32 little heap v24488, v10025 - store.i64 little heap v24502, v10031 - store.i64 little heap v24502, v24351 - store.i32 little heap v8, v1786 - store.i32 little heap v24488, v10068 - store.i32 little heap v24488, v10074 - store.i64 little heap v24490, v23572 - store.i64 little heap v10088, v10093 - store.i64 little heap v10104, v1786 - store.i64 little heap v10113, v10118 - store.i32 little heap v24488, v10124 - store.i64 little heap v24502, v10136 - store.i64 little heap v24502, v10155 - store.i64 little heap v10167, v10170 - store.i64 little heap v10176, v10181 - store.i32 little heap v24488, v10201 - store.i32 little heap v24488, v10295 - store.i32 little heap v8, v23600 - store.i32 little heap v24488, v10313 - store.i32 little heap v8, v10318 - store.i32 little heap v10338, v1786 - store.i64 little heap v10344, v1786 - store.i64 little heap v24502, v10354 - store.i32 little heap v24488, v10360 - store.i64 little heap v24502, v10372 - store.i32 little heap v24488, v10432 - store.i32 little heap v8, v10443 - store.i32 little heap v10445, v23620 - store.i32 little heap v24488, v10456 - store.i32 little heap v8, v10461 - store.i64 little heap v10462, v10467 - store.i64 little heap v10469, v23629 - store.i32 little heap v24488, v10480 - store.i32 little heap v24488, v10486 - store.i32 little heap v24488, v10492 - store.i64 little heap v10493, v10498 - store.i32 little heap v24488, v10510 - store.i32 little heap v24488, v10516 - store.i32 little heap v24488, v10523 - store.i64 little heap v24502, v10529 - store.i64 little heap v24502, v23638 - store.i32 little heap v24488, v10547 - store.i64 little heap v10562, v23656 - store.i64 little heap v24502, v10573 - store.i64 little heap v10580, v1786 - store.i64 little heap v24502, v17 - store.i32 little heap v24488, v10627 - store.i32 little heap v24488, v10633 - store.i64 little heap v10641, v10646 - store.i64 little heap v10647, v10652 - store.i32 little heap v8, v1786 - store.i64 little heap v24502, v24351 - store.i64 little heap v10693, v10698 - store.i32 little heap v24488, v10718 - store.i64 little heap v10727, v1786 - store.i64 little heap v24502, v10736 - store.i32 little heap v8, v10747 - store.i32 little heap v24488, v17 - store.i64 little heap v10751, v1786 - store.i64 little heap v24502, v10760 - store.i32 little heap v24488, v10766 - store.i64 little heap v24502, v10778 - store.i64 little heap v24502, v23674 - store.i64 little heap v24502, v10797 - store.i64 little heap v24502, v10803 - store.i64 little heap v24502, v17 - store.i64 little heap v24502, v10814 - store.i64 little heap v24502, v17 - store.i64 little heap v24502, v10849 - store.i32 little heap v24488, v10855 - store.i32 little heap v24488, v1786 - store.i64 little heap v24502, v1786 - store.i64 little heap v10883, v10888 - store.i32 little heap v24488, v10894 - store.i32 little heap v8, v1786 - store.i64 little heap v24502, v1786 - store.i64 little heap v24502, v23683 - store.i32 little heap v24488, v10930 - store.i32 little heap v10934, v1786 - store.i64 little heap v24502, v10952 - store.i32 little heap v24488, v17 - store.i64 little heap v10973, v1786 - store.i64 little heap v10982, v10987 - store.i32 little heap v24488, v10993 - store.i64 little heap v24502, v11011 - store.i64 little heap v11038, v11043 - store.i32 little heap v24488, v11069 - store.i32 little heap v24488, v11075 - store.i32 little heap v24488, v11081 - store.i64 little heap v24502, v23692 - store.i64 little heap v24502, v11101 - store.i32 little heap v24488, v11107 - store.i32 little heap v24488, v11113 - store.i32 little heap v24488, v11119 - store.i64 little heap v11120, v11125 - store.i64 little heap v11127, v11132 - store.i32 little heap v24488, v11144 - store.i64 little heap v11158, v11163 - store.i64 little heap v24502, v11181 - store.i64 little heap v24502, v11199 - store.i64 little heap v11215, v17 - store.i64 little heap v11224, v11229 - store.i64 little heap v11235, v11240 - store.i32 little heap v24488, v11255 - store.i32 little heap v11265, v11270 - store.i32 little heap v11292, v11295 - store.i64 little heap v11298, v1786 - store.i32 little heap v8, v1786 - store.i64 little heap v11341, v11346 - store.i32 little heap v24488, v11363 - store.i32 little heap v8, v1786 - store.i64 little heap v24502, v24351 - store.i64 little heap v11398, v11401 - store.i64 little heap v24502, v11444 - store.i64 little heap v24502, v11460 - store.i32 little heap v24488, v17 - store.i32 little heap v11475, v11480 - store.i32 little heap v24488, v11510 - store.i64 little heap v11511, v11516 - store.i64 little heap v11517, v11522 - store.i32 little heap v24488, v11540 - store.i64 little heap v24502, v11546 - store.i64 little heap v11547, v11552 - store.i32 little heap v24488, v11558 - store.i32 little heap v24488, v11564 - store.i32 little heap v8, v11569 - store.i64 little heap v11570, v11575 - store.i32 little heap v24488, v11588 - store.i64 little heap v11596, v23741 - store.i64 little heap v24502, v11613 - store.i64 little heap v24502, v11620 - store.i32 little heap v24488, v1786 - store.i64 little heap v24502, v17 - store.i64 little heap v24502, v11657 - store.i32 little heap v24488, v11678 - store.i64 little heap v24502, v11697 - store.i32 little heap v24488, v11703 - store.i32 little heap v24488, v17 - store.i32 little heap v24488, v11711 - store.i64 little heap v24502, v11718 - store.i64 little heap v11722, v1786 - store.i32 little heap v8, v1786 - store.i64 little heap v11734, v11737 - store.i64 little heap v11743, v11748 - store.i32 little heap v24488, v11766 - store.i64 little heap v11779, v11784 - store.i64 little heap v24502, v11791 - store.i64 little heap v11811, v23760 - v11841 = load.i32 little heap v11840 - store.i64 little heap v24502, v11856 - store.i64 little heap v24502, v11875 - store.i32 little heap v24488, v1786 - store.i32 little heap v11890, v11895 - store.i32 little heap v24488, v11919 - store.i64 little heap v11925, v11930 - store.i32 little heap v8, v11954 - store.i64 little heap v24502, v11960 - store.i64 little heap v11961, v11966 - store.i32 little heap v24488, v11972 - store.i32 little heap v24488, v11978 - store.i32 little heap v24488, v11984 - store.i64 little heap v24502, v23770 - store.i64 little heap v11992, v11997 - store.i32 little heap v24488, v12003 - store.i64 little heap v24502, v12009 - store.i32 little heap v24488, v12021 - store.i32 little heap v24488, v12027 - store.i32 little heap v24488, v17 - store.i64 little heap v12043, v17 - store.i64 little heap v24502, v12080 - store.i64 little heap v12086, v12089 - store.i32 little heap v24488, v12113 - store.i32 little heap v24488, v12119 - store.i64 little heap v12126, v12131 - store.i32 little heap v24488, v12149 - store.i64 little heap v12156, v12161 - store.i64 little heap v12162, v12167 - store.i32 little heap v1523, v12177 - store.i32 little heap v24488, v12182 - store.i32 little heap v8, v12187 - store.i64 little heap v12188, v12193 - store.i64 little heap v24502, v12200 - store.i32 little heap v24488, v23793 - store.i32 little heap v24488, v1786 - store.i32 little heap v24488, v12218 - store.i64 little heap v24502, v12224 - store.i32 little heap v24488, v12230 - store.i64 little heap v24502, v12236 - store.i64 little heap v24502, v12242 - store.i64 little heap v12261, v1786 - store.i64 little heap v12270, v12275 - store.i32 little heap v12291, v2901 - store.i32 little heap v24488, v12330 - store.i32 little heap v24488, v12336 - store.i32 little heap v24488, v12342 - store.i64 little heap v12343, v12348 - store.i32 little heap v24488, v12360 - store.i32 little heap v24488, v12366 - store.i64 little heap v12380, v12385 - store.i32 little heap v24477, v23803 - store.i32 little heap v24488, v12398 - store.i32 little heap v8, v12403 - store.i64 little heap v24502, v12410 - store.i64 little heap v12411, v12416 - store.i32 little heap v24488, v12421 - store.i32 little heap v24488, v12436 - store.i64 little heap v24502, v23812 - store.i32 little heap v24488, v12449 - store.i64 little heap v24502, v12455 - store.i64 little heap v24502, v12461 - store.i64 little heap v12475, v17 - store.i64 little heap v24502, v12495 - store.i32 little heap v24488, v17 - store.i64 little heap v24502, v12505 - store.i64 little heap v24490, v23822 - store.i32 little heap v24488, v12566 - store.i32 little heap v24488, v12572 - store.i64 little heap v12579, v12584 - store.i64 little heap v12585, v12590 - store.i32 little heap v24488, v23831 - store.i32 little heap v8, v12608 - store.i64 little heap v12609, v12614 - store.i64 little heap v24502, v12620 - store.i32 little heap v24488, v17 - store.i32 little heap v24488, v12640 - store.i64 little heap v24502, v12646 - store.i32 little heap v24488, v12652 - store.i32 little heap v24488, v17 - store.i64 little heap v24502, v1786 - store.i64 little heap v24502, v12684 - store.i64 little heap v12690, v12695 - store.i32 little heap v24488, v17 - store.i64 little heap v24502, v12704 - store.i64 little heap v24502, v17 - istore8.i32 little heap v24488, v12715 - store.i32 little heap v8, v12726 - store.i32 little heap v24488, v12732 - store.i32 little heap v24488, v12738 - store.i32 little heap v24488, v12744 - store.i64 little heap v12745, v12750 - store.i64 little heap v24502, v23840 - store.i32 little heap v8, v12762 - store.i32 little heap v24488, v12768 - store.i32 little heap v8, v12773 - store.i64 little heap v12774, v12779 - store.i64 little heap v12780, v12785 - store.i32 little heap v24488, v12791 - store.i32 little heap v24488, v12797 - store.i32 little heap v8, v12802 - store.i64 little heap v12803, v12808 - store.i64 little heap v12809, v12814 - store.i32 little heap v24488, v12819 - store.i32 little heap v24488, v1786 - store.i32 little heap v24488, v12828 - store.i64 little heap v24502, v12834 - store.i32 little heap v24488, v12840 - store.i64 little heap v24502, v12846 - store.i64 little heap v24502, v12852 - store.i64 little heap v12869, v1786 - store.i64 little heap v24502, v12879 - store.i64 little heap v24502, v23849 - store.i32 little heap v24488, v17 - store.i64 little heap v24502, v12896 - store.i64 little heap v24502, v1786 - store.i32 little heap v24488, v12918 - store.i32 little heap v24488, v12931 - store.i32 little heap v8, v12936 - store.i64 little heap v12937, v12942 - store.i64 little heap v24490, v23859 - store.i32 little heap v24488, v12955 - store.i32 little heap v24488, v12961 - store.i32 little heap v8, v12966 - store.i64 little heap v12967, v12972 - store.i32 little heap v24488, v12984 - store.i32 little heap v24488, v12990 - store.i32 little heap v8, v12995 - store.i64 little heap v13003, v13008 - store.i32 little heap v24488, v13013 - store.i32 little heap v24488, v17 - store.i32 little heap v24488, v13022 - store.i32 little heap v24488, v13034 - store.i64 little heap v24502, v13046 - store.i64 little heap v13047, v13052 - store.i64 little heap v13061, v1786 - store.i64 little heap v13070, v13075 - store.i64 little heap v24502, v13081 - store.i64 little heap v13090, v13095 - istore8.i32 little heap v8, v13106 - store.i64 little heap v24502, v13112 - store.i32 little heap v24488, v13130 - store.i32 little heap v8, v13135 - store.i64 little heap v13143, v13148 - store.i32 little heap v24488, v13167 - store.i64 little heap v13168, v13173 - store.i64 little heap v24502, v13179 - store.i32 little heap v24488, v13185 - store.i32 little heap v24488, v13191 - store.i32 little heap v8, v13196 - store.i64 little heap v13197, v13202 - store.i64 little heap v24490, v23878 - store.i32 little heap v24488, v13214 - store.i32 little heap v13222, v1786 - store.i32 little heap v24488, v13231 - store.i64 little heap v24502, v13238 - store.i64 little heap v24502, v13250 - store.i64 little heap v24502, v13274 - store.i64 little heap v13280, v13285 - v13291 = load.i32 little heap v24485 - store.i64 little heap v13300, v13305 - store.i64 little heap v13309, v1786 - store.i32 little heap v8, v13330 - store.i32 little heap v24488, v13336 - store.i32 little heap v24488, v13342 - store.i32 little heap v24488, v13348 - store.i64 little heap v24502, v13354 - store.i64 little heap v13355, v13360 - store.i64 little heap v24502, v13390 - store.i32 little heap v24488, v13396 - store.i32 little heap v24488, v13402 - store.i32 little heap v24488, v13408 - store.i64 little heap v13409, v13414 - store.i32 little heap v24488, v1786 - store.i32 little heap v24488, v13435 - store.i64 little heap v24502, v13441 - store.i64 little heap v24502, v13447 - store.i64 little heap v13466, v13469 - store.i64 little heap v13483, v13488 - store.i64 little heap v13497, v13502 - store.i32 little heap v13508, v1786 - store.i32 little heap v24488, v23920 - store.i32 little heap v24488, v13540 - store.i32 little heap v24488, v13570 - store.i32 little heap v24488, v13576 - store.i32 little heap v8, v13581 - store.i64 little heap v13582, v13587 - store.i32 little heap v24488, v13599 - store.i32 little heap v24488, v13609 - store.i32 little heap v24488, v13615 - store.i64 little heap v24502, v13622 - store.i64 little heap v13623, v13628 - store.i32 little heap v13647, v13652 - store.i32 little heap v24488, v17 - store.i32 little heap v24488, v13661 - store.i64 little heap v24502, v13667 - store.i64 little heap v24502, v13673 - store.i64 little heap v24502, v13679 - store.i32 little heap v24488, v17 - store.i64 little heap v24502, v23969 - store.i32 little heap v24488, v13785 - store.i64 little heap v24502, v13795 - store.i64 little heap v13819, v13822 - store.i64 little heap v24490, v23999 - store.i64 little heap v24502, v24009 - store.i32 little heap v24488, v17 - store.i64 little heap v24502, v1786 - store.i64 little heap v13933, v13938 - store.i64 little heap v24502, v13944 - store.i64 little heap v24502, v13961 - istore8.i32 little heap v8, v13966 - store.i32 little heap v24488, v1786 - store.i32 little heap v13977, v13982 - store.i64 little heap v24502, v17 - store.i64 little heap v24502, v13993 - store.i64 little heap v14013, v17 - store.i64 little heap v24502, v14022 - store.i32 little heap v24488, v14039 - store.i32 little heap v24488, v1786 - store.i64 little heap v14043, v1786 - store.i32 little heap v24488, v14076 - store.i32 little heap v8, v1786 - store.i64 little heap v14084, v24351 - store.i64 little heap v24502, v14093 - store.i32 little heap v8, v14104 - store.i32 little heap v24488, v17 - store.i64 little heap v14109, v14112 - store.i64 little heap v24502, v14119 - store.i32 little heap v24488, v14125 - store.i64 little heap v24502, v14137 - store.i64 little heap v24502, v14155 - store.i64 little heap v24502, v14161 - store.i64 little heap v14173, v14178 - istore8.i32 little heap v8, v14183 - store.i32 little heap v24488, v17 - store.i32 little heap v24488, v14191 - store.i64 little heap v24502, v14207 - store.i32 little heap v24488, v14213 - store.i64 little heap v24502, v3731 - store.i64 little heap v14227, v14232 - store.i64 little heap v14238, v1786 - store.i64 little heap v24502, v24021 - store.i32 little heap v24488, v14254 - store.i32 little heap v14258, v1786 - store.i64 little heap v14266, v1786 - store.i64 little heap v24502, v14308 - store.i64 little heap v14314, v14319 - store.i32 little heap v24488, v17 - store.i64 little heap v14348, v14353 - store.i32 little heap v24488, v14359 - store.i64 little heap v24502, v14371 - store.i64 little heap v24502, v14377 - store.i64 little heap v24502, v14389 - store.i64 little heap v24502, v14395 - store.i64 little heap v24502, v1786 - istore8.i32 little heap v24488, v14411 - store.i32 little heap v24488, v14429 - store.i32 little heap v24488, v14442 - store.i64 little heap v14449, v14454 - store.i32 little heap v24488, v14467 - store.i32 little heap v24488, v14473 - store.i64 little heap v24502, v14485 - store.i64 little heap v14486, v14491 - store.i64 little heap v24502, v1786 - store.i64 little heap v24502, v14501 - store.i32 little heap v24488, v14507 - store.i64 little heap v14531, v14536 - store.i32 little heap v8, v14541 - store.i64 little heap v24502, v1786 - store.i64 little heap v24502, v14551 - store.i32 little heap v24488, v14557 - store.i64 little heap v24502, v14569 - store.i64 little heap v24502, v14587 - store.i64 little heap v14597, v1786 - store.i64 little heap v14606, v14611 - istore8.i32 little heap v8, v14616 - store.i32 little heap v24488, v14630 - store.i32 little heap v24488, v14636 - store.i32 little heap v24488, v14642 - store.i64 little heap v24502, v24063 - store.i64 little heap v14656, v14661 - store.i32 little heap v24488, v14680 - store.i64 little heap v14705, v14710 - store.i32 little heap v8, v14733 - store.i64 little heap v14734, v14739 - store.i64 little heap v24502, v14745 - store.i64 little heap v24502, v24351 - store.i64 little heap v14756, v14761 - store.i32 little heap v24488, v14767 - store.i64 little heap v24502, v14779 - store.i64 little heap v24502, v14797 - store.i64 little heap v24502, v17 - store.i64 little heap v24502, v14814 - store.i32 little heap v24488, v17 - store.i32 little heap v24488, v14828 - store.i32 little heap v24488, v14847 - store.i32 little heap v24488, v14853 - store.i32 little heap v24488, v14859 - store.i64 little heap v14860, v14865 - store.i64 little heap v14866, v14871 - store.i32 little heap v24488, v14883 - store.i64 little heap v24502, v24073 - store.i64 little heap v14897, v14902 - store.i32 little heap v24488, v14938 - store.i64 little heap v24502, v14944 - store.i32 little heap v24488, v14950 - store.i64 little heap v24502, v15024 - istore8.i32 little heap v8, v15030 - store.i32 little heap v24488, v15036 - store.i32 little heap v24488, v15042 - store.i64 little heap v15056, v15061 - store.i32 little heap v24488, v15073 - store.i64 little heap v15080, v15085 - store.i64 little heap v15086, v15091 - store.i32 little heap v24488, v15105 - store.i64 little heap v24502, v3731 - store.i64 little heap v24502, v24093 - store.i64 little heap v15168, v17 - store.i32 little heap v24488, v15183 - store.i64 little heap v24502, v15195 - store.i64 little heap v24502, v15202 - store.i64 little heap v24502, v15215 - istore8.i32 little heap v24477, v15241 - store.i32 little heap v24488, v17 - store.i64 little heap v15285, v15290 - store.i64 little heap v15291, v15296 - store.i32 little heap v24488, v15308 - store.i32 little heap v8, v15313 - store.i64 little heap v24502, v15319 - store.i64 little heap v15320, v15325 - store.i32 little heap v8, v15343 - store.i64 little heap v15344, v15349 - store.i32 little heap v24488, v15374 - store.i64 little heap v24502, v15386 - store.i64 little heap v15454, v1786 - istore8.i32 little heap v24488, v15463 - store.i32 little heap v24488, v15476 - store.i32 little heap v24488, v15482 - store.i64 little heap v24490, v24137 - store.i64 little heap v15490, v15495 - store.i32 little heap v24488, v15501 - store.i32 little heap v24488, v15507 - store.i32 little heap v24488, v15513 - store.i64 little heap v15514, v15519 - store.i64 little heap v15520, v15525 - store.i32 little heap v24488, v15535 - store.i64 little heap v24502, v15541 - store.i64 little heap v15547, v15550 - store.i32 little heap v24488, v15556 - store.i32 little heap v8, v1786 - store.i64 little heap v24502, v15570 - store.i64 little heap v15571, v15576 - store.i64 little heap v24502, v1786 - store.i64 little heap v24502, v15594 - store.i32 little heap v24488, v15600 - store.i64 little heap v24502, v15612 - store.i64 little heap v24502, v15630 - store.i64 little heap v24502, v15637 - store.i64 little heap v24502, v1786 - store.i64 little heap v24502, v15647 - store.i32 little heap v24488, v15685 - store.i32 little heap v24488, v15691 - store.i64 little heap v15704, v15709 - store.i32 little heap v24488, v15721 - store.i64 little heap v24502, v15739 - store.i32 little heap v24488, v15745 - store.i32 little heap v24488, v15751 - store.i64 little heap v15758, v15763 - store.i64 little heap v15764, v15769 - store.i32 little heap v24488, v15780 - store.i32 little heap v24488, v15786 - store.i64 little heap v24502, v15792 - store.i64 little heap v24502, v15798 - store.i64 little heap v15799, v15804 - store.i32 little heap v24488, v17 - store.i64 little heap v15824, v1786 - store.i64 little heap v15833, v15838 - store.i64 little heap v15853, v17 - store.i32 little heap v24488, v15867 + store.i64 little region0 v1762, v24483 + store.i64 little region0 v24484, v24485 + store.i64 little region0 v1813, v1818 + store.i64 little region0 v1843, v1848 + store.i64 little region0 v1849, v24492 + store.i64 little region0 v1878, v1786 + store.i64 little region0 v24502, v22570 + store.i64 little region0 v1962, v17 + store.i64 little region0 v2010, v2015 + store.i64 little region0 v2016, v2021 + store.i64 little region0 v2109, v2114 + store.i64 little region0 v2115, v2120 + store.i64 little region0 v24490, v22610 + store.i64 little region0 v2252, v2257 + store.i64 little region0 v2258, v2263 + store.i64 little region0 v2316, v17 + store.i64 little region0 v2335, v17 + store.i64 little region0 v24502, v2430 + store.i64 little region0 v2485, v2490 + store.i64 little region0 v2515, v2520 + store.i64 little region0 v2545, v2550 + store.i64 little region0 v2551, v2556 + store.i64 little region0 v2679, v2684 + store.i64 little region0 v2685, v2690 + store.i64 little region0 v24502, v22682 + store.i64 little region0 v24502, v22692 + store.i64 little region0 v2741, v2746 + store.i64 little region0 v24490, v2795 + store.i64 little region0 v2851, v2856 + store.i64 little region0 v2857, v2862 + store.i64 little region0 v2881, v2886 + store.i64 little region0 v24502, v3037 + store.i64 little region0 v3096, v1786 + store.i64 little region0 v3130, v3135 + store.i64 little region0 v3158, v17 + store.i64 little region0 v3192, v3197 + store.i64 little region0 v3247, v3250 + store.i64 little region0 v3324, v17 + store.i64 little region0 v3572, v3577 + store.i64 little region0 v3625, v17 + store.i64 little region0 v3792, v3797 + store.i32 little region0 v24477, v22803 + store.i64 little region0 v3877, v22812 + store.i64 little region0 v3968, v3973 + store.i64 little region0 v24502, v22823 + store.i64 little region0 v4006, v4011 + store.i64 little region0 v4038, v4043 + store.i64 little region0 v4063, v4068 + store.i64 little region0 v24502, v4081 + store.i64 little region0 v4087, v4092 + store.i32 little region0 v24488, v4149 + store.i64 little region0 v24502, v22851 + store.i64 little region0 v4163, v4168 + store.i32 little region0 v24488, v4174 + store.i32 little region0 v24488, v4180 + store.i64 little region0 v4194, v4199 + store.i32 little region0 v24488, v4211 + store.i32 little region0 v8, v4216 + store.i64 little region0 v4217, v4222 + store.i64 little region0 v4223, v4228 + store.i64 little region0 v24502, v4233 + store.i64 little region0 v4239, v4244 + store.i32 little region0 v24488, v4260 + store.i32 little region0 v24488, v4277 + store.i32 little region0 v24488, v4283 + store.i64 little region0 v24502, v22871 + store.i64 little region0 v4312, v22881 + store.i32 little region0 v24488, v4359 + store.i32 little region0 v24488, v17 + store.i64 little region0 v4374, v4379 + store.i32 little region0 v24488, v1786 + store.i64 little region0 v24502, v4395 + store.i32 little region0 v24488, v4412 + store.i64 little region0 v4426, v4431 + store.i64 little region0 v4443, v4448 + store.i32 little region0 v24488, v4454 + store.i64 little region0 v4462, v4465 + store.i32 little region0 v24488, v17 + store.i64 little region0 v24502, v1786 + store.i64 little region0 v4501, v4506 + store.i32 little region0 v24488, v4512 + store.i64 little region0 v24502, v4524 + store.i32 little region0 v24488, v24524 + store.i32 little region0 v8, v4611 + store.i64 little region0 v24502, v22907 + store.i32 little region0 v24488, v24526 + store.i32 little region0 v24488, v24528 + store.i32 little region0 v8, v4642 + store.i64 little region0 v4643, v4648 + store.i32 little region0 v24488, v4665 + store.i32 little region0 v24488, v24530 + store.i32 little region0 v8, v24532 + store.i64 little region0 v4676, v4681 + store.i64 little region0 v24502, v22934 + store.i32 little region0 v24488, v24534 + store.i64 little region0 v24502, v24536 + store.i64 little region0 v24502, v4713 + store.i64 little region0 v4733, v24539 + store.i64 little region0 v4753, v4758 + store.i32 little region0 v24488, v1786 + store.i32 little region0 v24488, v4785 + store.i32 little region0 v24488, v4791 + store.i64 little region0 v4798, v4803 + store.i64 little region0 v4804, v4809 + store.i32 little region0 v24488, v4821 + store.i64 little region0 v24502, v22954 + store.i64 little region0 v4835, v4840 + store.i32 little region0 v24488, v4846 + store.i64 little region0 v4859, v4864 + store.i64 little region0 v24502, v4870 + store.i64 little region0 v24502, v4921 + store.i32 little region0 v24488, v4927 + store.i64 little region0 v24502, v4933 + store.i64 little region0 v24502, v4939 + store.i32 little region0 v4949, v1786 + store.i64 little region0 v4957, v17 + store.i32 little region0 v24488, v17 + store.i64 little region0 v24502, v4987 + store.i32 little region0 v24488, v5022 + store.i64 little region0 v5030, v22964 + store.i64 little region0 v24502, v22973 + store.i32 little region0 v24488, v5048 + store.i32 little region0 v24488, v5054 + store.i64 little region0 v5061, v5066 + store.i64 little region0 v5067, v5072 + store.i32 little region0 v24488, v5084 + store.i64 little region0 v5091, v5096 + store.i64 little region0 v5098, v22982 + store.i32 little region0 v5109, v5114 + store.i32 little region0 v5118, v1786 + store.i32 little region0 v24488, v5127 + store.i64 little region0 v24502, v22991 + store.i64 little region0 v24502, v5146 + store.i32 little region0 v5179, v17 + store.i64 little region0 v24502, v23001 + store.i64 little region0 v5230, v5235 + store.i32 little region0 v24488, v5254 + store.i64 little region0 v5261, v5266 + store.i32 little region0 v24488, v5279 + store.i32 little region0 v24488, v5285 + store.i64 little region0 v5292, v5297 + store.i64 little region0 v5298, v5303 + v5310 = load.i64 little region0 v5309 + store.i64 little region0 v24502, v5372 + store.i64 little region0 v24502, v5378 + store.i64 little region0 v24502, v5410 + store.i64 little region0 v5416, v5421 + store.i64 little region0 v5425, v1786 + store.i32 little region0 v8, v5439 + store.i32 little region0 v24488, v5445 + store.i32 little region0 v8, v5457 + store.i64 little region0 v5458, v5463 + store.i64 little region0 v5464, v5469 + store.i32 little region0 v24488, v5475 + store.i32 little region0 v24488, v5481 + store.i64 little region0 v5488, v5493 + store.i64 little region0 v5494, v5499 + store.i32 little region0 v24488, v5505 + store.i32 little region0 v24488, v5511 + store.i64 little region0 v5518, v5523 + store.i64 little region0 v24502, v5529 + store.i32 little region0 v24488, v5538 + store.i32 little region0 v24488, v5544 + store.i32 little region0 v5567, v1786 + store.i64 little region0 v5571, v17 + store.i64 little region0 v5580, v5585 + store.i64 little region0 v24502, v5591 + store.i64 little region0 v5600, v5605 + store.i64 little region0 v5630, v1786 + store.i64 little region0 v5639, v5644 + store.i32 little region0 v24488, v5649 + store.i32 little region0 v24488, v17 + store.i64 little region0 v5674, v17 + store.i64 little region0 v24502, v5683 + store.i64 little region0 v24502, v5688 + store.i64 little region0 v24502, v24351 + store.i64 little region0 v24502, v17 + store.i64 little region0 v24502, v23031 + store.i64 little region0 v5781, v5786 + store.i32 little region0 v24488, v5792 + store.i64 little region0 v24502, v5804 + store.i64 little region0 v24502, v5810 + store.i64 little region0 v5833, v1786 + store.i64 little region0 v5842, v5847 + store.i32 little region0 v24488, v5863 + store.i32 little region0 v24488, v5886 + store.i32 little region0 v8, v5891 + store.i64 little region0 v5892, v5897 + store.i32 little region0 v24488, v5909 + store.i32 little region0 v24488, v5915 + store.i64 little region0 v5922, v5927 + store.i32 little region0 v24488, v5939 + store.i32 little region0 v24488, v5945 + store.i32 little region0 v8, v5968 + store.i32 little region0 v24488, v5979 + store.i32 little region0 v24488, v6059 + store.i32 little region0 v24488, v6065 + store.i64 little region0 v6072, v6077 + store.i64 little region0 v24502, v6083 + store.i32 little region0 v24488, v6089 + store.i32 little region0 v24488, v6095 + store.i64 little region0 v6104, v6109 + store.i32 little region0 v24488, v6122 + store.i32 little region0 v24488, v6128 + store.i64 little region0 v6135, v6140 + store.i32 little region0 v24488, v17 + store.i64 little region0 v6205, v6208 + store.i64 little region0 v24502, v6214 + store.i64 little region0 v6220, v6225 + store.i32 little region0 v24488, v17 + store.i64 little region0 v24502, v6234 + store.i64 little region0 v24502, v1786 + store.i64 little region0 v6245, v6250 + store.i32 little region0 v8, v6255 + store.i32 little region0 v24488, v6261 + store.i32 little region0 v8, v6266 + store.i32 little region0 v24488, v6272 + store.i64 little region0 v6280, v6285 + store.i32 little region0 v24488, v6291 + store.i32 little region0 v24488, v6303 + store.i64 little region0 v6304, v6309 + store.i64 little region0 v24502, v23099 + store.i32 little region0 v24488, v6322 + store.i32 little region0 v24488, v6328 + store.i64 little region0 v6335, v6340 + store.i64 little region0 v6341, v6346 + store.i64 little region0 v24502, v23108 + v6393 = load.i64 little region0 v24545 + store.i64 little region0 v6432, v6437 + store.i64 little region0 v6441, v1786 + store.i32 little region0 v24488, v6467 + store.i32 little region0 v24488, v6473 + store.i32 little region0 v24488, v6479 + store.i64 little region0 v6480, v6485 + store.i64 little region0 v6487, v23126 + store.i32 little region0 v24488, v6498 + store.i32 little region0 v24488, v6504 + store.i64 little region0 v6511, v6516 + store.i64 little region0 v24502, v6522 + store.i32 little region0 v24488, v6528 + store.i32 little region0 v24488, v6534 + store.i32 little region0 v24488, v6540 + store.i64 little region0 v24502, v6546 + store.i64 little region0 v6547, v6552 + store.i32 little region0 v24488, v6557 + store.i64 little region0 v24502, v6574 + store.i32 little region0 v24488, v6585 + store.i32 little region0 v24488, v6591 + store.i64 little region0 v6624, v6629 + store.i64 little region0 v6656, v1786 + store.i32 little region0 v24488, v6682 + store.i32 little region0 v24488, v6688 + store.i64 little region0 v24502, v6700 + store.i32 little region0 v24488, v6713 + store.i32 little region0 v24488, v6719 + store.i32 little region0 v8, v23157 + store.i64 little region0 v24502, v23166 + store.i64 little region0 v6733, v6738 + store.i32 little region0 v24488, v6744 + store.i32 little region0 v24488, v6750 + store.i32 little region0 v24488, v6756 + store.i64 little region0 v6758, v23176 + store.i32 little region0 v24488, v17 + store.i32 little region0 v24488, v6783 + store.i64 little region0 v24502, v23185 + store.i32 little region0 v24488, v6796 + store.i64 little region0 v6810, v6815 + store.i64 little region0 v6862, v1786 + store.i32 little region0 v8, v6882 + store.i32 little region0 v24488, v6888 + store.i32 little region0 v24488, v6894 + store.i32 little region0 v8, v6899 + store.i64 little region0 v6906, v6911 + store.i32 little region0 v24488, v6917 + store.i32 little region0 v24488, v6923 + store.i64 little region0 v6930, v6935 + store.i64 little region0 v6936, v6941 + store.i32 little region0 v24488, v6953 + store.i32 little region0 v8, v6958 + store.i64 little region0 v6959, v6964 + store.i64 little region0 v24502, v23218 + store.i32 little region0 v24488, v6976 + store.i32 little region0 v24488, v17 + store.i32 little region0 v24488, v6985 + store.i64 little region0 v7027, v17 + store.i32 little region0 v24488, v24351 + store.i64 little region0 v7058, v7063 + store.i32 little region0 v8, v7086 + store.i32 little region0 v24488, v7092 + store.i32 little region0 v24488, v7098 + store.i32 little region0 v8, v7103 + store.i64 little region0 v24502, v7109 + store.i64 little region0 v24502, v7115 + store.i32 little region0 v24488, v7121 + store.i32 little region0 v24488, v7127 + store.i32 little region0 v8, v7132 + store.i64 little region0 v7140, v7145 + store.i32 little region0 v24488, v7151 + store.i32 little region0 v24488, v7157 + store.i64 little region0 v7164, v7169 + store.i64 little region0 v7170, v7175 + store.i32 little region0 v24488, v7193 + store.i64 little region0 v24502, v7199 + store.i32 little region0 v24488, v7205 + store.i64 little region0 v24502, v7212 + store.i64 little region0 v24502, v7218 + store.i64 little region0 v7233, v7236 + store.i32 little region0 v24488, v17 + store.i32 little region0 v24488, v7291 + store.i32 little region0 v24488, v7297 + store.i32 little region0 v8, v7302 + store.i64 little region0 v24502, v7309 + store.i64 little region0 v7310, v7315 + store.i32 little region0 v24488, v7321 + store.i32 little region0 v24488, v7327 + store.i64 little region0 v7335, v7340 + store.i64 little region0 v24502, v23246 + store.i32 little region0 v24488, v7353 + store.i32 little region0 v24488, v7359 + store.i32 little region0 v8, v7364 + store.i64 little region0 v7365, v7370 + store.i32 little region0 v24488, v7395 + store.i32 little region0 v24488, v7413 + store.i32 little region0 v24488, v7419 + store.i32 little region0 v7441, v1786 + store.i32 little region0 v24488, v17 + store.i64 little region0 v24502, v7472 + store.i64 little region0 v24502, v1786 + store.i32 little region0 v24488, v7500 + store.i32 little region0 v24488, v7506 + store.i64 little region0 v7514, v7519 + store.i64 little region0 v7520, v7525 + store.i32 little region0 v24488, v7531 + store.i32 little region0 v24488, v7537 + store.i64 little region0 v7544, v7549 + store.i64 little region0 v7550, v7555 + store.i32 little region0 v24488, v7561 + store.i32 little region0 v24488, v7567 + store.i64 little region0 v24502, v7581 + store.i64 little region0 v7582, v7587 + store.i32 little region0 v24488, v7608 + store.i64 little region0 v7625, v7630 + store.i64 little region0 v7653, v7658 + store.i64 little region0 v24502, v7675 + store.i32 little region0 v24488, v7711 + store.i32 little region0 v24488, v7717 + store.i64 little region0 v7718, v7723 + store.i64 little region0 v24502, v23311 + store.i32 little region0 v24488, v7736 + store.i32 little region0 v24488, v7742 + store.i32 little region0 v24488, v7748 + store.i64 little region0 v7749, v7754 + store.i64 little region0 v7755, v7760 + store.i32 little region0 v24488, v7772 + store.i32 little region0 v24488, v7778 + store.i64 little region0 v7779, v7784 + store.i64 little region0 v24502, v7801 + store.i32 little region0 v7820, v1786 + store.i32 little region0 v24488, v7857 + store.i32 little region0 v24488, v17 + store.i64 little region0 v7878, v7883 + store.i64 little region0 v24502, v7889 + store.i64 little region0 v7898, v7903 + store.i32 little region0 v24488, v7933 + store.i32 little region0 v24488, v7939 + store.i32 little region0 v8, v7944 + store.i64 little region0 v7945, v7950 + store.i64 little region0 v7951, v7956 + store.i32 little region0 v24488, v7962 + store.i32 little region0 v24488, v7968 + store.i64 little region0 v7975, v7980 + store.i64 little region0 v7981, v7986 + store.i32 little region0 v24488, v7998 + store.i32 little region0 v24488, v8004 + store.i64 little region0 v8005, v8010 + store.i64 little region0 v8011, v8016 + store.i32 little region0 v24488, v8032 + store.i64 little region0 v24502, v23333 + store.i64 little region0 v24502, v8045 + store.i64 little region0 v24502, v8057 + store.i64 little region0 v24502, v8063 + store.i64 little region0 v8089, v17 + store.i64 little region0 v8111, v8114 + store.i64 little region0 v8145, v8150 + store.i32 little region0 v24488, v8162 + store.i32 little region0 v24488, v23351 + store.i32 little region0 v8, v8174 + store.i64 little region0 v8175, v8180 + store.i64 little region0 v8181, v8186 + store.i64 little region0 v8206, v8211 + store.i64 little region0 v8212, v8217 + store.i32 little region0 v24488, v17 + store.i32 little region0 v24488, v8225 + store.i32 little region0 v24488, v8242 + store.i64 little region0 v24502, v23369 + store.i64 little region0 v24502, v23378 + store.i64 little region0 v24502, v8308 + store.i32 little region0 v24488, v8326 + store.i32 little region0 v24488, v8332 + store.i64 little region0 v24502, v8344 + store.i64 little region0 v8345, v8350 + store.i32 little region0 v24488, v8356 + store.i32 little region0 v24488, v8362 + store.i32 little region0 v8, v8367 + store.i64 little region0 v8368, v8373 + store.i64 little region0 v8374, v8379 + store.i32 little region0 v24488, v8391 + store.i64 little region0 v8399, v23388 + store.i64 little region0 v8405, v8410 + store.i32 little region0 v24488, v8420 + store.i32 little region0 v24488, v8426 + store.i64 little region0 v24502, v8432 + store.i32 little region0 v24488, v8438 + store.i64 little region0 v24502, v8444 + store.i64 little region0 v24502, v8450 + store.i32 little region0 v24488, v17 + store.i64 little region0 v8460, v1786 + store.i64 little region0 v8476, v8481 + store.i32 little region0 v24488, v1786 + store.i64 little region0 v8490, v8495 + store.i64 little region0 v8536, v8541 + store.i32 little region0 v24488, v8553 + store.i32 little region0 v24488, v8559 + store.i32 little region0 v8, v8564 + store.i64 little region0 v24502, v8570 + store.i64 little region0 v8571, v8576 + store.i32 little region0 v24488, v8588 + store.i32 little region0 v8, v8593 + store.i64 little region0 v8594, v8599 + store.i64 little region0 v8600, v8605 + store.i32 little region0 v24488, v8610 + store.i32 little region0 v24488, v8629 + store.i32 little region0 v24488, v8642 + store.i32 little region0 v8696, v8699 + store.i64 little region0 v24502, v1786 + store.i32 little region0 v24488, v8735 + store.i32 little region0 v24488, v8741 + store.i32 little region0 v24488, v8747 + store.i64 little region0 v8748, v8753 + store.i64 little region0 v8754, v8759 + store.i32 little region0 v24488, v8765 + store.i32 little region0 v24488, v8771 + store.i32 little region0 v8, v8776 + store.i64 little region0 v8777, v8782 + store.i32 little region0 v24488, v8801 + store.i32 little region0 v8, v8806 + store.i64 little region0 v24502, v8813 + store.i32 little region0 v24488, v8825 + store.i32 little region0 v24488, v17 + store.i32 little region0 v24488, v8834 + store.i32 little region0 v24488, v8846 + store.i64 little region0 v24502, v8858 + store.i32 little region0 v8870, v1786 + store.i64 little region0 v24502, v8908 + store.i64 little region0 v24502, v17 + store.i32 little region0 v8, v8929 + store.i32 little region0 v24488, v8935 + store.i32 little region0 v24488, v8941 + store.i32 little region0 v8, v8946 + store.i64 little region0 v8947, v8952 + store.i32 little region0 v8, v8976 + store.i64 little region0 v24490, v23418 + store.i64 little region0 v24502, v8989 + store.i32 little region0 v24488, v8995 + store.i32 little region0 v24488, v9001 + store.i64 little region0 v24502, v23427 + store.i64 little region0 v24502, v9020 + store.i32 little region0 v9026, v9031 + store.i32 little region0 v24488, v17 + store.i32 little region0 v24488, v9040 + store.i64 little region0 v24502, v23437 + store.i64 little region0 v24502, v9059 + store.i32 little region0 v24488, v17 + store.i64 little region0 v9067, v17 + store.i64 little region0 v24502, v23446 + store.i64 little region0 v9097, v9102 + store.i32 little region0 v9110, v1786 + store.i32 little region0 v24488, v9126 + store.i64 little region0 v9131, v3731 + store.i64 little region0 v24502, v9196 + store.i64 little region0 v9202, v9205 + store.i64 little region0 v9211, v9216 + store.i32 little region0 v24488, v9222 + store.i64 little region0 v24502, v17 + store.i64 little region0 v9250, v9255 + store.i64 little region0 v9279, v9284 + store.i64 little region0 v9285, v9290 + store.i64 little region0 v24502, v1786 + store.i64 little region0 v24502, v9306 + store.i32 little region0 v24488, v9317 + store.i64 little region0 v24502, v9329 + store.i64 little region0 v24502, v9341 + store.i64 little region0 v24502, v23474 + store.i32 little region0 v9374, v9379 + store.i32 little region0 v24488, v9385 + store.i32 little region0 v24488, v9391 + store.i32 little region0 v8, v9396 + store.i64 little region0 v24502, v9402 + store.i64 little region0 v9403, v9408 + store.i64 little region0 v9419, v9424 + store.i32 little region0 v24488, v9430 + store.i32 little region0 v9437, v9440 + store.i64 little region0 v24502, v1786 + store.i64 little region0 v24502, v23491 + store.i32 little region0 v24488, v9502 + store.i64 little region0 v24502, v9532 + store.i32 little region0 v24488, v9598 + store.i32 little region0 v24488, v9604 + store.i64 little region0 v9610, v9615 + store.i64 little region0 v9616, v9621 + store.i64 little region0 v9650, v1786 + store.i64 little region0 v24502, v9659 + store.i64 little region0 v24502, v24351 + store.i64 little region0 v24502, v1786 + store.i64 little region0 v9782, v9787 + store.i32 little region0 v24488, v17 + store.i32 little region0 v24488, v9801 + store.i32 little region0 v24488, v9825 + store.i64 little region0 v24490, v23553 + store.i64 little region0 v9839, v9844 + store.i32 little region0 v8, v9861 + store.i64 little region0 v24502, v9867 + store.i64 little region0 v9868, v9873 + store.i32 little region0 v24488, v9879 + store.i64 little region0 v9893, v9898 + store.i64 little region0 v9899, v9904 + store.i32 little region0 v24488, v23562 + store.i64 little region0 v24502, v9941 + store.i32 little region0 v24488, v17 + store.i64 little region0 v24502, v9971 + store.i64 little region0 v24502, v9977 + store.i32 little region0 v24488, v9987 + store.i32 little region0 v24488, v9993 + store.i32 little region0 v8, v9998 + store.i64 little region0 v24502, v10005 + store.i64 little region0 v10006, v10011 + store.i32 little region0 v24488, v10017 + store.i32 little region0 v24488, v17 + store.i32 little region0 v24488, v10025 + store.i64 little region0 v24502, v10031 + store.i64 little region0 v24502, v24351 + store.i32 little region0 v8, v1786 + store.i32 little region0 v24488, v10068 + store.i32 little region0 v24488, v10074 + store.i64 little region0 v24490, v23572 + store.i64 little region0 v10088, v10093 + store.i64 little region0 v10104, v1786 + store.i64 little region0 v10113, v10118 + store.i32 little region0 v24488, v10124 + store.i64 little region0 v24502, v10136 + store.i64 little region0 v24502, v10155 + store.i64 little region0 v10167, v10170 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store.i32 little region0 v24488, v10523 + store.i64 little region0 v24502, v10529 + store.i64 little region0 v24502, v23638 + store.i32 little region0 v24488, v10547 + store.i64 little region0 v10562, v23656 + store.i64 little region0 v24502, v10573 + store.i64 little region0 v10580, v1786 + store.i64 little region0 v24502, v17 + store.i32 little region0 v24488, v10627 + store.i32 little region0 v24488, v10633 + store.i64 little region0 v10641, v10646 + store.i64 little region0 v10647, v10652 + store.i32 little region0 v8, v1786 + store.i64 little region0 v24502, v24351 + store.i64 little region0 v10693, v10698 + store.i32 little region0 v24488, v10718 + store.i64 little region0 v10727, v1786 + store.i64 little region0 v24502, v10736 + store.i32 little region0 v8, v10747 + store.i32 little region0 v24488, v17 + store.i64 little region0 v10751, v1786 + store.i64 little region0 v24502, v10760 + store.i32 little region0 v24488, v10766 + store.i64 little region0 v24502, v10778 + store.i64 little region0 v24502, v23674 + store.i64 little region0 v24502, v10797 + store.i64 little region0 v24502, v10803 + store.i64 little region0 v24502, v17 + store.i64 little region0 v24502, v10814 + store.i64 little region0 v24502, v17 + store.i64 little region0 v24502, v10849 + store.i32 little region0 v24488, v10855 + store.i32 little region0 v24488, v1786 + store.i64 little region0 v24502, v1786 + store.i64 little region0 v10883, v10888 + store.i32 little region0 v24488, v10894 + store.i32 little region0 v8, v1786 + store.i64 little region0 v24502, v1786 + store.i64 little region0 v24502, v23683 + store.i32 little region0 v24488, v10930 + store.i32 little region0 v10934, v1786 + store.i64 little region0 v24502, v10952 + store.i32 little region0 v24488, v17 + store.i64 little region0 v10973, v1786 + store.i64 little region0 v10982, v10987 + store.i32 little region0 v24488, v10993 + store.i64 little region0 v24502, v11011 + store.i64 little region0 v11038, v11043 + store.i32 little region0 v24488, v11069 + store.i32 little region0 v24488, v11075 + store.i32 little region0 v24488, v11081 + store.i64 little region0 v24502, v23692 + store.i64 little region0 v24502, v11101 + store.i32 little region0 v24488, v11107 + store.i32 little region0 v24488, v11113 + store.i32 little region0 v24488, v11119 + store.i64 little region0 v11120, v11125 + store.i64 little region0 v11127, v11132 + store.i32 little region0 v24488, v11144 + store.i64 little region0 v11158, v11163 + store.i64 little region0 v24502, v11181 + store.i64 little region0 v24502, v11199 + store.i64 little region0 v11215, v17 + store.i64 little region0 v11224, v11229 + store.i64 little region0 v11235, v11240 + store.i32 little region0 v24488, v11255 + store.i32 little region0 v11265, v11270 + store.i32 little region0 v11292, v11295 + store.i64 little region0 v11298, v1786 + store.i32 little region0 v8, v1786 + store.i64 little region0 v11341, v11346 + store.i32 little region0 v24488, v11363 + store.i32 little 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v24488, v11678 + store.i64 little region0 v24502, v11697 + store.i32 little region0 v24488, v11703 + store.i32 little region0 v24488, v17 + store.i32 little region0 v24488, v11711 + store.i64 little region0 v24502, v11718 + store.i64 little region0 v11722, v1786 + store.i32 little region0 v8, v1786 + store.i64 little region0 v11734, v11737 + store.i64 little region0 v11743, v11748 + store.i32 little region0 v24488, v11766 + store.i64 little region0 v11779, v11784 + store.i64 little region0 v24502, v11791 + store.i64 little region0 v11811, v23760 + v11841 = load.i32 little region0 v11840 + store.i64 little region0 v24502, v11856 + store.i64 little region0 v24502, v11875 + store.i32 little region0 v24488, v1786 + store.i32 little region0 v11890, v11895 + store.i32 little region0 v24488, v11919 + store.i64 little region0 v11925, v11930 + store.i32 little region0 v8, v11954 + store.i64 little region0 v24502, v11960 + store.i64 little region0 v11961, v11966 + store.i32 little region0 v24488, v11972 + store.i32 little region0 v24488, v11978 + store.i32 little region0 v24488, v11984 + store.i64 little region0 v24502, v23770 + store.i64 little region0 v11992, v11997 + store.i32 little region0 v24488, v12003 + store.i64 little region0 v24502, v12009 + store.i32 little region0 v24488, v12021 + store.i32 little region0 v24488, v12027 + store.i32 little region0 v24488, v17 + store.i64 little region0 v12043, v17 + store.i64 little region0 v24502, v12080 + store.i64 little region0 v12086, v12089 + store.i32 little region0 v24488, v12113 + store.i32 little region0 v24488, v12119 + store.i64 little region0 v12126, v12131 + store.i32 little region0 v24488, v12149 + store.i64 little region0 v12156, v12161 + store.i64 little region0 v12162, v12167 + store.i32 little region0 v1523, v12177 + store.i32 little region0 v24488, v12182 + store.i32 little region0 v8, v12187 + store.i64 little region0 v12188, v12193 + store.i64 little region0 v24502, v12200 + store.i32 little region0 v24488, v23793 + store.i32 little region0 v24488, v1786 + store.i32 little region0 v24488, v12218 + store.i64 little region0 v24502, v12224 + store.i32 little region0 v24488, v12230 + store.i64 little region0 v24502, v12236 + store.i64 little region0 v24502, v12242 + store.i64 little region0 v12261, v1786 + store.i64 little region0 v12270, v12275 + store.i32 little region0 v12291, v2901 + store.i32 little region0 v24488, v12330 + store.i32 little region0 v24488, v12336 + store.i32 little region0 v24488, v12342 + store.i64 little region0 v12343, v12348 + store.i32 little region0 v24488, v12360 + store.i32 little region0 v24488, v12366 + store.i64 little region0 v12380, v12385 + store.i32 little region0 v24477, v23803 + store.i32 little region0 v24488, v12398 + store.i32 little region0 v8, v12403 + store.i64 little region0 v24502, v12410 + store.i64 little region0 v12411, v12416 + store.i32 little region0 v24488, v12421 + store.i32 little region0 v24488, v12436 + store.i64 little region0 v24502, v23812 + store.i32 little region0 v24488, v12449 + store.i64 little region0 v24502, v12455 + store.i64 little region0 v24502, v12461 + store.i64 little region0 v12475, v17 + store.i64 little region0 v24502, v12495 + store.i32 little region0 v24488, v17 + store.i64 little region0 v24502, v12505 + store.i64 little region0 v24490, v23822 + store.i32 little region0 v24488, v12566 + store.i32 little region0 v24488, v12572 + store.i64 little region0 v12579, v12584 + store.i64 little region0 v12585, v12590 + store.i32 little region0 v24488, v23831 + store.i32 little region0 v8, v12608 + store.i64 little region0 v12609, v12614 + store.i64 little region0 v24502, v12620 + store.i32 little region0 v24488, v17 + store.i32 little region0 v24488, v12640 + store.i64 little region0 v24502, v12646 + store.i32 little region0 v24488, v12652 + store.i32 little region0 v24488, v17 + store.i64 little region0 v24502, v1786 + store.i64 little region0 v24502, v12684 + store.i64 little region0 v12690, v12695 + store.i32 little region0 v24488, v17 + store.i64 little region0 v24502, v12704 + store.i64 little region0 v24502, v17 + istore8.i32 little region0 v24488, v12715 + store.i32 little region0 v8, v12726 + store.i32 little region0 v24488, v12732 + store.i32 little region0 v24488, v12738 + store.i32 little region0 v24488, v12744 + store.i64 little region0 v12745, v12750 + store.i64 little region0 v24502, v23840 + store.i32 little region0 v8, v12762 + store.i32 little region0 v24488, v12768 + store.i32 little region0 v8, v12773 + store.i64 little region0 v12774, v12779 + store.i64 little region0 v12780, v12785 + store.i32 little region0 v24488, v12791 + store.i32 little region0 v24488, v12797 + store.i32 little region0 v8, v12802 + store.i64 little region0 v12803, v12808 + store.i64 little region0 v12809, v12814 + store.i32 little region0 v24488, v12819 + store.i32 little region0 v24488, v1786 + store.i32 little region0 v24488, v12828 + store.i64 little region0 v24502, v12834 + store.i32 little region0 v24488, v12840 + store.i64 little region0 v24502, v12846 + store.i64 little region0 v24502, v12852 + store.i64 little region0 v12869, v1786 + store.i64 little region0 v24502, v12879 + store.i64 little region0 v24502, v23849 + store.i32 little region0 v24488, v17 + store.i64 little region0 v24502, v12896 + store.i64 little region0 v24502, v1786 + store.i32 little region0 v24488, v12918 + store.i32 little region0 v24488, v12931 + store.i32 little region0 v8, v12936 + store.i64 little region0 v12937, v12942 + store.i64 little region0 v24490, v23859 + store.i32 little region0 v24488, v12955 + store.i32 little region0 v24488, v12961 + store.i32 little region0 v8, v12966 + store.i64 little region0 v12967, v12972 + store.i32 little region0 v24488, v12984 + store.i32 little region0 v24488, v12990 + store.i32 little region0 v8, v12995 + store.i64 little region0 v13003, v13008 + store.i32 little region0 v24488, v13013 + store.i32 little region0 v24488, v17 + store.i32 little region0 v24488, v13022 + store.i32 little region0 v24488, v13034 + store.i64 little region0 v24502, v13046 + store.i64 little region0 v13047, v13052 + store.i64 little region0 v13061, v1786 + store.i64 little region0 v13070, v13075 + store.i64 little region0 v24502, v13081 + store.i64 little region0 v13090, v13095 + istore8.i32 little region0 v8, v13106 + store.i64 little region0 v24502, v13112 + store.i32 little region0 v24488, v13130 + store.i32 little region0 v8, v13135 + store.i64 little region0 v13143, v13148 + store.i32 little region0 v24488, v13167 + store.i64 little region0 v13168, v13173 + store.i64 little region0 v24502, v13179 + store.i32 little region0 v24488, v13185 + store.i32 little region0 v24488, v13191 + store.i32 little region0 v8, v13196 + store.i64 little region0 v13197, v13202 + store.i64 little region0 v24490, v23878 + store.i32 little region0 v24488, v13214 + store.i32 little region0 v13222, v1786 + store.i32 little region0 v24488, v13231 + store.i64 little region0 v24502, v13238 + store.i64 little region0 v24502, v13250 + store.i64 little region0 v24502, v13274 + store.i64 little region0 v13280, v13285 + v13291 = load.i32 little region0 v24485 + store.i64 little region0 v13300, v13305 + store.i64 little region0 v13309, v1786 + store.i32 little region0 v8, v13330 + store.i32 little region0 v24488, v13336 + store.i32 little region0 v24488, v13342 + store.i32 little region0 v24488, v13348 + store.i64 little region0 v24502, v13354 + store.i64 little region0 v13355, v13360 + store.i64 little region0 v24502, v13390 + store.i32 little region0 v24488, v13396 + store.i32 little region0 v24488, v13402 + store.i32 little region0 v24488, v13408 + store.i64 little region0 v13409, v13414 + store.i32 little region0 v24488, v1786 + store.i32 little region0 v24488, v13435 + store.i64 little region0 v24502, v13441 + store.i64 little region0 v24502, v13447 + store.i64 little region0 v13466, v13469 + store.i64 little region0 v13483, v13488 + store.i64 little region0 v13497, v13502 + store.i32 little region0 v13508, v1786 + store.i32 little region0 v24488, v23920 + store.i32 little region0 v24488, v13540 + store.i32 little region0 v24488, v13570 + store.i32 little region0 v24488, v13576 + store.i32 little region0 v8, v13581 + store.i64 little region0 v13582, v13587 + store.i32 little region0 v24488, v13599 + store.i32 little region0 v24488, v13609 + store.i32 little region0 v24488, v13615 + store.i64 little region0 v24502, v13622 + store.i64 little region0 v13623, v13628 + store.i32 little region0 v13647, v13652 + store.i32 little region0 v24488, v17 + store.i32 little region0 v24488, v13661 + store.i64 little region0 v24502, v13667 + store.i64 little region0 v24502, v13673 + store.i64 little region0 v24502, v13679 + store.i32 little region0 v24488, v17 + store.i64 little region0 v24502, v23969 + store.i32 little region0 v24488, v13785 + store.i64 little region0 v24502, v13795 + store.i64 little region0 v13819, v13822 + store.i64 little region0 v24490, v23999 + store.i64 little region0 v24502, v24009 + store.i32 little region0 v24488, v17 + store.i64 little region0 v24502, v1786 + store.i64 little region0 v13933, v13938 + store.i64 little region0 v24502, v13944 + store.i64 little region0 v24502, v13961 + istore8.i32 little region0 v8, v13966 + store.i32 little region0 v24488, v1786 + store.i32 little region0 v13977, v13982 + store.i64 little region0 v24502, v17 + store.i64 little region0 v24502, v13993 + store.i64 little region0 v14013, v17 + store.i64 little region0 v24502, v14022 + store.i32 little region0 v24488, v14039 + store.i32 little region0 v24488, v1786 + store.i64 little region0 v14043, v1786 + store.i32 little region0 v24488, v14076 + store.i32 little region0 v8, v1786 + store.i64 little region0 v14084, v24351 + store.i64 little region0 v24502, v14093 + store.i32 little region0 v8, v14104 + store.i32 little region0 v24488, v17 + store.i64 little region0 v14109, v14112 + store.i64 little region0 v24502, v14119 + store.i32 little region0 v24488, v14125 + store.i64 little region0 v24502, v14137 + store.i64 little region0 v24502, v14155 + store.i64 little region0 v24502, v14161 + store.i64 little region0 v14173, v14178 + istore8.i32 little region0 v8, v14183 + store.i32 little region0 v24488, v17 + store.i32 little region0 v24488, v14191 + store.i64 little region0 v24502, v14207 + store.i32 little region0 v24488, v14213 + store.i64 little region0 v24502, v3731 + store.i64 little region0 v14227, v14232 + store.i64 little region0 v14238, v1786 + store.i64 little region0 v24502, v24021 + store.i32 little region0 v24488, v14254 + store.i32 little region0 v14258, v1786 + store.i64 little region0 v14266, v1786 + store.i64 little region0 v24502, v14308 + store.i64 little region0 v14314, v14319 + store.i32 little region0 v24488, v17 + store.i64 little region0 v14348, v14353 + store.i32 little region0 v24488, v14359 + store.i64 little region0 v24502, v14371 + store.i64 little region0 v24502, v14377 + store.i64 little region0 v24502, v14389 + store.i64 little region0 v24502, v14395 + store.i64 little region0 v24502, v1786 + istore8.i32 little region0 v24488, v14411 + store.i32 little region0 v24488, v14429 + store.i32 little region0 v24488, v14442 + store.i64 little region0 v14449, v14454 + store.i32 little region0 v24488, v14467 + store.i32 little region0 v24488, v14473 + store.i64 little region0 v24502, v14485 + store.i64 little region0 v14486, v14491 + store.i64 little region0 v24502, v1786 + store.i64 little region0 v24502, v14501 + store.i32 little region0 v24488, v14507 + store.i64 little region0 v14531, v14536 + store.i32 little region0 v8, v14541 + store.i64 little region0 v24502, v1786 + store.i64 little region0 v24502, v14551 + store.i32 little region0 v24488, v14557 + store.i64 little region0 v24502, v14569 + store.i64 little region0 v24502, v14587 + store.i64 little region0 v14597, v1786 + store.i64 little region0 v14606, v14611 + istore8.i32 little region0 v8, v14616 + store.i32 little region0 v24488, v14630 + store.i32 little region0 v24488, v14636 + store.i32 little region0 v24488, v14642 + store.i64 little region0 v24502, v24063 + store.i64 little region0 v14656, v14661 + store.i32 little region0 v24488, v14680 + store.i64 little region0 v14705, v14710 + store.i32 little region0 v8, v14733 + store.i64 little region0 v14734, v14739 + store.i64 little region0 v24502, v14745 + store.i64 little region0 v24502, v24351 + store.i64 little region0 v14756, v14761 + store.i32 little region0 v24488, v14767 + store.i64 little region0 v24502, v14779 + store.i64 little region0 v24502, v14797 + store.i64 little region0 v24502, v17 + store.i64 little region0 v24502, v14814 + store.i32 little region0 v24488, v17 + store.i32 little region0 v24488, v14828 + store.i32 little region0 v24488, v14847 + store.i32 little region0 v24488, v14853 + store.i32 little region0 v24488, v14859 + store.i64 little region0 v14860, v14865 + store.i64 little region0 v14866, v14871 + store.i32 little region0 v24488, v14883 + store.i64 little region0 v24502, v24073 + store.i64 little region0 v14897, v14902 + store.i32 little region0 v24488, v14938 + store.i64 little region0 v24502, v14944 + store.i32 little region0 v24488, v14950 + store.i64 little region0 v24502, v15024 + istore8.i32 little region0 v8, v15030 + store.i32 little region0 v24488, v15036 + store.i32 little region0 v24488, v15042 + store.i64 little region0 v15056, v15061 + store.i32 little region0 v24488, v15073 + store.i64 little region0 v15080, v15085 + store.i64 little region0 v15086, v15091 + store.i32 little region0 v24488, v15105 + store.i64 little region0 v24502, v3731 + store.i64 little region0 v24502, v24093 + store.i64 little region0 v15168, v17 + store.i32 little region0 v24488, v15183 + store.i64 little region0 v24502, v15195 + store.i64 little region0 v24502, v15202 + store.i64 little region0 v24502, v15215 + istore8.i32 little region0 v24477, v15241 + store.i32 little region0 v24488, v17 + store.i64 little region0 v15285, v15290 + store.i64 little region0 v15291, v15296 + store.i32 little region0 v24488, v15308 + store.i32 little region0 v8, v15313 + store.i64 little region0 v24502, v15319 + store.i64 little region0 v15320, v15325 + store.i32 little region0 v8, v15343 + store.i64 little region0 v15344, v15349 + store.i32 little region0 v24488, v15374 + store.i64 little region0 v24502, v15386 + store.i64 little region0 v15454, v1786 + istore8.i32 little region0 v24488, v15463 + store.i32 little region0 v24488, v15476 + store.i32 little region0 v24488, v15482 + store.i64 little region0 v24490, v24137 + store.i64 little region0 v15490, v15495 + store.i32 little region0 v24488, v15501 + store.i32 little region0 v24488, v15507 + store.i32 little region0 v24488, v15513 + store.i64 little region0 v15514, v15519 + store.i64 little region0 v15520, v15525 + store.i32 little region0 v24488, v15535 + store.i64 little region0 v24502, v15541 + store.i64 little region0 v15547, v15550 + store.i32 little region0 v24488, v15556 + store.i32 little region0 v8, v1786 + store.i64 little region0 v24502, v15570 + store.i64 little region0 v15571, v15576 + store.i64 little region0 v24502, v1786 + store.i64 little region0 v24502, v15594 + store.i32 little region0 v24488, v15600 + store.i64 little region0 v24502, v15612 + store.i64 little region0 v24502, v15630 + store.i64 little region0 v24502, v15637 + store.i64 little region0 v24502, v1786 + store.i64 little region0 v24502, v15647 + store.i32 little region0 v24488, v15685 + store.i32 little region0 v24488, v15691 + store.i64 little region0 v15704, v15709 + store.i32 little region0 v24488, v15721 + store.i64 little region0 v24502, v15739 + store.i32 little region0 v24488, v15745 + store.i32 little region0 v24488, v15751 + store.i64 little region0 v15758, v15763 + store.i64 little region0 v15764, v15769 + store.i32 little region0 v24488, v15780 + store.i32 little region0 v24488, v15786 + store.i64 little region0 v24502, v15792 + store.i64 little region0 v24502, v15798 + store.i64 little region0 v15799, v15804 + store.i32 little region0 v24488, v17 + store.i64 little region0 v15824, v1786 + store.i64 little region0 v15833, v15838 + store.i64 little region0 v15853, v17 + store.i32 little region0 v24488, v15867 brif.i32 v24477, block2, block83 block83: diff --git a/cranelift/filetests/filetests/isa/riscv64/issue8847.clif b/cranelift/filetests/filetests/isa/riscv64/issue8847.clif index 7a7ba8395d0a..15cf24a94bf3 100644 --- a/cranelift/filetests/filetests/isa/riscv64/issue8847.clif +++ b/cranelift/filetests/filetests/isa/riscv64/issue8847.clif @@ -51,6 +51,10 @@ function u1:0() tail { fn15 = %FmaF32 sig15 fn16 = %FmaF64 sig16 + region0 = 0 "heap" + region1 = 1 "table" + region2 = 2 "vmctx" + block0: v0 = iconst.i64 0xef31_de2a_2352_79ff v158 -> v0 @@ -82,87 +86,87 @@ block0: v22 = iconst.i64 0 v23 = uextend.i128 v22 ; v22 = 0 v24 = stack_addr.i64 ss2 - store notrap table v23, v24 + store notrap region1 v23, v24 v25 = stack_addr.i64 ss2+16 - store notrap table v23, v25 + store notrap region1 v23, v25 v26 = stack_addr.i64 ss2+32 - store notrap table v20, v26 ; v20 = 0 + store notrap region1 v20, v26 ; v20 = 0 v27 = stack_addr.i64 ss1 - store notrap table v23, v27 + store notrap region1 v23, v27 v28 = stack_addr.i64 ss1+16 - store notrap table v23, v28 + store notrap region1 v23, v28 v29 = stack_addr.i64 ss1+32 - store notrap table v22, v29 ; v22 = 0 + store notrap region1 v22, v29 ; v22 = 0 v30 = stack_addr.i64 ss1+40 - store notrap table v21, v30 ; v21 = 0 + store notrap region1 v21, v30 ; v21 = 0 v31 = stack_addr.i64 ss1+44 - store notrap table v20, v31 ; v20 = 0 + store notrap region1 v20, v31 ; v20 = 0 v32 = stack_addr.i64 ss1+46 - store notrap table v19, v32 ; v19 = 0 + store notrap region1 v19, v32 ; v19 = 0 v33 = stack_addr.i64 ss0 - store notrap table v23, v33 + store notrap region1 v23, v33 v34 = stack_addr.i64 ss0+16 - store notrap table v23, v34 + store notrap region1 v23, v34 v35 = stack_addr.i64 ss0+32 - store notrap table v23, v35 + store notrap region1 v23, v35 v36 = stack_addr.i64 ss0+48 - store notrap table v20, v36 ; v20 = 0 + store notrap region1 v20, v36 ; v20 = 0 v37 = stack_addr.i64 ss3 - store notrap vmctx v23, v37 + store notrap region2 v23, v37 v38 = stack_addr.i64 ss3+16 - store notrap vmctx v23, v38 + store notrap region2 v23, v38 v39 = stack_addr.i64 ss3+32 - store notrap vmctx v23, v39 + store notrap region2 v23, v39 v40 = stack_addr.i64 ss3+48 - store notrap vmctx v23, v40 + store notrap region2 v23, v40 v41 = stack_addr.i64 ss3+64 - store notrap vmctx v23, v41 + store notrap region2 v23, v41 v42 = stack_addr.i64 ss3+80 - store notrap vmctx v23, v42 + store notrap region2 v23, v42 v43 = stack_addr.i64 ss3+96 - store notrap vmctx v21, v43 ; v21 = 0 + store notrap region2 v21, v43 ; v21 = 0 v44 = stack_addr.i64 ss3+100 - store notrap vmctx v20, v44 ; v20 = 0 + store notrap region2 v20, v44 ; v20 = 0 v45 = stack_addr.i64 ss3+102 - store notrap vmctx v19, v45 ; v19 = 0 + store notrap region2 v19, v45 ; v19 = 0 v46 = stack_addr.i64 ss4 - store notrap heap v23, v46 + store notrap region0 v23, v46 v47 = stack_addr.i64 ss4+16 - store notrap heap v23, v47 + store notrap region0 v23, v47 v48 = stack_addr.i64 ss4+32 - store notrap heap v23, v48 + store notrap region0 v23, v48 v49 = stack_addr.i64 ss4+48 - store notrap heap v23, v49 + store notrap region0 v23, v49 v50 = stack_addr.i64 ss4+64 - store notrap heap v23, v50 + store notrap region0 v23, v50 v51 = stack_addr.i64 ss4+80 - store notrap heap v23, v51 + store notrap region0 v23, v51 v52 = stack_addr.i64 ss4+96 - store notrap heap v22, v52 ; v22 = 0 + store notrap region0 v22, v52 ; v22 = 0 v53 = stack_addr.i64 ss4+104 - store notrap heap v21, v53 ; v21 = 0 + store notrap region0 v21, v53 ; v21 = 0 v54 = stack_addr.i64 ss4+108 - store notrap heap v20, v54 ; v20 = 0 + store notrap region0 v20, v54 ; v20 = 0 v55 = stack_addr.i64 ss5 - store notrap vmctx v23, v55 + store notrap region2 v23, v55 v56 = stack_addr.i64 ss5+16 - store notrap vmctx v23, v56 + store notrap region2 v23, v56 v57 = stack_addr.i64 ss5+32 - store notrap vmctx v23, v57 + store notrap region2 v23, v57 v58 = stack_addr.i64 ss5+48 - store notrap vmctx v23, v58 + store notrap region2 v23, v58 v59 = stack_addr.i64 ss5+64 - store notrap vmctx v23, v59 + store notrap region2 v23, v59 v60 = stack_addr.i64 ss5+80 - store notrap vmctx v23, v60 + store notrap region2 v23, v60 v61 = stack_addr.i64 ss5+96 - store notrap vmctx v23, v61 + store notrap region2 v23, v61 v62 = stack_addr.i64 ss5+112 - store notrap vmctx v22, v62 ; v22 = 0 + store notrap region2 v22, v62 ; v22 = 0 v63 = stack_addr.i64 ss5+120 - store notrap vmctx v21, v63 ; v21 = 0 + store notrap region2 v21, v63 ; v21 = 0 v64 = stack_addr.i64 ss5+124 - store notrap vmctx v20, v64 ; v20 = 0 + store notrap region2 v20, v64 ; v20 = 0 v65 = icmp_imm uge v3, 0x5123 ; v3 = 0xffef brif v65, block3, block2 diff --git a/cranelift/filetests/filetests/isa/riscv64/issue8866.clif b/cranelift/filetests/filetests/isa/riscv64/issue8866.clif index cee8c2fd193d..ac95e26b892f 100644 --- a/cranelift/filetests/filetests/isa/riscv64/issue8866.clif +++ b/cranelift/filetests/filetests/isa/riscv64/issue8866.clif @@ -51,6 +51,10 @@ function u1:0() tail { fn15 = %FmaF32 sig15 fn16 = %FmaF64 sig16 + region0 = 0 "heap" + region1 = 1 "table" + region2 = 2 "vmctx" + block0: v0 = iconst.i64 0xef31_de2a_2352_79ff v161 -> v0 @@ -82,87 +86,87 @@ block0: v22 = iconst.i64 0 v23 = uextend.i128 v22 ; v22 = 0 v24 = stack_addr.i64 ss2 - store notrap table v23, v24 + store notrap region1 v23, v24 v25 = stack_addr.i64 ss2+16 - store notrap table v23, v25 + store notrap region1 v23, v25 v26 = stack_addr.i64 ss2+32 - store notrap table v20, v26 ; v20 = 0 + store notrap region1 v20, v26 ; v20 = 0 v27 = stack_addr.i64 ss1 - store notrap table v23, v27 + store notrap region1 v23, v27 v28 = stack_addr.i64 ss1+16 - store notrap table v23, v28 + store notrap region1 v23, v28 v29 = stack_addr.i64 ss1+32 - store notrap table v22, v29 ; v22 = 0 + store notrap region1 v22, v29 ; v22 = 0 v30 = stack_addr.i64 ss1+40 - store notrap table v21, v30 ; v21 = 0 + store notrap region1 v21, v30 ; v21 = 0 v31 = stack_addr.i64 ss1+44 - store notrap table v20, v31 ; v20 = 0 + store notrap region1 v20, v31 ; v20 = 0 v32 = stack_addr.i64 ss1+46 - store notrap table v19, v32 ; v19 = 0 + store notrap region1 v19, v32 ; v19 = 0 v33 = stack_addr.i64 ss0 - store notrap table v23, v33 + store notrap region1 v23, v33 v34 = stack_addr.i64 ss0+16 - store notrap table v23, v34 + store notrap region1 v23, v34 v35 = stack_addr.i64 ss0+32 - store notrap table v23, v35 + store notrap region1 v23, v35 v36 = stack_addr.i64 ss0+48 - store notrap table v20, v36 ; v20 = 0 + store notrap region1 v20, v36 ; v20 = 0 v37 = stack_addr.i64 ss3 - store notrap vmctx v23, v37 + store notrap region2 v23, v37 v38 = stack_addr.i64 ss3+16 - store notrap vmctx v23, v38 + store notrap region2 v23, v38 v39 = stack_addr.i64 ss3+32 - store notrap vmctx v23, v39 + store notrap region2 v23, v39 v40 = stack_addr.i64 ss3+48 - store notrap vmctx v23, v40 + store notrap region2 v23, v40 v41 = stack_addr.i64 ss3+64 - store notrap vmctx v23, v41 + store notrap region2 v23, v41 v42 = stack_addr.i64 ss3+80 - store notrap vmctx v23, v42 + store notrap region2 v23, v42 v43 = stack_addr.i64 ss3+96 - store notrap vmctx v21, v43 ; v21 = 0 + store notrap region2 v21, v43 ; v21 = 0 v44 = stack_addr.i64 ss3+100 - store notrap vmctx v20, v44 ; v20 = 0 + store notrap region2 v20, v44 ; v20 = 0 v45 = stack_addr.i64 ss3+102 - store notrap vmctx v19, v45 ; v19 = 0 + store notrap region2 v19, v45 ; v19 = 0 v46 = stack_addr.i64 ss4 - store notrap heap v23, v46 + store notrap region0 v23, v46 v47 = stack_addr.i64 ss4+16 - store notrap heap v23, v47 + store notrap region0 v23, v47 v48 = stack_addr.i64 ss4+32 - store notrap heap v23, v48 + store notrap region0 v23, v48 v49 = stack_addr.i64 ss4+48 - store notrap heap v23, v49 + store notrap region0 v23, v49 v50 = stack_addr.i64 ss4+64 - store notrap heap v23, v50 + store notrap region0 v23, v50 v51 = stack_addr.i64 ss4+80 - store notrap heap v23, v51 + store notrap region0 v23, v51 v52 = stack_addr.i64 ss4+96 - store notrap heap v22, v52 ; v22 = 0 + store notrap region0 v22, v52 ; v22 = 0 v53 = stack_addr.i64 ss4+104 - store notrap heap v21, v53 ; v21 = 0 + store notrap region0 v21, v53 ; v21 = 0 v54 = stack_addr.i64 ss4+108 - store notrap heap v20, v54 ; v20 = 0 + store notrap region0 v20, v54 ; v20 = 0 v55 = stack_addr.i64 ss5 - store notrap vmctx v23, v55 + store notrap region2 v23, v55 v56 = stack_addr.i64 ss5+16 - store notrap vmctx v23, v56 + store notrap region2 v23, v56 v57 = stack_addr.i64 ss5+32 - store notrap vmctx v23, v57 + store notrap region2 v23, v57 v58 = stack_addr.i64 ss5+48 - store notrap vmctx v23, v58 + store notrap region2 v23, v58 v59 = stack_addr.i64 ss5+64 - store notrap vmctx v23, v59 + store notrap region2 v23, v59 v60 = stack_addr.i64 ss5+80 - store notrap vmctx v23, v60 + store notrap region2 v23, v60 v61 = stack_addr.i64 ss5+96 - store notrap vmctx v23, v61 + store notrap region2 v23, v61 v62 = stack_addr.i64 ss5+112 - store notrap vmctx v22, v62 ; v22 = 0 + store notrap region2 v22, v62 ; v22 = 0 v63 = stack_addr.i64 ss5+120 - store notrap vmctx v21, v63 ; v21 = 0 + store notrap region2 v21, v63 ; v21 = 0 v64 = stack_addr.i64 ss5+124 - store notrap vmctx v20, v64 ; v20 = 0 + store notrap region2 v20, v64 ; v20 = 0 v65 = icmp_imm uge v3, 0x504d ; v3 = 0xffef brif v65, block3, block2 diff --git a/cranelift/filetests/filetests/isa/x64/widen-high-bug.clif b/cranelift/filetests/filetests/isa/x64/widen-high-bug.clif index 91991182ce7b..5535119e768d 100644 --- a/cranelift/filetests/filetests/isa/x64/widen-high-bug.clif +++ b/cranelift/filetests/filetests/isa/x64/widen-high-bug.clif @@ -2,8 +2,10 @@ test compile precise-output target x86_64 sse41 function u0:0(i64 vmctx, i8x16) -> i16x8 fast { + region0 = 0 "table" + block0(v0: i64, v2: i8x16): - v5 = load.i8x16 notrap aligned table v0+80 + v5 = load.i8x16 notrap aligned region0 v0+80 v6 = uwiden_high v5 return v6 } diff --git a/cranelift/filetests/filetests/verifier/alias_regions.clif b/cranelift/filetests/filetests/verifier/alias_regions.clif new file mode 100644 index 000000000000..ddd8888857c0 --- /dev/null +++ b/cranelift/filetests/filetests/verifier/alias_regions.clif @@ -0,0 +1,10 @@ +test verifier + +; Invalid alias region reference in a load instruction. +; region0 is used but never declared. +function %invalid_region_in_load(i64) -> i32 { +block0(v0: i64): + v1 = load.i32 notrap region0 v0 + ; error: undefined alias region region0 + return v1 +} diff --git a/cranelift/filetests/filetests/verifier/duplicate_alias_region_user_id.clif b/cranelift/filetests/filetests/verifier/duplicate_alias_region_user_id.clif new file mode 100644 index 000000000000..fe7a0b70478e --- /dev/null +++ b/cranelift/filetests/filetests/verifier/duplicate_alias_region_user_id.clif @@ -0,0 +1,11 @@ +test verifier + +; Defining two regions with the same user_id is invalid. +function %duplicate_user_id(i64) -> i32 { + region0 = 36 "first" + region1 = 36 "second" + ; error: duplicate alias region user_id 36 +block0(v0: i64): + v1 = load.i32 notrap region0 v0 + return v1 +} diff --git a/cranelift/fuzzgen/src/function_generator.rs b/cranelift/fuzzgen/src/function_generator.rs index 312a898e25c5..60270c2953ac 100644 --- a/cranelift/fuzzgen/src/function_generator.rs +++ b/cranelift/fuzzgen/src/function_generator.rs @@ -9,9 +9,9 @@ use cranelift::codegen::ir::instructions::{InstructionFormat, ResolvedConstraint use cranelift::codegen::ir::stackslot::StackSize; use cranelift::codegen::ir::{ - AliasRegion, AtomicRmwOp, Block, BlockArg, ConstantData, Endianness, ExternalName, FuncRef, - Function, LibCall, Opcode, SigRef, Signature, StackSlot, UserExternalName, UserFuncName, Value, - types::*, + AliasRegionData, AliasRegionSet, AtomicRmwOp, Block, BlockArg, ConstantData, Endianness, + ExternalName, FuncRef, Function, LibCall, Opcode, SigRef, Signature, StackSlot, + UserExternalName, UserFuncName, Value, types::*, }; use cranelift::codegen::isa::CallConv; use cranelift::frontend::{FunctionBuilder, FunctionBuilderContext, Switch, Variable}; @@ -285,12 +285,14 @@ fn insert_load_store( let type_size = ctrl_type.bytes(); let is_atomic = [Opcode::AtomicLoad, Opcode::AtomicStore].contains(&opcode); - let (address, flags, offset) = + let (address, flags_data, offset) = fgen.generate_address_and_memflags(builder, type_size, is_atomic)?; // The variable being loaded or stored into let var = fgen.get_variable_of_type(ctrl_type)?; + let flags = builder.func.dfg.mem_flags.insert(flags_data).unwrap(); + match opcode.format() { InstructionFormat::LoadNoOffset => { let (inst, dfg) = builder @@ -1185,12 +1187,21 @@ impl AACategory { ] } - pub fn update_memflags(&self, flags: &mut MemFlagsData) { + pub fn update_memflags(&self, flags: &mut MemFlagsData, alias_regions: &mut AliasRegionSet) { flags.set_alias_region(match self { AACategory::Other => None, - AACategory::Heap => Some(AliasRegion::Heap), - AACategory::Table => Some(AliasRegion::Table), - AACategory::VmCtx => Some(AliasRegion::Vmctx), + AACategory::Heap => Some(alias_regions.insert(AliasRegionData { + user_id: 0, + description: "heap".into(), + })), + AACategory::Table => Some(alias_regions.insert(AliasRegionData { + user_id: 1, + description: "table".into(), + })), + AACategory::VmCtx => Some(alias_regions.insert(AliasRegionData { + user_id: 2, + description: "vmctx".into(), + })), }) } } @@ -1386,7 +1397,7 @@ where self.generate_load_store_address(builder, min_size, aligned)?; // Set the Alias Analysis bits on the memflags - category.update_memflags(&mut flags); + category.update_memflags(&mut flags, &mut builder.func.dfg.alias_regions); // Pick an offset to pass into the load/store. let offset = if aligned { @@ -1683,7 +1694,7 @@ where // correct memflags for it. So we can't use `stack_store` directly. let mut flags = MemFlagsData::new(); flags.set_notrap(); - category.update_memflags(&mut flags); + category.update_memflags(&mut flags, &mut builder.func.dfg.alias_regions); builder.ins().store(flags, val, addr, 0); diff --git a/cranelift/interpreter/src/step.rs b/cranelift/interpreter/src/step.rs index 8d1fdcd74dc2..189c9d938071 100644 --- a/cranelift/interpreter/src/step.rs +++ b/cranelift/interpreter/src/step.rs @@ -162,6 +162,13 @@ where } }; + // Resolve instruction memflags through the DFG when present. + let resolve_memflags = || { + inst.memflags() + .map(|flags| state.get_current_function().dfg.mem_flags[flags]) + .expect("instruction to have memory flags") + }; + // Retrieve the immediate value for an instruction and convert it to the controlling type of the // instruction. For example, since `InstructionData` stores all integer immediates in a 64-bit // size, this will attempt to convert `iconst.i8 ...` to an 8-bit size. @@ -498,7 +505,7 @@ where }; let addr_value = calculate_addr(types::I64, imm(), args())?; - let mem_flags = inst.memflags().expect("instruction to have memory flags"); + let mem_flags = resolve_memflags(); let loaded = assign_or_memtrap( Address::try_from(addr_value) .and_then(|addr| state.checked_load(addr, load_ty, mem_flags)), @@ -523,7 +530,7 @@ where }; let addr_value = calculate_addr(types::I64, imm(), args_range(1..)?)?; - let mem_flags = inst.memflags().expect("instruction to have memory flags"); + let mem_flags = resolve_memflags(); let reduced = if let Some(c) = kind { arg(0).convert(c)? } else { @@ -948,9 +955,7 @@ where let input_ty = inst_context.type_of(inst_context.args()[0]).unwrap(); let lanes = &if input_ty.is_vector() { assert_eq!( - inst.memflags() - .expect("byte order flag to be set") - .endianness(Endianness::Little), + resolve_memflags().endianness(Endianness::Little), Endianness::Little, "Only little endian bitcasts on vectors are supported" ); @@ -1244,7 +1249,7 @@ where let op = inst.atomic_rmw_op().unwrap(); let val = arg(1); let addr = arg(0).into_int_unsigned()? as u64; - let mem_flags = inst.memflags().expect("instruction to have memory flags"); + let mem_flags = resolve_memflags(); let loaded = Address::try_from(addr) .and_then(|addr| state.checked_load(addr, ctrl_ty, mem_flags)); let prev_val = match loaded { @@ -1271,7 +1276,7 @@ where } Opcode::AtomicCas => { let addr = arg(0).into_int_unsigned()? as u64; - let mem_flags = inst.memflags().expect("instruction to have memory flags"); + let mem_flags = resolve_memflags(); let loaded = Address::try_from(addr) .and_then(|addr| state.checked_load(addr, ctrl_ty, mem_flags)); let loaded_val = match loaded { @@ -1292,7 +1297,7 @@ where Opcode::AtomicLoad => { let load_ty = inst_context.controlling_type().unwrap(); let addr = arg(0).into_int_unsigned()? as u64; - let mem_flags = inst.memflags().expect("instruction to have memory flags"); + let mem_flags = resolve_memflags(); // We are doing a regular load here, this isn't actually thread safe. assign_or_memtrap( Address::try_from(addr) @@ -1302,7 +1307,7 @@ where Opcode::AtomicStore => { let val = arg(0); let addr = arg(1).into_int_unsigned()? as u64; - let mem_flags = inst.memflags().expect("instruction to have memory flags"); + let mem_flags = resolve_memflags(); // We are doing a regular store here, this isn't actually thread safe. continue_or_memtrap( Address::try_from(addr).and_then(|addr| state.checked_store(addr, val, mem_flags)), diff --git a/cranelift/reader/src/lexer.rs b/cranelift/reader/src/lexer.rs index ce8feb221523..2e00b86c2a80 100644 --- a/cranelift/reader/src/lexer.rs +++ b/cranelift/reader/src/lexer.rs @@ -49,6 +49,7 @@ pub enum Token<'a> { UserNameRef(u32), // userextname345 ExceptionTableRef(u32), // ex123 ExceptionTag(u32), // tag123 + AliasRegion(u32), // region0 TryCallRet(u32), // ret123 TryCallExn(u32), // exn123 Name(&'a str), // %9arbitrary_alphanum, %x3, %0, %function ... @@ -357,6 +358,7 @@ impl<'a> Lexer<'a> { "userextname" => Some(Token::UserNameRef(number)), "extable" => Some(Token::ExceptionTableRef(number)), "tag" => Some(Token::ExceptionTag(number)), + "region" => Some(Token::AliasRegion(number)), "ret" => Some(Token::TryCallRet(number)), "exn" => Some(Token::TryCallExn(number)), _ => None, diff --git a/cranelift/reader/src/parser.rs b/cranelift/reader/src/parser.rs index 235a1941bc53..6b7489a21d5d 100644 --- a/cranelift/reader/src/parser.rs +++ b/cranelift/reader/src/parser.rs @@ -20,8 +20,8 @@ use cranelift_codegen::ir::{DebugTag, types::*}; use cranelift_codegen::ir::{ AbiParam, ArgumentExtension, ArgumentPurpose, Block, BlockArg, Constant, ConstantData, DynamicStackSlot, DynamicStackSlotData, DynamicTypeData, ExtFuncData, ExternalName, FuncRef, - Function, GlobalValue, GlobalValueData, JumpTableData, MemFlagsData, Opcode, SigRef, Signature, - StackSlot, StackSlotData, StackSlotKind, UserFuncName, Value, types, + Function, GlobalValue, GlobalValueData, JumpTableData, MemFlagsData, MemFlagsSet, Opcode, + SigRef, Signature, StackSlot, StackSlotData, StackSlotKind, UserFuncName, Value, types, }; use cranelift_codegen::isa::{self, CallConv}; use cranelift_codegen::packed_option::ReservedValue; @@ -330,6 +330,21 @@ impl Context { } } + // Allocate an alias region. + fn add_alias_region( + &mut self, + ar: ir::AliasRegion, + data: ir::AliasRegionData, + loc: Location, + ) -> ParseResult<()> { + // Ensure regions are defined in order (region0, region1, ...). + if self.function.dfg.alias_regions.len() != ar.index() { + return err!(loc, "duplicate alias region {}", ar); + } + self.function.dfg.alias_regions.push(data); + Ok(()) + } + // Allocate a new signature. fn add_sig( &mut self, @@ -886,13 +901,24 @@ impl<'a> Parser<'a> { // Match and a consume a possibly empty sequence of memory operation flags. fn optional_memflags(&mut self) -> ParseResult { let mut flags = MemFlagsData::new(); - while let Some(Token::Identifier(text)) = self.token() { - match flags.set_by_name(text) { - Ok(true) => { + loop { + match self.token() { + Some(Token::Identifier(text)) => match flags.set_by_name(text) { + Ok(true) => { + self.consume(); + } + Ok(false) => break, + Err(msg) => return err!(self.loc, msg), + }, + Some(Token::AliasRegion(n)) => { + if flags.alias_region().is_some() { + return err!(self.loc, "cannot set more than one alias region"); + } + let region = ir::AliasRegion::new(n as usize); + flags.set_alias_region(Some(region)); self.consume(); } - Ok(false) => break, - Err(msg) => return err!(self.loc, msg), + _ => break, } } Ok(flags) @@ -1464,7 +1490,7 @@ impl<'a> Parser<'a> { } Some(Token::GlobalValue(..)) => { self.start_gathering_comments(); - self.parse_global_value_decl() + self.parse_global_value_decl(&mut ctx.function.dfg.mem_flags) .and_then(|(gv, dat)| ctx.add_gv(gv, dat, self.loc)) } Some(Token::SigRef(..)) => { @@ -1488,6 +1514,11 @@ impl<'a> Parser<'a> { self.parse_stack_limit_decl() .and_then(|gv| ctx.add_stack_limit(gv, self.loc)) } + Some(Token::AliasRegion(..)) => { + self.start_gathering_comments(); + self.parse_alias_region_decl() + .and_then(|(ar, dat)| ctx.add_alias_region(ar, dat, self.loc)) + } // More to come.. _ => return Ok(()), }?; @@ -1605,7 +1636,10 @@ impl<'a> Parser<'a> { // | "symbol" ["colocated"] name + imm64 // | "dyn_scale_target_const" "." type // - fn parse_global_value_decl(&mut self) -> ParseResult<(GlobalValue, GlobalValueData)> { + fn parse_global_value_decl( + &mut self, + mem_flags: &mut MemFlagsSet, + ) -> ParseResult<(GlobalValue, GlobalValueData)> { let gv = self.match_gv("expected global value number: gv«n»")?; self.match_token(Token::Equal, "expected '=' in global value declaration")?; @@ -1618,13 +1652,14 @@ impl<'a> Parser<'a> { "expected '.' followed by type in load global value decl", )?; let global_type = self.match_type("expected load type")?; - let flags = self.optional_memflags()?; + let flags_data = self.optional_memflags()?; let base = self.match_gv("expected global value: gv«n»")?; let offset = self.optional_offset32()?; - if !(flags.notrap() && flags.aligned()) { + if !(flags_data.notrap() && flags_data.aligned()) { return err!(self.loc, "global-value load must be notrap and aligned"); } + let flags = mem_flags.insert(flags_data).unwrap(); GlobalValueData::Load { base, offset, @@ -1902,6 +1937,44 @@ impl<'a> Parser<'a> { Ok((name, data)) } + // Parse an alias region decl + // + // alias-region-decl ::= * AliasRegion(region) "=" Integer String + fn parse_alias_region_decl(&mut self) -> ParseResult<(ir::AliasRegion, ir::AliasRegionData)> { + let ar_num = match self.token() { + Some(Token::AliasRegion(n)) => n, + _ => return err!(self.loc, "expected alias region number"), + }; + self.consume(); + let ar = ir::AliasRegion::new(usize::try_from(ar_num).unwrap()); + + self.match_token(Token::Equal, "expected '=' in alias region decl")?; + + let user_id = match self.token() { + Some(Token::Integer(s)) => u32::from_str_radix(s, 10) + .map_err(|_| self.error("expected integer user_id for alias region"))?, + _ => return err!(self.loc, "expected integer user_id for alias region"), + }; + self.consume(); + + let description = match self.token() { + Some(Token::String(s)) => s.to_owned(), + _ => return err!(self.loc, "expected string description for alias region"), + }; + self.consume(); + + let data = ir::AliasRegionData { + user_id, + description: std::borrow::Cow::Owned(description), + }; + + // Collect any trailing comments. + self.token(); + self.claim_gathered_comments(ir::AliasRegion::new(usize::try_from(ar_num).unwrap())); + + Ok((ar, data)) + } + // Parse a stack limit decl // // stack-limit-decl ::= * StackLimit "=" GlobalValue(gv) @@ -2911,6 +2984,7 @@ impl<'a> Parser<'a> { } InstructionFormat::Load => { let flags = self.optional_memflags()?; + let flags = ctx.function.dfg.mem_flags.insert(flags).unwrap(); let addr = self.match_value("expected SSA value address")?; let offset = self.optional_offset32()?; InstructionData::Load { @@ -2922,6 +2996,7 @@ impl<'a> Parser<'a> { } InstructionFormat::Store => { let flags = self.optional_memflags()?; + let flags = ctx.function.dfg.mem_flags.insert(flags).unwrap(); let arg = self.match_value("expected SSA value operand")?; self.match_token(Token::Comma, "expected ',' between operands")?; let addr = self.match_value("expected SSA value address")?; @@ -2945,6 +3020,7 @@ impl<'a> Parser<'a> { } InstructionFormat::AtomicCas => { let flags = self.optional_memflags()?; + let flags = ctx.function.dfg.mem_flags.insert(flags).unwrap(); let addr = self.match_value("expected SSA value address")?; self.match_token(Token::Comma, "expected ',' between operands")?; let expected = self.match_value("expected SSA value address")?; @@ -2958,6 +3034,7 @@ impl<'a> Parser<'a> { } InstructionFormat::AtomicRmw => { let flags = self.optional_memflags()?; + let flags = ctx.function.dfg.mem_flags.insert(flags).unwrap(); let op = self.match_enum("expected AtomicRmwOp")?; let addr = self.match_value("expected SSA value address")?; self.match_token(Token::Comma, "expected ',' between operands")?; @@ -2971,6 +3048,7 @@ impl<'a> Parser<'a> { } InstructionFormat::LoadNoOffset => { let flags = self.optional_memflags()?; + let flags = ctx.function.dfg.mem_flags.insert(flags).unwrap(); let addr = self.match_value("expected SSA value address")?; InstructionData::LoadNoOffset { opcode, @@ -2980,6 +3058,7 @@ impl<'a> Parser<'a> { } InstructionFormat::StoreNoOffset => { let flags = self.optional_memflags()?; + let flags = ctx.function.dfg.mem_flags.insert(flags).unwrap(); let arg = self.match_value("expected SSA value operand")?; self.match_token(Token::Comma, "expected ',' between operands")?; let addr = self.match_value("expected SSA value address")?; diff --git a/crates/cranelift/src/compiler.rs b/crates/cranelift/src/compiler.rs index 5ab4ed2bf564..a2c76c9f8a89 100644 --- a/crates/cranelift/src/compiler.rs +++ b/crates/cranelift/src/compiler.rs @@ -300,17 +300,29 @@ impl wasmtime_environ::Compiler for Compiler { let vmctx = context .func .create_global_value(ir::GlobalValueData::VMContext); + let interrupts_flags = context + .func + .dfg + .mem_flags + .insert(MemFlagsData::trusted().with_readonly()) + .unwrap(); let interrupts_ptr = context.func.create_global_value(ir::GlobalValueData::Load { base: vmctx, offset: i32::from(func_env.offsets.ptr.vmctx_store_context()).into(), global_type: isa.pointer_type(), - flags: MemFlagsData::trusted().with_readonly(), + flags: interrupts_flags, }); + let stack_limit_flags = context + .func + .dfg + .mem_flags + .insert(MemFlagsData::trusted()) + .unwrap(); let stack_limit = context.func.create_global_value(ir::GlobalValueData::Load { base: interrupts_ptr, offset: i32::from(func_env.offsets.ptr.vmstore_context_stack_limit()).into(), global_type: isa.pointer_type(), - flags: MemFlagsData::trusted(), + flags: stack_limit_flags, }); if self.tunables.signals_based_traps { context.func.stack_limit = Some(stack_limit); diff --git a/crates/cranelift/src/compiler/component.rs b/crates/cranelift/src/compiler/component.rs index 2718ced60b21..ec972bb7b340 100644 --- a/crates/cranelift/src/compiler/component.rs +++ b/crates/cranelift/src/compiler/component.rs @@ -1540,11 +1540,20 @@ impl<'a> TrampolineCompiler<'a> { /// `VMComponentContext` if it's otherwise unused. fn load_vm_store_context(&mut self) -> ir::Value { let caller_vmctx = self.abi_load_params()[1]; + let vmctx_region = self + .builder + .func + .dfg + .alias_regions + .insert(ir::AliasRegionData { + user_id: 2, + description: "vmctx".into(), + }); self.builder.ins().load( self.isa.pointer_type(), ir::MemFlagsData::trusted() .with_readonly() - .with_alias_region(Some(ir::AliasRegion::Vmctx)) + .with_alias_region(Some(vmctx_region)) .with_can_move(), caller_vmctx, i32::from(self.offsets.ptr.vmctx_store_context()), @@ -1698,14 +1707,67 @@ impl ComponentCompiler for Compiler { &types, &wasm_func_ty, ); - let params = c.abi_load_params(); - let result = UnsafeIntrinsicCompiler { - isa: c.isa, - ptr: &c.offsets.ptr, - cursor: c.builder.cursor(), + + match intrinsic { + UnsafeIntrinsic::U8NativeLoad + | UnsafeIntrinsic::U16NativeLoad + | UnsafeIntrinsic::U32NativeLoad + | UnsafeIntrinsic::U64NativeLoad => c.translate_load_intrinsic(intrinsic)?, + UnsafeIntrinsic::U8NativeStore + | UnsafeIntrinsic::U16NativeStore + | UnsafeIntrinsic::U32NativeStore + | UnsafeIntrinsic::U64NativeStore => c.translate_store_intrinsic(intrinsic)?, + UnsafeIntrinsic::StoreDataAddress => { + let [callee_vmctx, _caller_vmctx] = *c.abi_load_params() else { + unreachable!() + }; + let pointer_type = self.isa.pointer_type(); + + // Load the `*mut VMStoreContext` out of our vmctx. + let vmctx_region = c + .builder + .func + .dfg + .alias_regions + .insert(ir::AliasRegionData { + user_id: 2, + description: "vmctx".into(), + }); + let store_ctx = c.builder.ins().load( + pointer_type, + ir::MemFlagsData::trusted() + .with_readonly() + .with_alias_region(Some(vmctx_region)) + .with_can_move(), + callee_vmctx, + i32::try_from(c.offsets.vm_store_context()).unwrap(), + ); + + // Load the `*mut T` out of the `VMStoreContext`. + let data_address = c.builder.ins().load( + pointer_type, + ir::MemFlagsData::trusted() + .with_readonly() + .with_alias_region(Some(vmctx_region)) + .with_can_move(), + store_ctx, + i32::from(c.offsets.ptr.vmstore_context_store_data()), + ); + + // Zero-extend the address if we are on a 32-bit architecture. + let data_address = match pointer_type.bits() { + 32 => c.builder.ins().uextend(ir::types::I64, data_address), + 64 => data_address, + p => bail!("unsupported architecture: no support for {p}-bit pointers"), + }; + + c.abi_store_results(&[data_address]); + } + UnsafeIntrinsic::ContextGetI32_0 + | UnsafeIntrinsic::ContextGetI32_1 + | UnsafeIntrinsic::ContextSetI32_0 + | UnsafeIntrinsic::ContextSetI32_1 => c.translate_context_intrinsic(intrinsic)?, } - .translate(intrinsic, ¶ms)?; - c.abi_store_results(result.as_slice()); c.builder.finalize(); compiler.cx.abi = Some(abi); @@ -1933,6 +1995,116 @@ impl TrampolineCompiler<'_> { i32::from(self.offsets.ptr.vmmemory_definition_base()), ) } + + fn translate_load_intrinsic(&mut self, intrinsic: UnsafeIntrinsic) -> Result<()> { + debug_assert_eq!(intrinsic.core_params(), &[WasmValType::I64]); + debug_assert_eq!(intrinsic.core_results().len(), 1); + + let wasm_ty = intrinsic.core_results()[0]; + let clif_ty = unsafe_intrinsic_clif_results(intrinsic)[0]; + + let [_callee_vmctx, _caller_vmctx, pointer] = *self.abi_load_params() else { + unreachable!() + }; + + debug_assert_eq!(self.builder.func.dfg.value_type(pointer), ir::types::I64); + let pointer = match self.isa.pointer_bits() { + 32 => self.builder.ins().ireduce(ir::types::I32, pointer), + 64 => pointer, + p => bail!("unsupported architecture: no support for {p}-bit pointers"), + }; + + let mut value = self + .builder + .ins() + .load(clif_ty, ir::MemFlagsData::trusted(), pointer, 0); + + let wasm_clif_ty = crate::value_type(self.isa, wasm_ty); + if clif_ty != wasm_clif_ty { + assert!(clif_ty.bytes() < wasm_clif_ty.bytes()); + value = self.builder.ins().uextend(wasm_clif_ty, value); + } + + self.abi_store_results(&[value]); + Ok(()) + } + + fn translate_store_intrinsic(&mut self, intrinsic: UnsafeIntrinsic) -> Result<()> { + debug_assert!(intrinsic.core_results().is_empty()); + debug_assert!(matches!(intrinsic.core_params(), [WasmValType::I64, _])); + + let wasm_ty = intrinsic.core_params()[1]; + let clif_ty = unsafe_intrinsic_clif_params(intrinsic)[1]; + + let [_callee_vmctx, _caller_vmctx, pointer, mut value] = *self.abi_load_params() else { + unreachable!() + }; + + debug_assert_eq!(self.builder.func.dfg.value_type(pointer), ir::types::I64); + let pointer = match self.isa.pointer_bits() { + 32 => self.builder.ins().ireduce(ir::types::I32, pointer), + 64 => pointer, + p => bail!("unsupported architecture: no support for {p}-bit pointers"), + }; + + let wasm_ty = crate::value_type(self.isa, wasm_ty); + if clif_ty != wasm_ty { + assert!(clif_ty.bytes() < wasm_ty.bytes()); + value = self.builder.ins().ireduce(clif_ty, value); + } + + self.builder + .ins() + .store(ir::MemFlagsData::trusted(), value, pointer, 0); + + self.abi_store_results(&[]); + Ok(()) + } + + fn translate_context_intrinsic(&mut self, intrinsic: UnsafeIntrinsic) -> Result<()> { + let ty = match intrinsic { + UnsafeIntrinsic::ContextGetI32_0 + | UnsafeIntrinsic::ContextSetI32_0 + | UnsafeIntrinsic::ContextGetI32_1 + | UnsafeIntrinsic::ContextSetI32_1 => ir::types::I32, + _ => unreachable!(), + }; + let slot = match intrinsic { + UnsafeIntrinsic::ContextGetI32_0 | UnsafeIntrinsic::ContextSetI32_0 => 0, + UnsafeIntrinsic::ContextGetI32_1 | UnsafeIntrinsic::ContextSetI32_1 => 1, + _ => unreachable!(), + }; + let offset = self + .offsets + .ptr + .vmstore_context_component_context_slot(slot); + let vmstore_context = self.load_vm_store_context(); + match intrinsic { + UnsafeIntrinsic::ContextGetI32_0 | UnsafeIntrinsic::ContextGetI32_1 => { + let context = self.builder.ins().load( + ty, + ir::MemFlagsData::trusted(), + vmstore_context, + i32::from(offset), + ); + self.abi_store_results(&[context]); + } + UnsafeIntrinsic::ContextSetI32_0 | UnsafeIntrinsic::ContextSetI32_1 => { + let [_callee_vmctx, _caller_vmctx, new_context] = *self.abi_load_params() else { + unreachable!() + }; + self.builder.ins().store( + ir::MemFlagsData::trusted(), + new_context, + vmstore_context, + i32::from(offset), + ); + self.abi_store_results(&[]); + } + _ => unreachable!(), + } + Ok(()) + } } /// A helper structure to translate an `UnsafeIntrinsic`. @@ -1986,12 +2158,21 @@ impl<'a> UnsafeIntrinsicCompiler<'a> { // Load the `*mut VMStoreContext` out of our vmctx. let store_ctx = self.load_vm_store_context(params); + let vmctx_region = self + .cursor + .func + .dfg + .alias_regions + .insert(ir::AliasRegionData { + user_id: 2, + description: "vmctx".into(), + }); // Load the `*mut T` out of the `VMStoreContext`. let data_address = self.cursor.ins().load( pointer_type, ir::MemFlagsData::trusted() .with_readonly() - .with_alias_region(Some(ir::AliasRegion::Vmctx)) + .with_alias_region(Some(vmctx_region)) .with_can_move(), store_ctx, i32::from(self.ptr.vmstore_context_store_data()), @@ -2159,11 +2340,20 @@ impl<'a> UnsafeIntrinsicCompiler<'a> { /// `VMComponentContext` if it's otherwise unused. fn load_vm_store_context(&mut self, params: &[ir::Value]) -> ir::Value { let caller_vmctx = params[1]; + let vmctx_region = self + .cursor + .func + .dfg + .alias_regions + .insert(ir::AliasRegionData { + user_id: 2, + description: "vmctx".into(), + }); self.cursor.ins().load( self.isa.pointer_type(), ir::MemFlagsData::trusted() .with_readonly() - .with_alias_region(Some(ir::AliasRegion::Vmctx)) + .with_alias_region(Some(vmctx_region)) .with_can_move(), caller_vmctx, i32::from(self.ptr.vmctx_store_context()), diff --git a/crates/cranelift/src/func_environ.rs b/crates/cranelift/src/func_environ.rs index 816c2bc3ac43..a5048daff7bb 100644 --- a/crates/cranelift/src/func_environ.rs +++ b/crates/cranelift/src/func_environ.rs @@ -232,6 +232,15 @@ pub struct FuncEnvironment<'module_environment> { /// nonlinear control flow). This is useful in cases where we need /// to e.g. record the return-address of a callsite for debuginfo. pub(crate) next_srcloc: ir::SourceLoc, + + /// Cached alias regions for alias analysis. + heap_alias_region: Option, + table_alias_region: Option, + #[allow( + dead_code, + reason = "included for completeness, will be used in follow up commits" + )] + vmctx_alias_region: Option, } impl<'module_environment> FuncEnvironment<'module_environment> { @@ -294,6 +303,9 @@ impl<'module_environment> FuncEnvironment<'module_environment> { state_slot: None, next_srcloc: ir::SourceLoc::default(), wasm_module_offset: translation.wasm_module_offset, + heap_alias_region: None, + table_alias_region: None, + vmctx_alias_region: None, } } @@ -309,6 +321,37 @@ impl<'module_environment> FuncEnvironment<'module_environment> { }) } + pub(crate) fn get_heap_alias_region(&mut self, func: &mut Function) -> ir::AliasRegion { + *self.heap_alias_region.get_or_insert_with(|| { + func.dfg.alias_regions.insert(ir::AliasRegionData { + user_id: 0, + description: "heap".into(), + }) + }) + } + + pub(crate) fn get_table_alias_region(&mut self, func: &mut Function) -> ir::AliasRegion { + *self.table_alias_region.get_or_insert_with(|| { + func.dfg.alias_regions.insert(ir::AliasRegionData { + user_id: 1, + description: "table".into(), + }) + }) + } + + #[allow( + dead_code, + reason = "included for completeness, will be used in follow up commits" + )] + pub(crate) fn get_vmctx_alias_region(&mut self, func: &mut Function) -> ir::AliasRegion { + *self.vmctx_alias_region.get_or_insert_with(|| { + func.dfg.alias_regions.insert(ir::AliasRegionData { + user_id: 2, + description: "vmctx".into(), + }) + }) + } + #[cfg(feature = "threads")] fn get_memory_atomic_wait(&mut self, func: &mut Function, ty: ir::Type) -> ir::FuncRef { match ty { @@ -330,11 +373,16 @@ impl<'module_environment> FuncEnvironment<'module_environment> { (vmctx, offset) } else { let from_offset = self.offsets.vmctx_vmglobal_import_from(index); + let global_flags = func + .dfg + .mem_flags + .insert(MemFlagsData::trusted().with_readonly().with_can_move()) + .unwrap(); let global = func.create_global_value(ir::GlobalValueData::Load { base: vmctx, offset: Offset32::new(i32::try_from(from_offset).unwrap()), global_type: pointer_type, - flags: MemFlagsData::trusted().with_readonly().with_can_move(), + flags: global_flags, }); (global, 0) } @@ -349,11 +397,16 @@ impl<'module_environment> FuncEnvironment<'module_environment> { let offset = self.offsets.ptr.vmctx_store_context(); let base = self.vmctx(func); + let ptr_flags = func + .dfg + .mem_flags + .insert(ir::MemFlagsData::trusted().with_readonly().with_can_move()) + .unwrap(); let ptr = func.create_global_value(ir::GlobalValueData::Load { base, offset: Offset32::new(offset.into()), global_type: self.pointer_type(), - flags: ir::MemFlagsData::trusted().with_readonly().with_can_move(), + flags: ptr_flags, }); self.vm_store_context = Some(ptr); ptr @@ -961,6 +1014,7 @@ impl<'module_environment> FuncEnvironment<'module_environment> { offset: u32, flags: ir::MemFlagsData, ) -> ir::GlobalValue { + let flags = func.dfg.mem_flags.insert(flags).unwrap(); func.create_global_value(ir::GlobalValueData::Load { base: ptr, offset: Offset32::new(i32::try_from(offset).unwrap()), @@ -1578,11 +1632,12 @@ impl FuncEnvironment<'_> { } }; + let bound_flags = func.dfg.mem_flags.insert(MemFlagsData::trusted()).unwrap(); let bound = func.create_global_value(ir::GlobalValueData::Load { base: base_ptr, offset: Offset32::new(current_length_offset), global_type: pointer_type, - flags: MemFlagsData::trusted(), + flags: bound_flags, }); let base = self.make_heap_base(func, memory, base_ptr, base_offset); @@ -1610,11 +1665,12 @@ impl FuncEnvironment<'_> { flags.set_readonly(); } + let heap_base_flags = func.dfg.mem_flags.insert(flags).unwrap(); let heap_base = func.create_global_value(ir::GlobalValueData::Load { base: ptr, offset: Offset32::new(offset), global_type: pointer_type, - flags, + flags: heap_base_flags, }); heap_base } @@ -1635,11 +1691,16 @@ impl FuncEnvironment<'_> { (vmctx, base_offset, current_elements_offset) } else { let from_offset = self.offsets.vmctx_vmtable_from(index); + let table_flags = func + .dfg + .mem_flags + .insert(MemFlagsData::trusted().with_readonly().with_can_move()) + .unwrap(); let table = func.create_global_value(ir::GlobalValueData::Load { base: vmctx, offset: Offset32::new(i32::try_from(from_offset).unwrap()), global_type: pointer_type, - flags: MemFlagsData::trusted().with_readonly().with_can_move(), + flags: table_flags, }); let base_offset = i32::from(self.offsets.vmtable_definition_base()); let current_elements_offset = @@ -1656,17 +1717,20 @@ impl FuncEnvironment<'_> { self.reference_type(table.ref_type.heap_type).0.bytes() }; + let base_flags = if Some(table.limits.min) == table.limits.max { + func.dfg + .mem_flags + .insert(MemFlagsData::trusted().with_readonly().with_can_move()) + .unwrap() + } else { + func.dfg.mem_flags.insert(MemFlagsData::trusted()).unwrap() + }; let base_gv = func.create_global_value(ir::GlobalValueData::Load { base: ptr, offset: Offset32::new(base_offset), global_type: pointer_type, - flags: if Some(table.limits.min) == table.limits.max { - // A fixed-size table can't be resized so its base address won't - // change. - MemFlagsData::trusted().with_readonly().with_can_move() - } else { - MemFlagsData::trusted() - }, + // A fixed-size table can't be resized so its base address won't change. + flags: base_flags, }); let bound = if Some(table.limits.min) == table.limits.max { @@ -1674,6 +1738,7 @@ impl FuncEnvironment<'_> { bound: table.limits.min, } } else { + let bound_flags = func.dfg.mem_flags.insert(MemFlagsData::trusted()).unwrap(); TableSize::Dynamic { bound_gv: func.create_global_value(ir::GlobalValueData::Load { base: ptr, @@ -1682,7 +1747,7 @@ impl FuncEnvironment<'_> { u16::from(self.offsets.size_of_vmtable_definition_current_elements()) * 8, ) .unwrap(), - flags: MemFlagsData::trusted(), + flags: bound_flags, }), } }; @@ -3063,7 +3128,8 @@ impl FuncEnvironment<'_> { flags.set_endianness(ir::Endianness::Little); } // Put globals in the "table" abstract heap category as well. - flags.set_alias_region(Some(ir::AliasRegion::Table)); + let region = self.get_table_alias_region(builder.func); + flags.set_alias_region(Some(region)); Ok(builder.ins().load(ty, flags, addr, offset)) } GlobalVariable::Custom => { @@ -3111,7 +3177,8 @@ impl FuncEnvironment<'_> { flags.set_endianness(ir::Endianness::Little); } // Put globals in the "table" abstract heap category as well. - flags.set_alias_region(Some(ir::AliasRegion::Table)); + let region = self.get_table_alias_region(builder.func); + flags.set_alias_region(Some(region)); debug_assert_eq!(ty, builder.func.dfg.value_type(val)); builder.ins().store(flags, val, addr, offset); self.update_global(builder, global_index, val); diff --git a/crates/cranelift/src/func_environ/gc/enabled.rs b/crates/cranelift/src/func_environ/gc/enabled.rs index 0ca392b94a1b..c4e130c279f7 100644 --- a/crates/cranelift/src/func_environ/gc/enabled.rs +++ b/crates/cranelift/src/func_environ/gc/enabled.rs @@ -1307,11 +1307,12 @@ impl FuncEnvironment<'_> { flags.set_can_move(); } + let base_flags = func.dfg.mem_flags.insert(flags).unwrap(); let base = func.create_global_value(ir::GlobalValueData::Load { base: store_context_ptr, offset: Offset32::new(offset.into()), global_type: self.pointer_type(), - flags, + flags: base_flags, }); self.gc_heap_base = Some(base); @@ -1333,11 +1334,16 @@ impl FuncEnvironment<'_> { } let store_context_ptr = self.get_vmstore_context_ptr_global(func); let offset = self.offsets.ptr.vmstore_context_gc_heap_current_length(); + let bound_flags = func + .dfg + .mem_flags + .insert(ir::MemFlagsData::trusted()) + .unwrap(); let bound = func.create_global_value(ir::GlobalValueData::Load { base: store_context_ptr, offset: Offset32::new(offset.into()), global_type: self.pointer_type(), - flags: ir::MemFlagsData::trusted(), + flags: bound_flags, }); self.gc_heap_bound = Some(bound); bound diff --git a/crates/cranelift/src/func_environ/gc/enabled/copying.rs b/crates/cranelift/src/func_environ/gc/enabled/copying.rs index 03b508d9a219..802952dc610a 100644 --- a/crates/cranelift/src/func_environ/gc/enabled/copying.rs +++ b/crates/cranelift/src/func_environ/gc/enabled/copying.rs @@ -153,8 +153,9 @@ impl CopyingCompiler { // Update the bump pointer. let end_of_object = builder.ins().ireduce(ir::types::I32, end_64); + let vmctx_region = func_env.get_vmctx_alias_region(&mut builder.func); builder.ins().store( - ir::MemFlagsData::trusted().with_alias_region(Some(ir::AliasRegion::Vmctx)), + ir::MemFlagsData::trusted().with_alias_region(Some(vmctx_region)), end_of_object, ptr_to_heap_data, i32::from(func_env.offsets.ptr.vmcopying_heap_data_bump_ptr()), diff --git a/crates/cranelift/src/translate/code_translator.rs b/crates/cranelift/src/translate/code_translator.rs index a4e420fc59f1..142eb76d7816 100644 --- a/crates/cranelift/src/translate/code_translator.rs +++ b/crates/cranelift/src/translate/code_translator.rs @@ -3640,7 +3640,8 @@ fn prepare_addr( // state. This may allow alias analysis to merge redundant loads, // etc. when heap accesses occur interleaved with other (table, // vmctx, stack) accesses. - flags.set_alias_region(Some(ir::AliasRegion::Heap)); + let region = environ.get_heap_alias_region(builder.func); + flags.set_alias_region(Some(region)); Ok(Reachability::Reachable((flags, index, addr))) } @@ -3708,6 +3709,7 @@ fn translate_load( environ.before_load(builder, mem_op_size, wasm_index, memarg.offset); + let flags = builder.func.dfg.mem_flags.insert(flags).unwrap(); let (load, dfg) = builder .ins() .Load(opcode, result_ty, flags, Offset32::new(0), base); @@ -3733,6 +3735,7 @@ fn translate_store( environ.before_store(builder, mem_op_size, wasm_index, memarg.offset); + let flags = builder.func.dfg.mem_flags.insert(flags).unwrap(); builder .ins() .Store(opcode, val_ty, flags, Offset32::new(0), val, base); diff --git a/crates/cranelift/src/translate/table.rs b/crates/cranelift/src/translate/table.rs index 37a407b884ba..1f43346f21cb 100644 --- a/crates/cranelift/src/translate/table.rs +++ b/crates/cranelift/src/translate/table.rs @@ -104,9 +104,10 @@ impl TableData { let element_addr = pos.ins().iadd(base, offset); + let region = env.get_table_alias_region(pos.func); let base_flags = ir::MemFlagsData::new() .with_aligned() - .with_alias_region(Some(ir::AliasRegion::Table)); + .with_alias_region(Some(region)); if spectre_mitigations_enabled { // Short-circuit the computed table element address to a null pointer // when out-of-bounds. The consumer of this address will trap when diff --git a/crates/environ/src/lib.rs b/crates/environ/src/lib.rs index 7375834dd805..7153600c8df6 100644 --- a/crates/environ/src/lib.rs +++ b/crates/environ/src/lib.rs @@ -11,7 +11,7 @@ #![warn(clippy::cast_sign_loss)] #![no_std] -#[cfg(feature = "std")] +#[cfg(any(feature = "std", test))] #[macro_use] extern crate std; extern crate alloc; diff --git a/crates/environ/src/module_artifacts.rs b/crates/environ/src/module_artifacts.rs index 6d6960b1ea60..0f78e765cac5 100644 --- a/crates/environ/src/module_artifacts.rs +++ b/crates/environ/src/module_artifacts.rs @@ -807,13 +807,20 @@ mod tests { // Build up a random set of functions with random indices. for _ in 0..u.int_in_range(1..=200)? { - let key = match u.int_in_range(0..=6)? { + #[cfg(feature = "component-model")] + let choice = u.int_in_range(0..=6)?; + #[cfg(not(feature = "component-model"))] + let choice = u.int_in_range(0..=4)?; + + let key = match choice { 0 => FuncKey::DefinedWasmFunction(idx(u, 10)?, idx(u, 200)?), 1 => FuncKey::ArrayToWasmTrampoline(idx(u, 10)?, idx(u, 200)?), 2 => FuncKey::WasmToArrayTrampoline(idx(u, 100)?), 3 => FuncKey::WasmToBuiltinTrampoline(u.arbitrary()?), 4 => FuncKey::PulleyHostCall(u.arbitrary()?), + #[cfg(feature = "component-model")] 5 => FuncKey::ComponentTrampoline(u.arbitrary()?, idx(u, 50)?), + #[cfg(feature = "component-model")] 6 => FuncKey::ResourceDropTrampoline, _ => unreachable!(), }; diff --git a/tests/disas/basic-wat-test.wat b/tests/disas/basic-wat-test.wat index 6c87259fd721..428077e76d56 100644 --- a/tests/disas/basic-wat-test.wat +++ b/tests/disas/basic-wat-test.wat @@ -10,6 +10,7 @@ i32.add)) ;; function u0:0(i64 vmctx, i64, i32, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -22,11 +23,11 @@ ;; @0021 v5 = uextend.i64 v2 ;; @0021 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0021 v7 = iadd v6, v5 -;; @0021 v8 = load.i32 little heap v7 +;; @0021 v8 = load.i32 little region0 v7 ;; @0026 v9 = uextend.i64 v3 ;; @0026 v10 = load.i64 notrap aligned readonly can_move v0+56 ;; @0026 v11 = iadd v10, v9 -;; @0026 v12 = load.i32 little heap v11 +;; @0026 v12 = load.i32 little region0 v11 ;; @0029 v13 = iadd v8, v12 ;; @002a jump block1 ;; diff --git a/tests/disas/bounds-check.wat b/tests/disas/bounds-check.wat index e2b6df9ad78d..554e18aed642 100644 --- a/tests/disas/bounds-check.wat +++ b/tests/disas/bounds-check.wat @@ -25,6 +25,7 @@ (export "store" (func $store)) ) ;; function u0:0(i64 vmctx, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -38,17 +39,17 @@ ;; @002c v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @002c v4 = uextend.i64 v2 ;; @002c v6 = iadd v5, v4 -;; @002c istore8 little heap v3, v6 ; v3 = 0 +;; @002c istore8 little region0 v3, v6 ; v3 = 0 ;; @0033 v11 = iconst.i64 0x07ff_ffff ;; @0033 v12 = iadd v6, v11 ; v11 = 0x07ff_ffff -;; @0033 istore8 little heap v3, v12 ; v3 = 0 +;; @0033 istore8 little region0 v3, v12 ; v3 = 0 ;; @003d v15 = load.i64 notrap aligned v0+64 ;; @003d v16 = icmp ugt v4, v15 ;; @003d v21 = iconst.i64 0 ;; @003d v19 = iconst.i64 0xffff_ffff ;; @003d v20 = iadd v6, v19 ; v19 = 0xffff_ffff ;; @003d v22 = select_spectre_guard v16, v21, v20 ; v21 = 0 -;; @003d istore8 little heap v3, v22 ; v3 = 0 +;; @003d istore8 little region0 v3, v22 ; v3 = 0 ;; @0044 jump block1 ;; ;; block1: diff --git a/tests/disas/call-indirect.wat b/tests/disas/call-indirect.wat index e528475fd1cc..9180f82aa075 100644 --- a/tests/disas/call-indirect.wat +++ b/tests/disas/call-indirect.wat @@ -8,6 +8,7 @@ ) ;; function u0:0(i64 vmctx, i64, i32, i32) -> i32 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -30,7 +31,7 @@ ;; @0035 v11 = iadd v9, v10 ;; @0035 v12 = iconst.i64 0 ;; @0035 v13 = select_spectre_guard v7, v12, v11 ; v12 = 0 -;; @0035 v14 = load.i64 user6 aligned table v13 +;; @0035 v14 = load.i64 user6 aligned region0 v13 ;; v29 = iconst.i64 -2 ;; @0035 v15 = band v14, v29 ; v29 = -2 ;; @0035 brif v14, block3(v15), block2 diff --git a/tests/disas/component-model/direct-adapter-calls-inlining.wat b/tests/disas/component-model/direct-adapter-calls-inlining.wat index 321b7789ab41..8b532cd9c3b9 100644 --- a/tests/disas/component-model/direct-adapter-calls-inlining.wat +++ b/tests/disas/component-model/direct-adapter-calls-inlining.wat @@ -55,6 +55,7 @@ ) ;; function u1:0(i64 vmctx, i64) -> i32 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -81,7 +82,7 @@ ;; block2: ;; @00ee v5 = load.i64 notrap aligned readonly can_move v0+72 ;; v12 = load.i64 notrap aligned readonly can_move v5+136 -;; v13 = load.i32 notrap aligned table v12 +;; v13 = load.i32 notrap aligned region0 v12 ;; v14 = iconst.i32 1 ;; v15 = band v13, v14 ; v14 = 1 ;; v11 = iconst.i32 0 @@ -98,13 +99,13 @@ ;; ;; block5: ;; v22 = load.i64 notrap aligned readonly can_move v5+112 -;; v23 = load.i32 notrap aligned table v22 +;; v23 = load.i32 notrap aligned region0 v22 ;; v24 = iconst.i32 -2 ;; v25 = band v23, v24 ; v24 = -2 -;; store notrap aligned table v25, v22 +;; store notrap aligned region0 v25, v22 ;; v55 = iconst.i32 1 ;; v56 = bor v23, v55 ; v55 = 1 -;; store notrap aligned table v56, v22 +;; store notrap aligned region0 v56, v22 ;; jump block6 ;; ;; block6: @@ -114,13 +115,13 @@ ;; jump block8 ;; ;; block8: -;; v36 = load.i32 notrap aligned table v12 +;; v36 = load.i32 notrap aligned region0 v12 ;; v57 = iconst.i32 -2 ;; v58 = band v36, v57 ; v57 = -2 -;; store notrap aligned table v58, v12 +;; store notrap aligned region0 v58, v12 ;; v59 = iconst.i32 1 ;; v60 = bor v36, v59 ; v59 = 1 -;; store notrap aligned table v60, v12 +;; store notrap aligned region0 v60, v12 ;; jump block3 ;; ;; block3: diff --git a/tests/disas/component-model/direct-adapter-calls.wat b/tests/disas/component-model/direct-adapter-calls.wat index 88678699446f..9ff15dd27d24 100644 --- a/tests/disas/component-model/direct-adapter-calls.wat +++ b/tests/disas/component-model/direct-adapter-calls.wat @@ -92,6 +92,7 @@ ;; } ;; ;; function u2:0(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -105,7 +106,7 @@ ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; @0077 v5 = load.i64 notrap aligned readonly can_move v0+136 -;; @0077 v6 = load.i32 notrap aligned table v5 +;; @0077 v6 = load.i32 notrap aligned region0 v5 ;; @0079 v7 = iconst.i32 1 ;; @007b v8 = band v6, v7 ; v7 = 1 ;; @0075 v4 = iconst.i32 0 @@ -122,20 +123,20 @@ ;; ;; block3: ;; @0085 v15 = load.i64 notrap aligned readonly can_move v0+112 -;; @0085 v16 = load.i32 notrap aligned table v15 +;; @0085 v16 = load.i32 notrap aligned region0 v15 ;; @0087 v17 = iconst.i32 -2 ;; @0089 v18 = band v16, v17 ; v17 = -2 -;; @008a store notrap aligned table v18, v15 +;; @008a store notrap aligned region0 v18, v15 ;; v52 = iconst.i32 1 ;; v53 = bor v16, v52 ; v52 = 1 -;; @0093 store notrap aligned table v53, v15 +;; @0093 store notrap aligned region0 v53, v15 ;; @0095 v26 = load.i64 notrap aligned readonly can_move v0+72 ;; @0095 v27 = call fn0(v26, v0, v2) -;; @0099 v29 = load.i32 notrap aligned table v5 +;; @0099 v29 = load.i32 notrap aligned region0 v5 ;; @009d v31 = band v29, v17 ; v17 = -2 -;; @009e store notrap aligned table v31, v5 +;; @009e store notrap aligned region0 v31, v5 ;; v54 = bor v29, v52 ; v52 = 1 -;; @00a7 store notrap aligned table v54, v5 +;; @00a7 store notrap aligned region0 v54, v5 ;; @00a9 jump block1 ;; ;; block1: diff --git a/tests/disas/component-model/inlining-and-unsafe-intrinsics.wat b/tests/disas/component-model/inlining-and-unsafe-intrinsics.wat index c7cdedc67fd2..aedf8138648f 100644 --- a/tests/disas/component-model/inlining-and-unsafe-intrinsics.wat +++ b/tests/disas/component-model/inlining-and-unsafe-intrinsics.wat @@ -43,6 +43,7 @@ ) ;; function u0:0(i64 vmctx, i64) tail { +;; region0 = 2 "vmctx" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -56,8 +57,8 @@ ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64): -;; @0153 v5 = load.i64 notrap aligned readonly can_move vmctx v0+8 -;; @0153 v6 = load.i64 notrap aligned readonly can_move vmctx v5+104 +;; @0153 v5 = load.i64 notrap aligned readonly can_move region0 v0+8 +;; @0153 v6 = load.i64 notrap aligned readonly can_move region0 v5+104 ;; @0155 v9 = load.i8 notrap aligned v6 ;; v22 = iconst.i8 1 ;; v23 = iadd v9, v22 ; v22 = 1 diff --git a/tests/disas/component-model/unsafe-intrinsics-used.wat b/tests/disas/component-model/unsafe-intrinsics-used.wat index 0cc37d1a03c8..c93bd77f5a40 100644 --- a/tests/disas/component-model/unsafe-intrinsics-used.wat +++ b/tests/disas/component-model/unsafe-intrinsics-used.wat @@ -35,9 +35,11 @@ ) ;; function u0:0(i64 vmctx, i64) -> i64 tail { +;; region0 = 2 "vmctx" +;; ;; block0(v0: i64, v1: i64): -;; v2 = load.i64 notrap aligned readonly can_move vmctx v1+8 -;; v3 = load.i64 notrap aligned readonly can_move vmctx v2+104 +;; v2 = load.i64 notrap aligned readonly can_move region0 v0+16 +;; v3 = load.i64 notrap aligned readonly can_move region0 v2+104 ;; return v3 ;; } ;; diff --git a/tests/disas/duplicate-function-types.wat b/tests/disas/duplicate-function-types.wat index 239d4405cbf6..08f0de5d0646 100644 --- a/tests/disas/duplicate-function-types.wat +++ b/tests/disas/duplicate-function-types.wat @@ -17,6 +17,7 @@ ) ;; function u0:0(i64 vmctx, i64, i32) -> i32, i32 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -42,7 +43,7 @@ ;; @002d v11 = iadd v9, v10 ;; @002d v12 = iconst.i64 0 ;; @002d v13 = select_spectre_guard v7, v12, v11 ; v12 = 0 -;; @002d v14 = load.i64 user6 aligned table v13 +;; @002d v14 = load.i64 user6 aligned region0 v13 ;; v60 = iconst.i64 -2 ;; @002d v15 = band v14, v60 ; v60 = -2 ;; @002d brif v14, block3(v15), block2 @@ -74,7 +75,7 @@ ;; @0032 v36 = iadd v34, v35 ;; @0032 v37 = iconst.i64 0 ;; @0032 v38 = select_spectre_guard v32, v37, v36 ; v37 = 0 -;; @0032 v39 = load.i64 user6 aligned table v38 +;; @0032 v39 = load.i64 user6 aligned region0 v38 ;; v54 = iconst.i64 -2 ;; @0032 v40 = band v39, v54 ; v54 = -2 ;; @0032 brif v39, block5(v40), block4 diff --git a/tests/disas/duplicate-loads-dynamic-memory.wat b/tests/disas/duplicate-loads-dynamic-memory.wat index a886458b8cd0..f6f16390680f 100644 --- a/tests/disas/duplicate-loads-dynamic-memory.wat +++ b/tests/disas/duplicate-loads-dynamic-memory.wat @@ -23,6 +23,7 @@ ) ;; function u0:0(i64 vmctx, i64, i32) -> i32, i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -39,7 +40,7 @@ ;; @0057 v10 = iconst.i64 0 ;; @0057 v9 = iadd v8, v5 ;; @0057 v11 = select_spectre_guard v7, v10, v9 ; v10 = 0 -;; @0057 v12 = load.i32 little heap v11 +;; @0057 v12 = load.i32 little region0 v11 ;; @005f jump block1 ;; ;; block1: @@ -47,6 +48,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32, i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -65,7 +67,7 @@ ;; @0064 v10 = iconst.i64 1234 ;; @0064 v11 = iadd v9, v10 ; v10 = 1234 ;; @0064 v13 = select_spectre_guard v7, v12, v11 ; v12 = 0 -;; @0064 v14 = load.i32 little heap v13 +;; @0064 v14 = load.i32 little region0 v13 ;; @006e jump block1 ;; ;; block1: diff --git a/tests/disas/duplicate-loads-static-memory.wat b/tests/disas/duplicate-loads-static-memory.wat index 1933d2f45eaf..a829ff6cd5e8 100644 --- a/tests/disas/duplicate-loads-static-memory.wat +++ b/tests/disas/duplicate-loads-static-memory.wat @@ -18,6 +18,7 @@ ) ;; function u0:0(i64 vmctx, i64, i32) -> i32, i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -30,7 +31,7 @@ ;; @0057 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0057 v5 = uextend.i64 v2 ;; @0057 v7 = iadd v6, v5 -;; @0057 v8 = load.i32 little heap v7 +;; @0057 v8 = load.i32 little region0 v7 ;; @005f jump block1 ;; ;; block1: @@ -38,6 +39,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32, i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -52,7 +54,7 @@ ;; @0064 v7 = iadd v6, v5 ;; @0064 v8 = iconst.i64 1234 ;; @0064 v9 = iadd v7, v8 ; v8 = 1234 -;; @0064 v10 = load.i32 little heap v9 +;; @0064 v10 = load.i32 little region0 v9 ;; @006e jump block1 ;; ;; block1: diff --git a/tests/disas/dynamic-memory-no-spectre-access-same-index-different-offsets.wat b/tests/disas/dynamic-memory-no-spectre-access-same-index-different-offsets.wat index 52b5db8c4940..b985e19678ac 100644 --- a/tests/disas/dynamic-memory-no-spectre-access-same-index-different-offsets.wat +++ b/tests/disas/dynamic-memory-no-spectre-access-same-index-different-offsets.wat @@ -36,6 +36,7 @@ ) ;; function u0:0(i64 vmctx, i64, i32) -> i32, i32, i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -51,17 +52,17 @@ ;; @0047 trapnz v8, heap_oob ;; @0047 v9 = load.i64 notrap aligned can_move v0+56 ;; @0047 v10 = iadd v9, v6 -;; @0047 v11 = load.i32 little heap v10 +;; @0047 v11 = load.i32 little region0 v10 ;; @004c v17 = iconst.i64 4 ;; @004c v18 = iadd v10, v17 ; v17 = 4 -;; @004c v19 = load.i32 little heap v18 +;; @004c v19 = load.i32 little region0 v18 ;; @0051 v21 = iconst.i64 0x0010_0003 ;; @0051 v22 = uadd_overflow_trap v6, v21, heap_oob ; v21 = 0x0010_0003 ;; @0051 v24 = icmp ugt v22, v7 ;; @0051 trapnz v24, heap_oob ;; @0051 v27 = iconst.i64 0x000f_ffff ;; @0051 v28 = iadd v10, v27 ; v27 = 0x000f_ffff -;; @0051 v29 = load.i32 little heap v28 +;; @0051 v29 = load.i32 little region0 v28 ;; @0056 jump block1 ;; ;; block1: @@ -69,6 +70,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32, i32, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -84,17 +86,17 @@ ;; @005d trapnz v8, heap_oob ;; @005d v9 = load.i64 notrap aligned can_move v0+56 ;; @005d v10 = iadd v9, v6 -;; @005d store little heap v3, v10 +;; @005d store little region0 v3, v10 ;; @0064 v16 = iconst.i64 4 ;; @0064 v17 = iadd v10, v16 ; v16 = 4 -;; @0064 store little heap v4, v17 +;; @0064 store little region0 v4, v17 ;; @006b v19 = iconst.i64 0x0010_0003 ;; @006b v20 = uadd_overflow_trap v6, v19, heap_oob ; v19 = 0x0010_0003 ;; @006b v22 = icmp ugt v20, v7 ;; @006b trapnz v22, heap_oob ;; @006b v25 = iconst.i64 0x000f_ffff ;; @006b v26 = iadd v10, v25 ; v25 = 0x000f_ffff -;; @006b store little heap v5, v26 +;; @006b store little region0 v5, v26 ;; @0070 jump block1 ;; ;; block1: diff --git a/tests/disas/dynamic-memory-yes-spectre-access-same-index-different-offsets.wat b/tests/disas/dynamic-memory-yes-spectre-access-same-index-different-offsets.wat index be1d1aefb049..1c281389d616 100644 --- a/tests/disas/dynamic-memory-yes-spectre-access-same-index-different-offsets.wat +++ b/tests/disas/dynamic-memory-yes-spectre-access-same-index-different-offsets.wat @@ -32,6 +32,7 @@ ) ;; function u0:0(i64 vmctx, i64, i32) -> i32, i32, i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -48,18 +49,18 @@ ;; @0047 v11 = iconst.i64 0 ;; @0047 v10 = iadd v9, v6 ;; @0047 v12 = select_spectre_guard v8, v11, v10 ; v11 = 0 -;; @0047 v13 = load.i32 little heap v12 +;; @0047 v13 = load.i32 little region0 v12 ;; @004c v19 = iconst.i64 4 ;; @004c v20 = iadd v10, v19 ; v19 = 4 ;; @004c v22 = select_spectre_guard v8, v11, v20 ; v11 = 0 -;; @004c v23 = load.i32 little heap v22 +;; @004c v23 = load.i32 little region0 v22 ;; @0051 v25 = iconst.i64 0x0010_0003 ;; @0051 v26 = uadd_overflow_trap v6, v25, heap_oob ; v25 = 0x0010_0003 ;; @0051 v28 = icmp ugt v26, v7 ;; @0051 v31 = iconst.i64 0x000f_ffff ;; @0051 v32 = iadd v10, v31 ; v31 = 0x000f_ffff ;; @0051 v34 = select_spectre_guard v28, v11, v32 ; v11 = 0 -;; @0051 v35 = load.i32 little heap v34 +;; @0051 v35 = load.i32 little region0 v34 ;; @0056 jump block1 ;; ;; block1: @@ -67,6 +68,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32, i32, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -83,18 +85,18 @@ ;; @005d v11 = iconst.i64 0 ;; @005d v10 = iadd v9, v6 ;; @005d v12 = select_spectre_guard v8, v11, v10 ; v11 = 0 -;; @005d store little heap v3, v12 +;; @005d store little region0 v3, v12 ;; @0064 v18 = iconst.i64 4 ;; @0064 v19 = iadd v10, v18 ; v18 = 4 ;; @0064 v21 = select_spectre_guard v8, v11, v19 ; v11 = 0 -;; @0064 store little heap v4, v21 +;; @0064 store little region0 v4, v21 ;; @006b v23 = iconst.i64 0x0010_0003 ;; @006b v24 = uadd_overflow_trap v6, v23, heap_oob ; v23 = 0x0010_0003 ;; @006b v26 = icmp ugt v24, v7 ;; @006b v29 = iconst.i64 0x000f_ffff ;; @006b v30 = iadd v10, v29 ; v29 = 0x000f_ffff ;; @006b v32 = select_spectre_guard v26, v11, v30 ; v11 = 0 -;; @006b store little heap v5, v32 +;; @006b store little region0 v5, v32 ;; @0070 jump block1 ;; ;; block1: diff --git a/tests/disas/f32-load.wat b/tests/disas/f32-load.wat index 3ed84126a073..3ed11c282557 100644 --- a/tests/disas/f32-load.wat +++ b/tests/disas/f32-load.wat @@ -7,6 +7,7 @@ f32.load)) ;; function u0:0(i64 vmctx, i64, i32) -> f32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -19,7 +20,7 @@ ;; @002e v4 = uextend.i64 v2 ;; @002e v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @002e v6 = iadd v5, v4 -;; @002e v7 = load.f32 little heap v6 +;; @002e v7 = load.f32 little region0 v6 ;; @0031 jump block1 ;; ;; block1: diff --git a/tests/disas/f32-store.wat b/tests/disas/f32-store.wat index 858b3fc30956..3de6a16fcbb7 100644 --- a/tests/disas/f32-store.wat +++ b/tests/disas/f32-store.wat @@ -10,6 +10,7 @@ f32.store)) ;; function u0:0(i64 vmctx, i64, i32, f32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -22,7 +23,7 @@ ;; @0031 v4 = uextend.i64 v2 ;; @0031 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0031 v6 = iadd v5, v4 -;; @0031 store little heap v3, v6 +;; @0031 store little region0 v3, v6 ;; @0034 jump block1 ;; ;; block1: diff --git a/tests/disas/f64-load.wat b/tests/disas/f64-load.wat index e0930d0663a1..3251a8632e01 100644 --- a/tests/disas/f64-load.wat +++ b/tests/disas/f64-load.wat @@ -9,6 +9,7 @@ f64.load)) ;; function u0:0(i64 vmctx, i64, i32) -> f64 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -21,7 +22,7 @@ ;; @002e v4 = uextend.i64 v2 ;; @002e v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @002e v6 = iadd v5, v4 -;; @002e v7 = load.f64 little heap v6 +;; @002e v7 = load.f64 little region0 v6 ;; @0031 jump block1 ;; ;; block1: diff --git a/tests/disas/f64-store.wat b/tests/disas/f64-store.wat index 682dea575b50..3bf357ee33d7 100644 --- a/tests/disas/f64-store.wat +++ b/tests/disas/f64-store.wat @@ -10,6 +10,7 @@ f64.store)) ;; function u0:0(i64 vmctx, i64, i32, f64) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -22,7 +23,7 @@ ;; @0031 v4 = uextend.i64 v2 ;; @0031 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0031 v6 = iadd v5, v4 -;; @0031 store little heap v3, v6 +;; @0031 store little region0 v3, v6 ;; @0034 jump block1 ;; ;; block1: diff --git a/tests/disas/fibonacci.wat b/tests/disas/fibonacci.wat index 04ae1e33b1de..458200724e87 100644 --- a/tests/disas/fibonacci.wat +++ b/tests/disas/fibonacci.wat @@ -24,6 +24,7 @@ ) ;; function u0:0(i64 vmctx, i64) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -57,7 +58,7 @@ ;; @005a v17 = uextend.i64 v16 ; v16 = 0 ;; @005a v18 = load.i64 notrap aligned readonly can_move v0+56 ;; @005a v19 = iadd v18, v17 -;; @005a store.i32 little heap v11, v19 +;; @005a store.i32 little region0 v11, v19 ;; @005d jump block1 ;; ;; block1: diff --git a/tests/disas/fixed-size-memory.wat b/tests/disas/fixed-size-memory.wat index c437231b5016..92cc15f4916c 100644 --- a/tests/disas/fixed-size-memory.wat +++ b/tests/disas/fixed-size-memory.wat @@ -21,6 +21,7 @@ i32.load8_u offset=0)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0041 trapnz v6, heap_oob ;; @0041 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0041 v8 = iadd v7, v4 -;; @0041 istore8 little heap v3, v8 +;; @0041 istore8 little region0 v3, v8 ;; @0044 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -59,7 +61,7 @@ ;; @0049 trapnz v6, heap_oob ;; @0049 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0049 v8 = iadd v7, v4 -;; @0049 v9 = uload8.i32 little heap v8 +;; @0049 v9 = uload8.i32 little region0 v8 ;; @004c jump block1 ;; ;; block1: diff --git a/tests/disas/gc/array-new-data.wat b/tests/disas/gc/array-new-data.wat index 1510d4bc6594..32efeb45d645 100644 --- a/tests/disas/gc/array-new-data.wat +++ b/tests/disas/gc/array-new-data.wat @@ -77,6 +77,7 @@ ;; function u0:0(i64 vmctx, i64, i32, i32) -> i32 tail { ;; ss0 = explicit_slot 4, align = 4 +;; region0 = 2 "vmctx" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -123,7 +124,7 @@ ;; v138 = iconst.i32 -16 ;; v139 = band v135, v138 ; v138 = -16 ;; v141 = iadd.i32 v24, v139 -;; @0025 store notrap aligned vmctx v141, v23 +;; @0025 store notrap aligned region0 v141, v23 ;; v155 = iconst.i32 -1476395008 ;; v156 = load.i64 notrap aligned readonly can_move v0+8 ;; v157 = load.i64 notrap aligned readonly can_move v156+32 diff --git a/tests/disas/gc/array-new-default-anyref.wat b/tests/disas/gc/array-new-default-anyref.wat index ed9f4af67dd5..0a372aea8091 100644 --- a/tests/disas/gc/array-new-default-anyref.wat +++ b/tests/disas/gc/array-new-default-anyref.wat @@ -11,6 +11,7 @@ ) ;; function u0:0(i64 vmctx, i64, i32) -> i32 tail { ;; ss0 = explicit_slot 4, align = 4 +;; region0 = 2 "vmctx" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +56,7 @@ ;; v122 = iconst.i32 -16 ;; v123 = band v119, v122 ; v122 = -16 ;; v125 = iadd.i32 v12, v123 -;; @001f store notrap aligned vmctx v125, v11 +;; @001f store notrap aligned region0 v125, v11 ;; v141 = iconst.i32 -1476395008 ;; v142 = load.i64 notrap aligned readonly can_move v0+8 ;; v143 = load.i64 notrap aligned readonly can_move v142+32 diff --git a/tests/disas/gc/array-new-default-exnref.wat b/tests/disas/gc/array-new-default-exnref.wat index 4620f5cbdd5f..31de34f3b2b7 100644 --- a/tests/disas/gc/array-new-default-exnref.wat +++ b/tests/disas/gc/array-new-default-exnref.wat @@ -11,6 +11,7 @@ ) ;; function u0:0(i64 vmctx, i64, i32) -> i32 tail { ;; ss0 = explicit_slot 4, align = 4 +;; region0 = 2 "vmctx" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +56,7 @@ ;; v122 = iconst.i32 -16 ;; v123 = band v119, v122 ; v122 = -16 ;; v125 = iadd.i32 v12, v123 -;; @001f store notrap aligned vmctx v125, v11 +;; @001f store notrap aligned region0 v125, v11 ;; v141 = iconst.i32 -1476395008 ;; v142 = load.i64 notrap aligned readonly can_move v0+8 ;; v143 = load.i64 notrap aligned readonly can_move v142+32 diff --git a/tests/disas/gc/array-new-default-externref.wat b/tests/disas/gc/array-new-default-externref.wat index 3935b8e8e1f2..d0a2ed66e432 100644 --- a/tests/disas/gc/array-new-default-externref.wat +++ b/tests/disas/gc/array-new-default-externref.wat @@ -11,6 +11,7 @@ ) ;; function u0:0(i64 vmctx, i64, i32) -> i32 tail { ;; ss0 = explicit_slot 4, align = 4 +;; region0 = 2 "vmctx" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +56,7 @@ ;; v122 = iconst.i32 -16 ;; v123 = band v119, v122 ; v122 = -16 ;; v125 = iadd.i32 v12, v123 -;; @001f store notrap aligned vmctx v125, v11 +;; @001f store notrap aligned region0 v125, v11 ;; v141 = iconst.i32 -1476395008 ;; v142 = load.i64 notrap aligned readonly can_move v0+8 ;; v143 = load.i64 notrap aligned readonly can_move v142+32 diff --git a/tests/disas/gc/array-new-default-f32.wat b/tests/disas/gc/array-new-default-f32.wat index 16aba4f51c17..2dc175f151a1 100644 --- a/tests/disas/gc/array-new-default-f32.wat +++ b/tests/disas/gc/array-new-default-f32.wat @@ -11,6 +11,7 @@ ) ;; function u0:0(i64 vmctx, i64, i32) -> i32 tail { ;; ss0 = explicit_slot 4, align = 4 +;; region0 = 2 "vmctx" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +56,7 @@ ;; v122 = iconst.i32 -16 ;; v123 = band v119, v122 ; v122 = -16 ;; v125 = iadd.i32 v12, v123 -;; @001f store notrap aligned vmctx v125, v11 +;; @001f store notrap aligned region0 v125, v11 ;; v141 = iconst.i32 -1476395008 ;; v142 = load.i64 notrap aligned readonly can_move v0+8 ;; v143 = load.i64 notrap aligned readonly can_move v142+32 diff --git a/tests/disas/gc/array-new-default-f64.wat b/tests/disas/gc/array-new-default-f64.wat index 3cb145a2c0b4..4efd371768bb 100644 --- a/tests/disas/gc/array-new-default-f64.wat +++ b/tests/disas/gc/array-new-default-f64.wat @@ -11,6 +11,7 @@ ) ;; function u0:0(i64 vmctx, i64, i32) -> i32 tail { ;; ss0 = explicit_slot 4, align = 4 +;; region0 = 2 "vmctx" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +56,7 @@ ;; v122 = iconst.i32 -16 ;; v123 = band v119, v122 ; v122 = -16 ;; v125 = iadd.i32 v12, v123 -;; @001f store notrap aligned vmctx v125, v11 +;; @001f store notrap aligned region0 v125, v11 ;; v141 = iconst.i32 -1476395008 ;; v142 = load.i64 notrap aligned readonly can_move v0+8 ;; v143 = load.i64 notrap aligned readonly can_move v142+32 diff --git a/tests/disas/gc/array-new-default-funcref.wat b/tests/disas/gc/array-new-default-funcref.wat index c1662695ddad..30fa49ddf611 100644 --- a/tests/disas/gc/array-new-default-funcref.wat +++ b/tests/disas/gc/array-new-default-funcref.wat @@ -11,6 +11,7 @@ ) ;; function u0:0(i64 vmctx, i64, i32) -> i32 tail { ;; ss0 = explicit_slot 4, align = 4 +;; region0 = 2 "vmctx" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +56,7 @@ ;; v122 = iconst.i32 -16 ;; v123 = band v119, v122 ; v122 = -16 ;; v125 = iadd.i32 v12, v123 -;; @001f store notrap aligned vmctx v125, v11 +;; @001f store notrap aligned region0 v125, v11 ;; v140 = iconst.i32 -1476395008 ;; v141 = load.i64 notrap aligned readonly can_move v0+8 ;; v142 = load.i64 notrap aligned readonly can_move v141+32 diff --git a/tests/disas/gc/array-new-default-i16.wat b/tests/disas/gc/array-new-default-i16.wat index fd880dd41747..788ecf0c41ab 100644 --- a/tests/disas/gc/array-new-default-i16.wat +++ b/tests/disas/gc/array-new-default-i16.wat @@ -11,6 +11,7 @@ ) ;; function u0:0(i64 vmctx, i64, i32) -> i32 tail { ;; ss0 = explicit_slot 4, align = 4 +;; region0 = 2 "vmctx" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -54,7 +55,7 @@ ;; v127 = iconst.i32 -16 ;; v128 = band v124, v127 ; v127 = -16 ;; v130 = iadd.i32 v12, v128 -;; @001f store notrap aligned vmctx v130, v11 +;; @001f store notrap aligned region0 v130, v11 ;; v151 = iconst.i32 -1476395008 ;; v152 = load.i64 notrap aligned readonly can_move v0+8 ;; v153 = load.i64 notrap aligned readonly can_move v152+32 diff --git a/tests/disas/gc/array-new-default-i32.wat b/tests/disas/gc/array-new-default-i32.wat index b175996afbde..d23643ae8939 100644 --- a/tests/disas/gc/array-new-default-i32.wat +++ b/tests/disas/gc/array-new-default-i32.wat @@ -11,6 +11,7 @@ ) ;; function u0:0(i64 vmctx, i64, i32) -> i32 tail { ;; ss0 = explicit_slot 4, align = 4 +;; region0 = 2 "vmctx" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +56,7 @@ ;; v122 = iconst.i32 -16 ;; v123 = band v119, v122 ; v122 = -16 ;; v125 = iadd.i32 v12, v123 -;; @001f store notrap aligned vmctx v125, v11 +;; @001f store notrap aligned region0 v125, v11 ;; v141 = iconst.i32 -1476395008 ;; v142 = load.i64 notrap aligned readonly can_move v0+8 ;; v143 = load.i64 notrap aligned readonly can_move v142+32 diff --git a/tests/disas/gc/array-new-default-i64.wat b/tests/disas/gc/array-new-default-i64.wat index 313cd6eb953b..16b4adacb7fe 100644 --- a/tests/disas/gc/array-new-default-i64.wat +++ b/tests/disas/gc/array-new-default-i64.wat @@ -11,6 +11,7 @@ ) ;; function u0:0(i64 vmctx, i64, i32) -> i32 tail { ;; ss0 = explicit_slot 4, align = 4 +;; region0 = 2 "vmctx" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +56,7 @@ ;; v122 = iconst.i32 -16 ;; v123 = band v119, v122 ; v122 = -16 ;; v125 = iadd.i32 v12, v123 -;; @001f store notrap aligned vmctx v125, v11 +;; @001f store notrap aligned region0 v125, v11 ;; v140 = iconst.i32 -1476395008 ;; v141 = load.i64 notrap aligned readonly can_move v0+8 ;; v142 = load.i64 notrap aligned readonly can_move v141+32 diff --git a/tests/disas/gc/array-new-default-i8.wat b/tests/disas/gc/array-new-default-i8.wat index 3e1ab2327e25..963cc8568978 100644 --- a/tests/disas/gc/array-new-default-i8.wat +++ b/tests/disas/gc/array-new-default-i8.wat @@ -11,6 +11,7 @@ ) ;; function u0:0(i64 vmctx, i64, i32) -> i32 tail { ;; ss0 = explicit_slot 4, align = 4 +;; region0 = 2 "vmctx" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -51,7 +52,7 @@ ;; v112 = iconst.i32 -16 ;; v113 = band v109, v112 ; v112 = -16 ;; v115 = iadd.i32 v12, v113 -;; @001f store notrap aligned vmctx v115, v11 +;; @001f store notrap aligned region0 v115, v11 ;; v129 = iconst.i32 -1476395008 ;; v130 = load.i64 notrap aligned readonly can_move v0+8 ;; v131 = load.i64 notrap aligned readonly can_move v130+32 diff --git a/tests/disas/gc/copying/array-new-fixed-of-gc-refs.wat b/tests/disas/gc/copying/array-new-fixed-of-gc-refs.wat index 2a4970e4c820..75677678b537 100644 --- a/tests/disas/gc/copying/array-new-fixed-of-gc-refs.wat +++ b/tests/disas/gc/copying/array-new-fixed-of-gc-refs.wat @@ -12,6 +12,7 @@ ;; ss0 = explicit_slot 4, align = 4 ;; ss1 = explicit_slot 4, align = 4 ;; ss2 = explicit_slot 4, align = 4 +;; region0 = 2 "vmctx" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -43,7 +44,7 @@ ;; block2: ;; v272 = iconst.i32 32 ;; v178 = iadd.i32 v15, v272 ; v272 = 32 -;; @0025 store notrap aligned vmctx v178, v14 +;; @0025 store notrap aligned region0 v178, v14 ;; v273 = iconst.i32 -1476395008 ;; v274 = load.i64 notrap aligned readonly can_move v0+8 ;; v275 = load.i64 notrap aligned readonly can_move v274+32 diff --git a/tests/disas/gc/copying/array-new-fixed.wat b/tests/disas/gc/copying/array-new-fixed.wat index e050362c9c94..f1f72edf4e3e 100644 --- a/tests/disas/gc/copying/array-new-fixed.wat +++ b/tests/disas/gc/copying/array-new-fixed.wat @@ -9,6 +9,7 @@ ) ) ;; function u0:0(i64 vmctx, i64, i64, i64, i64) -> i32 tail { +;; region0 = 2 "vmctx" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -34,7 +35,7 @@ ;; block2: ;; v260 = iconst.i32 48 ;; v168 = iadd.i32 v15, v260 ; v260 = 48 -;; @0025 store notrap aligned vmctx v168, v14 +;; @0025 store notrap aligned region0 v168, v14 ;; v261 = iconst.i32 -1476395008 ;; v262 = load.i64 notrap aligned readonly can_move v0+8 ;; v263 = load.i64 notrap aligned readonly can_move v262+32 diff --git a/tests/disas/gc/copying/array-new.wat b/tests/disas/gc/copying/array-new.wat index 4636ad894aea..33797f5b2fa8 100644 --- a/tests/disas/gc/copying/array-new.wat +++ b/tests/disas/gc/copying/array-new.wat @@ -9,6 +9,7 @@ ) ) ;; function u0:0(i64 vmctx, i64, i64, i32) -> i32 tail { +;; region0 = 2 "vmctx" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -51,7 +52,7 @@ ;; v118 = iconst.i32 -16 ;; v119 = band v115, v118 ; v118 = -16 ;; v121 = iadd.i32 v13, v119 -;; @0022 store notrap aligned vmctx v121, v12 +;; @0022 store notrap aligned region0 v121, v12 ;; v137 = iconst.i32 -1476395008 ;; v138 = load.i64 notrap aligned readonly can_move v0+8 ;; v139 = load.i64 notrap aligned readonly can_move v138+32 diff --git a/tests/disas/gc/copying/call-indirect-and-subtyping.wat b/tests/disas/gc/copying/call-indirect-and-subtyping.wat index 1b7a84447f51..e88c2600b817 100644 --- a/tests/disas/gc/copying/call-indirect-and-subtyping.wat +++ b/tests/disas/gc/copying/call-indirect-and-subtyping.wat @@ -16,6 +16,7 @@ ) ) ;; function u0:0(i64 vmctx, i64, i32) tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -38,7 +39,7 @@ ;; @005c v7 = ishl v5, v30 ; v30 = 3 ;; @005c v8 = iadd v6, v7 ;; @005c v10 = select_spectre_guard v4, v9, v8 ; v9 = 0 -;; @005c v11 = load.i64 user6 aligned table v10 +;; @005c v11 = load.i64 user6 aligned region0 v10 ;; v29 = iconst.i64 -2 ;; @005c v12 = band v11, v29 ; v29 = -2 ;; @005c brif v11, block3(v12), block2 diff --git a/tests/disas/gc/copying/funcref-in-gc-heap-new.wat b/tests/disas/gc/copying/funcref-in-gc-heap-new.wat index 4be2771568fb..c3450e3396b6 100644 --- a/tests/disas/gc/copying/funcref-in-gc-heap-new.wat +++ b/tests/disas/gc/copying/funcref-in-gc-heap-new.wat @@ -10,6 +10,7 @@ ) ;; function u0:0(i64 vmctx, i64, i64) -> i32 tail { ;; ss0 = explicit_slot 4, align = 4 +;; region0 = 2 "vmctx" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; block2: ;; v66 = iconst.i32 32 ;; v64 = iadd.i32 v7, v66 ; v66 = 32 -;; @0020 store notrap aligned vmctx v64, v6 +;; @0020 store notrap aligned region0 v64, v6 ;; v67 = iconst.i32 -1342177280 ;; v68 = load.i64 notrap aligned readonly can_move v0+8 ;; v69 = load.i64 notrap aligned readonly can_move v68+32 diff --git a/tests/disas/gc/copying/struct-new-default.wat b/tests/disas/gc/copying/struct-new-default.wat index 9afa6be068e4..9aa9395142b7 100644 --- a/tests/disas/gc/copying/struct-new-default.wat +++ b/tests/disas/gc/copying/struct-new-default.wat @@ -11,6 +11,7 @@ ) ) ;; function u0:0(i64 vmctx, i64) -> i32 tail { +;; region0 = 2 "vmctx" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -35,7 +36,7 @@ ;; block2: ;; v66 = iconst.i32 32 ;; v64 = iadd.i32 v9, v66 ; v66 = 32 -;; @0021 store notrap aligned vmctx v64, v8 +;; @0021 store notrap aligned region0 v64, v8 ;; v67 = iconst.i32 -1342177280 ;; v68 = load.i64 notrap aligned readonly can_move v0+8 ;; v69 = load.i64 notrap aligned readonly can_move v68+32 diff --git a/tests/disas/gc/copying/struct-new.wat b/tests/disas/gc/copying/struct-new.wat index b23f79cf3b56..434e30e0b9b6 100644 --- a/tests/disas/gc/copying/struct-new.wat +++ b/tests/disas/gc/copying/struct-new.wat @@ -12,6 +12,7 @@ ) ;; function u0:0(i64 vmctx, i64, f32, i32, i32) -> i32 tail { ;; ss0 = explicit_slot 4, align = 4 +;; region0 = 2 "vmctx" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -38,7 +39,7 @@ ;; block2: ;; v69 = iconst.i32 32 ;; v67 = iadd.i32 v9, v69 ; v69 = 32 -;; @002a store notrap aligned vmctx v67, v8 +;; @002a store notrap aligned region0 v67, v8 ;; v70 = iconst.i32 -1342177280 ;; v71 = load.i64 notrap aligned readonly can_move v0+8 ;; v72 = load.i64 notrap aligned readonly can_move v71+32 diff --git a/tests/disas/gc/drc/call-indirect-and-subtyping.wat b/tests/disas/gc/drc/call-indirect-and-subtyping.wat index ea46ba0437ec..cbcc0fede5e4 100644 --- a/tests/disas/gc/drc/call-indirect-and-subtyping.wat +++ b/tests/disas/gc/drc/call-indirect-and-subtyping.wat @@ -17,6 +17,7 @@ ) ) ;; function u0:0(i64 vmctx, i64, i32) tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -39,7 +40,7 @@ ;; @005c v7 = ishl v5, v30 ; v30 = 3 ;; @005c v8 = iadd v6, v7 ;; @005c v10 = select_spectre_guard v4, v9, v8 ; v9 = 0 -;; @005c v11 = load.i64 user6 aligned table v10 +;; @005c v11 = load.i64 user6 aligned region0 v10 ;; v29 = iconst.i64 -2 ;; @005c v12 = band v11, v29 ; v29 = -2 ;; @005c brif v11, block3(v12), block2 diff --git a/tests/disas/gc/null/call-indirect-and-subtyping.wat b/tests/disas/gc/null/call-indirect-and-subtyping.wat index 282cb8e94db7..d1525bc21aef 100644 --- a/tests/disas/gc/null/call-indirect-and-subtyping.wat +++ b/tests/disas/gc/null/call-indirect-and-subtyping.wat @@ -17,6 +17,7 @@ ) ) ;; function u0:0(i64 vmctx, i64, i32) tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -39,7 +40,7 @@ ;; @005c v7 = ishl v5, v30 ; v30 = 3 ;; @005c v8 = iadd v6, v7 ;; @005c v10 = select_spectre_guard v4, v9, v8 ; v9 = 0 -;; @005c v11 = load.i64 user6 aligned table v10 +;; @005c v11 = load.i64 user6 aligned region0 v10 ;; v29 = iconst.i64 -2 ;; @005c v12 = band v11, v29 ; v29 = -2 ;; @005c brif v11, block3(v12), block2 diff --git a/tests/disas/gc/struct-new-default.wat b/tests/disas/gc/struct-new-default.wat index 8d3c2f014abf..718f14360050 100644 --- a/tests/disas/gc/struct-new-default.wat +++ b/tests/disas/gc/struct-new-default.wat @@ -13,6 +13,7 @@ ) ) ;; function u0:0(i64 vmctx, i64) -> i32 tail { +;; region0 = 2 "vmctx" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -38,7 +39,7 @@ ;; block2: ;; v69 = iconst.i32 48 ;; v67 = iadd.i32 v10, v69 ; v69 = 48 -;; @0023 store notrap aligned vmctx v67, v9 +;; @0023 store notrap aligned region0 v67, v9 ;; v70 = iconst.i32 -1342177280 ;; v71 = load.i64 notrap aligned readonly can_move v0+8 ;; v72 = load.i64 notrap aligned readonly can_move v71+32 diff --git a/tests/disas/gc/struct-new.wat b/tests/disas/gc/struct-new.wat index 45feb9eacd26..784b93aa708e 100644 --- a/tests/disas/gc/struct-new.wat +++ b/tests/disas/gc/struct-new.wat @@ -13,6 +13,7 @@ ) ;; function u0:0(i64 vmctx, i64, f32, i32, i32) -> i32 tail { ;; ss0 = explicit_slot 4, align = 4 +;; region0 = 2 "vmctx" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -39,7 +40,7 @@ ;; block2: ;; v69 = iconst.i32 32 ;; v67 = iadd.i32 v9, v69 ; v69 = 32 -;; @002a store notrap aligned vmctx v67, v8 +;; @002a store notrap aligned region0 v67, v8 ;; v70 = iconst.i32 -1342177280 ;; v71 = load.i64 notrap aligned readonly can_move v0+8 ;; v72 = load.i64 notrap aligned readonly can_move v71+32 diff --git a/tests/disas/global-get.wat b/tests/disas/global-get.wat index d3788f1d708d..9c99190d113b 100644 --- a/tests/disas/global-get.wat +++ b/tests/disas/global-get.wat @@ -31,6 +31,7 @@ ) ;; function u0:0(i64 vmctx, i64) -> i32 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -40,7 +41,7 @@ ;; ;; block0(v0: i64, v1: i64): ;; @003d v3 = load.i64 notrap aligned readonly can_move v0+48 -;; @003d v4 = load.i32 notrap aligned table v3 +;; @003d v4 = load.i32 notrap aligned region0 v3 ;; @003f jump block1 ;; ;; block1: @@ -48,6 +49,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64) -> i32 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -57,7 +59,7 @@ ;; ;; block0(v0: i64, v1: i64): ;; @0042 v3 = load.i64 notrap aligned readonly can_move v0+72 -;; @0042 v4 = load.i32 notrap aligned table v3 +;; @0042 v4 = load.i32 notrap aligned region0 v3 ;; @0044 jump block1 ;; ;; block1: @@ -79,6 +81,7 @@ ;; } ;; ;; function u0:3(i64 vmctx, i64) -> i32 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -86,7 +89,7 @@ ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64): -;; @004c v4 = load.i32 notrap aligned table v0+112 +;; @004c v4 = load.i32 notrap aligned region0 v0+112 ;; @004e jump block1 ;; ;; block1: diff --git a/tests/disas/globals.wat b/tests/disas/globals.wat index 003c8f51b2bb..0eaa2e556a00 100644 --- a/tests/disas/globals.wat +++ b/tests/disas/globals.wat @@ -10,6 +10,8 @@ ) ;; function u0:0(i64 vmctx, i64) tail { +;; region0 = 1 "table" +;; region1 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -21,11 +23,11 @@ ;; block0(v0: i64, v1: i64): ;; @0027 v2 = iconst.i32 0 ;; @0029 v3 = iconst.i32 0 -;; @002b v5 = load.i32 notrap aligned table v0+80 +;; @002b v5 = load.i32 notrap aligned region0 v0+80 ;; @002d v6 = uextend.i64 v3 ; v3 = 0 ;; @002d v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @002d v8 = iadd v7, v6 -;; @002d store little heap v5, v8 +;; @002d store little region1 v5, v8 ;; @0030 jump block1 ;; ;; block1: diff --git a/tests/disas/i32-load.wat b/tests/disas/i32-load.wat index 77a404f5be15..d8685a540029 100644 --- a/tests/disas/i32-load.wat +++ b/tests/disas/i32-load.wat @@ -9,6 +9,7 @@ i32.load)) ;; function u0:0(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -21,7 +22,7 @@ ;; @002e v4 = uextend.i64 v2 ;; @002e v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @002e v6 = iadd v5, v4 -;; @002e v7 = load.i32 little heap v6 +;; @002e v7 = load.i32 little region0 v6 ;; @0031 jump block1 ;; ;; block1: diff --git a/tests/disas/i32-load16-s.wat b/tests/disas/i32-load16-s.wat index 9a5eee03bcbc..2e660ba87775 100644 --- a/tests/disas/i32-load16-s.wat +++ b/tests/disas/i32-load16-s.wat @@ -9,6 +9,7 @@ i32.load16_s)) ;; function u0:0(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -21,7 +22,7 @@ ;; @0032 v4 = uextend.i64 v2 ;; @0032 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0032 v6 = iadd v5, v4 -;; @0032 v7 = sload16.i32 little heap v6 +;; @0032 v7 = sload16.i32 little region0 v6 ;; @0035 jump block1 ;; ;; block1: diff --git a/tests/disas/i32-load16-u.wat b/tests/disas/i32-load16-u.wat index 6f715dd41471..bee34ef43361 100644 --- a/tests/disas/i32-load16-u.wat +++ b/tests/disas/i32-load16-u.wat @@ -9,6 +9,7 @@ i32.load16_u)) ;; function u0:0(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -21,7 +22,7 @@ ;; @0032 v4 = uextend.i64 v2 ;; @0032 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0032 v6 = iadd v5, v4 -;; @0032 v7 = uload16.i32 little heap v6 +;; @0032 v7 = uload16.i32 little region0 v6 ;; @0035 jump block1 ;; ;; block1: diff --git a/tests/disas/i32-load8-s.wat b/tests/disas/i32-load8-s.wat index 3d62165bf76e..3deb1c904df5 100644 --- a/tests/disas/i32-load8-s.wat +++ b/tests/disas/i32-load8-s.wat @@ -9,6 +9,7 @@ i32.load8_s)) ;; function u0:0(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -21,7 +22,7 @@ ;; @0031 v4 = uextend.i64 v2 ;; @0031 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0031 v6 = iadd v5, v4 -;; @0031 v7 = sload8.i32 little heap v6 +;; @0031 v7 = sload8.i32 little region0 v6 ;; @0034 jump block1 ;; ;; block1: diff --git a/tests/disas/i32-load8-u.wat b/tests/disas/i32-load8-u.wat index 67548ca5090c..3dea878c8af4 100644 --- a/tests/disas/i32-load8-u.wat +++ b/tests/disas/i32-load8-u.wat @@ -9,6 +9,7 @@ i32.load8_u)) ;; function u0:0(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -21,7 +22,7 @@ ;; @0031 v4 = uextend.i64 v2 ;; @0031 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0031 v6 = iadd v5, v4 -;; @0031 v7 = uload8.i32 little heap v6 +;; @0031 v7 = uload8.i32 little region0 v6 ;; @0034 jump block1 ;; ;; block1: diff --git a/tests/disas/i32-store.wat b/tests/disas/i32-store.wat index bb44dfc2bf70..4e6d11a31792 100644 --- a/tests/disas/i32-store.wat +++ b/tests/disas/i32-store.wat @@ -10,6 +10,7 @@ i32.store)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -22,7 +23,7 @@ ;; @0031 v4 = uextend.i64 v2 ;; @0031 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0031 v6 = iadd v5, v4 -;; @0031 store little heap v3, v6 +;; @0031 store little region0 v3, v6 ;; @0034 jump block1 ;; ;; block1: diff --git a/tests/disas/i32-store16.wat b/tests/disas/i32-store16.wat index 20db521ac12c..e17b34dd50e2 100644 --- a/tests/disas/i32-store16.wat +++ b/tests/disas/i32-store16.wat @@ -10,6 +10,7 @@ i32.store16)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -22,7 +23,7 @@ ;; @0033 v4 = uextend.i64 v2 ;; @0033 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0033 v6 = iadd v5, v4 -;; @0033 istore16 little heap v3, v6 +;; @0033 istore16 little region0 v3, v6 ;; @0036 jump block1 ;; ;; block1: diff --git a/tests/disas/i32-store8.wat b/tests/disas/i32-store8.wat index 0bd3c4dd182c..59a823880bb1 100644 --- a/tests/disas/i32-store8.wat +++ b/tests/disas/i32-store8.wat @@ -10,6 +10,7 @@ i32.store8)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -22,7 +23,7 @@ ;; @0032 v4 = uextend.i64 v2 ;; @0032 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0032 v6 = iadd v5, v4 -;; @0032 istore8 little heap v3, v6 +;; @0032 istore8 little region0 v3, v6 ;; @0035 jump block1 ;; ;; block1: diff --git a/tests/disas/i64-load.wat b/tests/disas/i64-load.wat index d392e76b1521..2bd28a786b1b 100644 --- a/tests/disas/i64-load.wat +++ b/tests/disas/i64-load.wat @@ -9,6 +9,7 @@ i64.load)) ;; function u0:0(i64 vmctx, i64, i32) -> i64 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -21,7 +22,7 @@ ;; @002e v4 = uextend.i64 v2 ;; @002e v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @002e v6 = iadd v5, v4 -;; @002e v7 = load.i64 little heap v6 +;; @002e v7 = load.i64 little region0 v6 ;; @0031 jump block1 ;; ;; block1: diff --git a/tests/disas/i64-load16-s.wat b/tests/disas/i64-load16-s.wat index 928209697308..657378d5f78a 100644 --- a/tests/disas/i64-load16-s.wat +++ b/tests/disas/i64-load16-s.wat @@ -9,6 +9,7 @@ i64.load16_s)) ;; function u0:0(i64 vmctx, i64, i32) -> i64 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -21,7 +22,7 @@ ;; @0032 v4 = uextend.i64 v2 ;; @0032 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0032 v6 = iadd v5, v4 -;; @0032 v7 = sload16.i64 little heap v6 +;; @0032 v7 = sload16.i64 little region0 v6 ;; @0035 jump block1 ;; ;; block1: diff --git a/tests/disas/i64-load16-u.wat b/tests/disas/i64-load16-u.wat index 359663affd82..7641cf4cd1fa 100644 --- a/tests/disas/i64-load16-u.wat +++ b/tests/disas/i64-load16-u.wat @@ -9,6 +9,7 @@ i64.load16_u)) ;; function u0:0(i64 vmctx, i64, i32) -> i64 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -21,7 +22,7 @@ ;; @0032 v4 = uextend.i64 v2 ;; @0032 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0032 v6 = iadd v5, v4 -;; @0032 v7 = uload16.i64 little heap v6 +;; @0032 v7 = uload16.i64 little region0 v6 ;; @0035 jump block1 ;; ;; block1: diff --git a/tests/disas/i64-load8-s.wat b/tests/disas/i64-load8-s.wat index 8e8f0f402e40..0264a4e1447c 100644 --- a/tests/disas/i64-load8-s.wat +++ b/tests/disas/i64-load8-s.wat @@ -9,6 +9,7 @@ i64.load8_s)) ;; function u0:0(i64 vmctx, i64, i32) -> i64 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -21,7 +22,7 @@ ;; @0031 v4 = uextend.i64 v2 ;; @0031 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0031 v6 = iadd v5, v4 -;; @0031 v7 = sload8.i64 little heap v6 +;; @0031 v7 = sload8.i64 little region0 v6 ;; @0034 jump block1 ;; ;; block1: diff --git a/tests/disas/i64-load8-u.wat b/tests/disas/i64-load8-u.wat index 05293f228035..0847c8e2c2c4 100644 --- a/tests/disas/i64-load8-u.wat +++ b/tests/disas/i64-load8-u.wat @@ -9,6 +9,7 @@ i64.load8_u)) ;; function u0:0(i64 vmctx, i64, i32) -> i64 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -21,7 +22,7 @@ ;; @0031 v4 = uextend.i64 v2 ;; @0031 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0031 v6 = iadd v5, v4 -;; @0031 v7 = uload8.i64 little heap v6 +;; @0031 v7 = uload8.i64 little region0 v6 ;; @0034 jump block1 ;; ;; block1: diff --git a/tests/disas/i64-store.wat b/tests/disas/i64-store.wat index d001e38e191a..60fcc7f9413d 100644 --- a/tests/disas/i64-store.wat +++ b/tests/disas/i64-store.wat @@ -10,6 +10,7 @@ i64.store)) ;; function u0:0(i64 vmctx, i64, i32, i64) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -22,7 +23,7 @@ ;; @0031 v4 = uextend.i64 v2 ;; @0031 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0031 v6 = iadd v5, v4 -;; @0031 store little heap v3, v6 +;; @0031 store little region0 v3, v6 ;; @0034 jump block1 ;; ;; block1: diff --git a/tests/disas/i64-store16.wat b/tests/disas/i64-store16.wat index cb6b8aca0e0d..e10622bbd9fa 100644 --- a/tests/disas/i64-store16.wat +++ b/tests/disas/i64-store16.wat @@ -10,6 +10,7 @@ i64.store16)) ;; function u0:0(i64 vmctx, i64, i32, i64) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -22,7 +23,7 @@ ;; @0033 v4 = uextend.i64 v2 ;; @0033 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0033 v6 = iadd v5, v4 -;; @0033 istore16 little heap v3, v6 +;; @0033 istore16 little region0 v3, v6 ;; @0036 jump block1 ;; ;; block1: diff --git a/tests/disas/i64-store32.wat b/tests/disas/i64-store32.wat index 749aabbacaa0..ce1ef44a398d 100644 --- a/tests/disas/i64-store32.wat +++ b/tests/disas/i64-store32.wat @@ -10,6 +10,7 @@ i64.store32)) ;; function u0:0(i64 vmctx, i64, i32, i64) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -22,7 +23,7 @@ ;; @0033 v4 = uextend.i64 v2 ;; @0033 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0033 v6 = iadd v5, v4 -;; @0033 istore32 little heap v3, v6 +;; @0033 istore32 little region0 v3, v6 ;; @0036 jump block1 ;; ;; block1: diff --git a/tests/disas/i64-store8.wat b/tests/disas/i64-store8.wat index 9e263ae74804..19f534691c26 100644 --- a/tests/disas/i64-store8.wat +++ b/tests/disas/i64-store8.wat @@ -10,6 +10,7 @@ i64.store8)) ;; function u0:0(i64 vmctx, i64, i32, i64) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -22,7 +23,7 @@ ;; @0032 v4 = uextend.i64 v2 ;; @0032 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0032 v6 = iadd v5, v4 -;; @0032 istore8 little heap v3, v6 +;; @0032 istore8 little region0 v3, v6 ;; @0035 jump block1 ;; ;; block1: diff --git a/tests/disas/icall-loop.wat b/tests/disas/icall-loop.wat index 5874570b9e85..a5b97f705c5d 100644 --- a/tests/disas/icall-loop.wat +++ b/tests/disas/icall-loop.wat @@ -23,6 +23,7 @@ ) ;; function u0:0(i64 vmctx, i64, i32) tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -50,7 +51,7 @@ ;; @0027 jump block2 ;; ;; block2: -;; @002b v12 = load.i64 user6 aligned table v11 +;; @002b v12 = load.i64 user6 aligned region0 v11 ;; v31 = iconst.i64 -2 ;; v32 = band v12, v31 ; v31 = -2 ;; @002b brif v12, block5(v32), block4 @@ -71,6 +72,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64) tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -94,7 +96,7 @@ ;; ;; block2: ;; v37 = iadd.i64 v6, v36 ; v36 = 8 -;; @0038 v11 = load.i64 user6 aligned table v37 +;; @0038 v11 = load.i64 user6 aligned region0 v37 ;; v38 = iconst.i64 -2 ;; v39 = band v11, v38 ; v38 = -2 ;; @0038 brif v11, block5(v39), block4 diff --git a/tests/disas/icall-simd.wat b/tests/disas/icall-simd.wat index 563cc990b72f..994f998cb626 100644 --- a/tests/disas/icall-simd.wat +++ b/tests/disas/icall-simd.wat @@ -9,6 +9,7 @@ ) ;; function u0:0(i64 vmctx, i64, i32, i8x16) -> i8x16 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -29,7 +30,7 @@ ;; @0033 v10 = iadd v8, v9 ;; @0033 v11 = iconst.i64 0 ;; @0033 v12 = select_spectre_guard v6, v11, v10 ; v11 = 0 -;; @0033 v13 = load.i64 user6 aligned table v12 +;; @0033 v13 = load.i64 user6 aligned region0 v12 ;; v28 = iconst.i64 -2 ;; @0033 v14 = band v13, v28 ; v28 = -2 ;; @0033 brif v13, block3(v14), block2 diff --git a/tests/disas/icall.wat b/tests/disas/icall.wat index df8447bf12b0..0366cbd45b7c 100644 --- a/tests/disas/icall.wat +++ b/tests/disas/icall.wat @@ -9,6 +9,7 @@ ) ;; function u0:0(i64 vmctx, i64, i32, f32) -> i32 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -29,7 +30,7 @@ ;; @0033 v10 = iadd v8, v9 ;; @0033 v11 = iconst.i64 0 ;; @0033 v12 = select_spectre_guard v6, v11, v10 ; v11 = 0 -;; @0033 v13 = load.i64 user6 aligned table v12 +;; @0033 v13 = load.i64 user6 aligned region0 v12 ;; v28 = iconst.i64 -2 ;; @0033 v14 = band v13, v28 ; v28 = -2 ;; @0033 brif v13, block3(v14), block2 diff --git a/tests/disas/idempotent-store.wat b/tests/disas/idempotent-store.wat index 516fdb472c20..b18feaf1d99d 100644 --- a/tests/disas/idempotent-store.wat +++ b/tests/disas/idempotent-store.wat @@ -15,6 +15,7 @@ ) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -27,7 +28,7 @@ ;; @0029 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0029 v4 = uextend.i64 v2 ;; @0029 v6 = iadd v5, v4 -;; @0029 store little heap v3, v6 +;; @0029 store little region0 v3, v6 ;; @0033 jump block1 ;; ;; block1: diff --git a/tests/disas/if-unreachable-else-params-2.wat b/tests/disas/if-unreachable-else-params-2.wat index 36299c334ce5..ef36545c05cb 100644 --- a/tests/disas/if-unreachable-else-params-2.wat +++ b/tests/disas/if-unreachable-else-params-2.wat @@ -20,6 +20,7 @@ (export "memory" (memory 0))) ;; function u0:0(i64 vmctx, i64, i32, i32) -> f64 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -37,7 +38,7 @@ ;; @0058 v7 = uextend.i64 v2 ;; @0058 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @0058 v9 = iadd v8, v7 -;; @0058 v10 = sload16.i64 little heap v9 +;; @0058 v10 = sload16.i64 little region0 v9 ;; @005c jump block3 ;; ;; block3: diff --git a/tests/disas/if-unreachable-else-params.wat b/tests/disas/if-unreachable-else-params.wat index 21d1e89b4faf..c99482a0b008 100644 --- a/tests/disas/if-unreachable-else-params.wat +++ b/tests/disas/if-unreachable-else-params.wat @@ -43,6 +43,7 @@ (export "memory" (memory 0))) ;; function u0:0(i64 vmctx, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -62,7 +63,7 @@ ;; @004b v7 = uextend.i64 v3 ; v3 = 35 ;; @004b v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @004b v9 = iadd v8, v7 -;; @004b v10 = sload16.i64 little heap v9 +;; @004b v10 = sload16.i64 little region0 v9 ;; @004e trap user12 ;; ;; block6: diff --git a/tests/disas/indirect-call-no-caching.wat b/tests/disas/indirect-call-no-caching.wat index 6d4322dc7fe0..716dda0bc9dc 100644 --- a/tests/disas/indirect-call-no-caching.wat +++ b/tests/disas/indirect-call-no-caching.wat @@ -63,6 +63,7 @@ ;; } ;; ;; function u0:3(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -83,7 +84,7 @@ ;; @0050 v9 = iadd v7, v8 ;; @0050 v10 = iconst.i64 0 ;; @0050 v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @0050 v12 = load.i64 user6 aligned table v11 +;; @0050 v12 = load.i64 user6 aligned region0 v11 ;; v27 = iconst.i64 -2 ;; @0050 v13 = band v12, v27 ; v27 = -2 ;; @0050 brif v12, block3(v13), block2 diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat index 5b15e795b8b8..ad5d80c53e4f 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0040 trapnz v8, heap_oob ;; @0040 v9 = load.i64 notrap aligned can_move v0+56 ;; @0040 v10 = iadd v9, v4 -;; @0040 store little heap v3, v10 +;; @0040 store little region0 v3, v10 ;; @0043 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -61,7 +63,7 @@ ;; @0048 trapnz v8, heap_oob ;; @0048 v9 = load.i64 notrap aligned can_move v0+56 ;; @0048 v10 = iadd v9, v4 -;; @0048 v11 = load.i32 little heap v10 +;; @0048 v11 = load.i32 little region0 v10 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat index 7b52ebb6f5ce..61ff822a12c9 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -38,7 +39,7 @@ ;; @0040 v10 = iadd v9, v4 ;; @0040 v11 = iconst.i64 4096 ;; @0040 v12 = iadd v10, v11 ; v11 = 4096 -;; @0040 store little heap v3, v12 +;; @0040 store little region0 v3, v12 ;; @0044 jump block1 ;; ;; block1: @@ -46,6 +47,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -65,7 +67,7 @@ ;; @0049 v10 = iadd v9, v4 ;; @0049 v11 = iconst.i64 4096 ;; @0049 v12 = iadd v10, v11 ; v11 = 4096 -;; @0049 v13 = load.i32 little heap v12 +;; @0049 v13 = load.i32 little region0 v12 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat index 804a2c20b6ef..01cb1e7cd335 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -38,7 +39,7 @@ ;; @0040 v10 = iadd v9, v4 ;; @0040 v11 = iconst.i64 0xffff_0000 ;; @0040 v12 = iadd v10, v11 ; v11 = 0xffff_0000 -;; @0040 store little heap v3, v12 +;; @0040 store little region0 v3, v12 ;; @0047 jump block1 ;; ;; block1: @@ -46,6 +47,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -65,7 +67,7 @@ ;; @004c v10 = iadd v9, v4 ;; @004c v11 = iconst.i64 0xffff_0000 ;; @004c v12 = iadd v10, v11 ; v11 = 0xffff_0000 -;; @004c v13 = load.i32 little heap v12 +;; @004c v13 = load.i32 little region0 v12 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0_offset.wat index 030324ab711e..e843be86093c 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -34,7 +35,7 @@ ;; @0040 trapnz v6, heap_oob ;; @0040 v7 = load.i64 notrap aligned can_move v0+56 ;; @0040 v8 = iadd v7, v4 -;; @0040 istore8 little heap v3, v8 +;; @0040 istore8 little region0 v3, v8 ;; @0043 jump block1 ;; ;; block1: @@ -42,6 +43,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -57,7 +59,7 @@ ;; @0048 trapnz v6, heap_oob ;; @0048 v7 = load.i64 notrap aligned can_move v0+56 ;; @0048 v8 = iadd v7, v4 -;; @0048 v9 = uload8.i32 little heap v8 +;; @0048 v9 = uload8.i32 little region0 v8 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat index e9b669f45ffe..b59b4266ed79 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -38,7 +39,7 @@ ;; @0040 v10 = iadd v9, v4 ;; @0040 v11 = iconst.i64 4096 ;; @0040 v12 = iadd v10, v11 ; v11 = 4096 -;; @0040 istore8 little heap v3, v12 +;; @0040 istore8 little region0 v3, v12 ;; @0044 jump block1 ;; ;; block1: @@ -46,6 +47,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -65,7 +67,7 @@ ;; @0049 v10 = iadd v9, v4 ;; @0049 v11 = iconst.i64 4096 ;; @0049 v12 = iadd v10, v11 ; v11 = 4096 -;; @0049 v13 = uload8.i32 little heap v12 +;; @0049 v13 = uload8.i32 little region0 v12 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat index b64e54555fdf..ae33ee48df97 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -38,7 +39,7 @@ ;; @0040 v10 = iadd v9, v4 ;; @0040 v11 = iconst.i64 0xffff_0000 ;; @0040 v12 = iadd v10, v11 ; v11 = 0xffff_0000 -;; @0040 istore8 little heap v3, v12 +;; @0040 istore8 little region0 v3, v12 ;; @0047 jump block1 ;; ;; block1: @@ -46,6 +47,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -65,7 +67,7 @@ ;; @004c v10 = iadd v9, v4 ;; @004c v11 = iconst.i64 0xffff_0000 ;; @004c v12 = iadd v10, v11 ; v11 = 0xffff_0000 -;; @004c v13 = uload8.i32 little heap v12 +;; @004c v13 = uload8.i32 little region0 v12 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat index 72a9e7245195..3ddef8dc5128 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -37,7 +38,7 @@ ;; @0040 v10 = iadd v9, v4 ;; @0040 v11 = iconst.i64 0 ;; @0040 v12 = select_spectre_guard v8, v11, v10 ; v11 = 0 -;; @0040 store little heap v3, v12 +;; @0040 store little region0 v3, v12 ;; @0043 jump block1 ;; ;; block1: @@ -45,6 +46,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -63,7 +65,7 @@ ;; @0048 v10 = iadd v9, v4 ;; @0048 v11 = iconst.i64 0 ;; @0048 v12 = select_spectre_guard v8, v11, v10 ; v11 = 0 -;; @0048 v13 = load.i32 little heap v12 +;; @0048 v13 = load.i32 little region0 v12 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index aa886558a3b0..619c1b6f6112 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -39,7 +40,7 @@ ;; @0040 v12 = iadd v10, v11 ; v11 = 4096 ;; @0040 v13 = iconst.i64 0 ;; @0040 v14 = select_spectre_guard v8, v13, v12 ; v13 = 0 -;; @0040 store little heap v3, v14 +;; @0040 store little region0 v3, v14 ;; @0044 jump block1 ;; ;; block1: @@ -47,6 +48,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -67,7 +69,7 @@ ;; @0049 v12 = iadd v10, v11 ; v11 = 4096 ;; @0049 v13 = iconst.i64 0 ;; @0049 v14 = select_spectre_guard v8, v13, v12 ; v13 = 0 -;; @0049 v15 = load.i32 little heap v14 +;; @0049 v15 = load.i32 little region0 v14 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat index 3e29b11b5275..cf5f09f6ea3e 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -39,7 +40,7 @@ ;; @0040 v12 = iadd v10, v11 ; v11 = 0xffff_0000 ;; @0040 v13 = iconst.i64 0 ;; @0040 v14 = select_spectre_guard v8, v13, v12 ; v13 = 0 -;; @0040 store little heap v3, v14 +;; @0040 store little region0 v3, v14 ;; @0047 jump block1 ;; ;; block1: @@ -47,6 +48,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -67,7 +69,7 @@ ;; @004c v12 = iadd v10, v11 ; v11 = 0xffff_0000 ;; @004c v13 = iconst.i64 0 ;; @004c v14 = select_spectre_guard v8, v13, v12 ; v13 = 0 -;; @004c v15 = load.i32 little heap v14 +;; @004c v15 = load.i32 little region0 v14 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat index 2db998084749..d92ef2c30254 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -35,7 +36,7 @@ ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 0 ;; @0040 v10 = select_spectre_guard v6, v9, v8 ; v9 = 0 -;; @0040 istore8 little heap v3, v10 +;; @0040 istore8 little region0 v3, v10 ;; @0043 jump block1 ;; ;; block1: @@ -43,6 +44,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -59,7 +61,7 @@ ;; @0048 v8 = iadd v7, v4 ;; @0048 v9 = iconst.i64 0 ;; @0048 v10 = select_spectre_guard v6, v9, v8 ; v9 = 0 -;; @0048 v11 = uload8.i32 little heap v10 +;; @0048 v11 = uload8.i32 little region0 v10 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index 60bbf550c4ca..ab610b5cd391 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -39,7 +40,7 @@ ;; @0040 v12 = iadd v10, v11 ; v11 = 4096 ;; @0040 v13 = iconst.i64 0 ;; @0040 v14 = select_spectre_guard v8, v13, v12 ; v13 = 0 -;; @0040 istore8 little heap v3, v14 +;; @0040 istore8 little region0 v3, v14 ;; @0044 jump block1 ;; ;; block1: @@ -47,6 +48,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -67,7 +69,7 @@ ;; @0049 v12 = iadd v10, v11 ; v11 = 4096 ;; @0049 v13 = iconst.i64 0 ;; @0049 v14 = select_spectre_guard v8, v13, v12 ; v13 = 0 -;; @0049 v15 = uload8.i32 little heap v14 +;; @0049 v15 = uload8.i32 little region0 v14 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat index d261592bd9a9..27703d24317c 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -39,7 +40,7 @@ ;; @0040 v12 = iadd v10, v11 ; v11 = 0xffff_0000 ;; @0040 v13 = iconst.i64 0 ;; @0040 v14 = select_spectre_guard v8, v13, v12 ; v13 = 0 -;; @0040 istore8 little heap v3, v14 +;; @0040 istore8 little region0 v3, v14 ;; @0047 jump block1 ;; ;; block1: @@ -47,6 +48,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -67,7 +69,7 @@ ;; @004c v12 = iadd v10, v11 ; v11 = 0xffff_0000 ;; @004c v13 = iconst.i64 0 ;; @004c v14 = select_spectre_guard v8, v13, v12 ; v13 = 0 -;; @004c v15 = uload8.i32 little heap v14 +;; @004c v15 = uload8.i32 little region0 v14 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat index e38632f53e5d..7d09bd0d69d4 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -34,7 +35,7 @@ ;; @0040 trapnz v6, heap_oob ;; @0040 v7 = load.i64 notrap aligned can_move v0+56 ;; @0040 v8 = iadd v7, v4 -;; @0040 store little heap v3, v8 +;; @0040 store little region0 v3, v8 ;; @0043 jump block1 ;; ;; block1: @@ -42,6 +43,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -57,7 +59,7 @@ ;; @0048 trapnz v6, heap_oob ;; @0048 v7 = load.i64 notrap aligned can_move v0+56 ;; @0048 v8 = iadd v7, v4 -;; @0048 v9 = load.i32 little heap v8 +;; @0048 v9 = load.i32 little region0 v8 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat index 086f27a4df3d..e72b7a9c90a6 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 4096 ;; @0040 v10 = iadd v8, v9 ; v9 = 4096 -;; @0040 store little heap v3, v10 +;; @0040 store little region0 v3, v10 ;; @0044 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -61,7 +63,7 @@ ;; @0049 v8 = iadd v7, v4 ;; @0049 v9 = iconst.i64 4096 ;; @0049 v10 = iadd v8, v9 ; v9 = 4096 -;; @0049 v11 = load.i32 little heap v10 +;; @0049 v11 = load.i32 little region0 v10 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat index 58bdb43441b9..fe48483b23a5 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 0xffff_0000 ;; @0040 v10 = iadd v8, v9 ; v9 = 0xffff_0000 -;; @0040 store little heap v3, v10 +;; @0040 store little region0 v3, v10 ;; @0047 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -61,7 +63,7 @@ ;; @004c v8 = iadd v7, v4 ;; @004c v9 = iconst.i64 0xffff_0000 ;; @004c v10 = iadd v8, v9 ; v9 = 0xffff_0000 -;; @004c v11 = load.i32 little heap v10 +;; @004c v11 = load.i32 little region0 v10 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat index bc08355b4f8f..8a966ccdf2ba 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -34,7 +35,7 @@ ;; @0040 trapnz v6, heap_oob ;; @0040 v7 = load.i64 notrap aligned can_move v0+56 ;; @0040 v8 = iadd v7, v4 -;; @0040 istore8 little heap v3, v8 +;; @0040 istore8 little region0 v3, v8 ;; @0043 jump block1 ;; ;; block1: @@ -42,6 +43,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -57,7 +59,7 @@ ;; @0048 trapnz v6, heap_oob ;; @0048 v7 = load.i64 notrap aligned can_move v0+56 ;; @0048 v8 = iadd v7, v4 -;; @0048 v9 = uload8.i32 little heap v8 +;; @0048 v9 = uload8.i32 little region0 v8 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat index db6fc8becc90..010a6068e719 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 4096 ;; @0040 v10 = iadd v8, v9 ; v9 = 4096 -;; @0040 istore8 little heap v3, v10 +;; @0040 istore8 little region0 v3, v10 ;; @0044 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -61,7 +63,7 @@ ;; @0049 v8 = iadd v7, v4 ;; @0049 v9 = iconst.i64 4096 ;; @0049 v10 = iadd v8, v9 ; v9 = 4096 -;; @0049 v11 = uload8.i32 little heap v10 +;; @0049 v11 = uload8.i32 little region0 v10 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat index 815c2f1972a0..c3eefe0664b2 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 0xffff_0000 ;; @0040 v10 = iadd v8, v9 ; v9 = 0xffff_0000 -;; @0040 istore8 little heap v3, v10 +;; @0040 istore8 little region0 v3, v10 ;; @0047 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -61,7 +63,7 @@ ;; @004c v8 = iadd v7, v4 ;; @004c v9 = iconst.i64 0xffff_0000 ;; @004c v10 = iadd v8, v9 ; v9 = 0xffff_0000 -;; @004c v11 = uload8.i32 little heap v10 +;; @004c v11 = uload8.i32 little region0 v10 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat index 4bc0faf827ee..54238d583f9b 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -35,7 +36,7 @@ ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 0 ;; @0040 v10 = select_spectre_guard v6, v9, v8 ; v9 = 0 -;; @0040 store little heap v3, v10 +;; @0040 store little region0 v3, v10 ;; @0043 jump block1 ;; ;; block1: @@ -43,6 +44,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -59,7 +61,7 @@ ;; @0048 v8 = iadd v7, v4 ;; @0048 v9 = iconst.i64 0 ;; @0048 v10 = select_spectre_guard v6, v9, v8 ; v9 = 0 -;; @0048 v11 = load.i32 little heap v10 +;; @0048 v11 = load.i32 little region0 v10 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat index a475a4944b98..4cb5f758cbb6 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -37,7 +38,7 @@ ;; @0040 v10 = iadd v8, v9 ; v9 = 4096 ;; @0040 v11 = iconst.i64 0 ;; @0040 v12 = select_spectre_guard v6, v11, v10 ; v11 = 0 -;; @0040 store little heap v3, v12 +;; @0040 store little region0 v3, v12 ;; @0044 jump block1 ;; ;; block1: @@ -45,6 +46,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -63,7 +65,7 @@ ;; @0049 v10 = iadd v8, v9 ; v9 = 4096 ;; @0049 v11 = iconst.i64 0 ;; @0049 v12 = select_spectre_guard v6, v11, v10 ; v11 = 0 -;; @0049 v13 = load.i32 little heap v12 +;; @0049 v13 = load.i32 little region0 v12 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat index 2b10a932f2fc..369c7278b0ec 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -37,7 +38,7 @@ ;; @0040 v10 = iadd v8, v9 ; v9 = 0xffff_0000 ;; @0040 v11 = iconst.i64 0 ;; @0040 v12 = select_spectre_guard v6, v11, v10 ; v11 = 0 -;; @0040 store little heap v3, v12 +;; @0040 store little region0 v3, v12 ;; @0047 jump block1 ;; ;; block1: @@ -45,6 +46,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -63,7 +65,7 @@ ;; @004c v10 = iadd v8, v9 ; v9 = 0xffff_0000 ;; @004c v11 = iconst.i64 0 ;; @004c v12 = select_spectre_guard v6, v11, v10 ; v11 = 0 -;; @004c v13 = load.i32 little heap v12 +;; @004c v13 = load.i32 little region0 v12 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat index d64e835481f9..f3ff5e706754 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -35,7 +36,7 @@ ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 0 ;; @0040 v10 = select_spectre_guard v6, v9, v8 ; v9 = 0 -;; @0040 istore8 little heap v3, v10 +;; @0040 istore8 little region0 v3, v10 ;; @0043 jump block1 ;; ;; block1: @@ -43,6 +44,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -59,7 +61,7 @@ ;; @0048 v8 = iadd v7, v4 ;; @0048 v9 = iconst.i64 0 ;; @0048 v10 = select_spectre_guard v6, v9, v8 ; v9 = 0 -;; @0048 v11 = uload8.i32 little heap v10 +;; @0048 v11 = uload8.i32 little region0 v10 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat index d2e45b8afcfe..c377cb7595eb 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -37,7 +38,7 @@ ;; @0040 v10 = iadd v8, v9 ; v9 = 4096 ;; @0040 v11 = iconst.i64 0 ;; @0040 v12 = select_spectre_guard v6, v11, v10 ; v11 = 0 -;; @0040 istore8 little heap v3, v12 +;; @0040 istore8 little region0 v3, v12 ;; @0044 jump block1 ;; ;; block1: @@ -45,6 +46,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -63,7 +65,7 @@ ;; @0049 v10 = iadd v8, v9 ; v9 = 4096 ;; @0049 v11 = iconst.i64 0 ;; @0049 v12 = select_spectre_guard v6, v11, v10 ; v11 = 0 -;; @0049 v13 = uload8.i32 little heap v12 +;; @0049 v13 = uload8.i32 little region0 v12 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 9e1acfb92a2c..3ac6722686e8 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -37,7 +38,7 @@ ;; @0040 v10 = iadd v8, v9 ; v9 = 0xffff_0000 ;; @0040 v11 = iconst.i64 0 ;; @0040 v12 = select_spectre_guard v6, v11, v10 ; v11 = 0 -;; @0040 istore8 little heap v3, v12 +;; @0040 istore8 little region0 v3, v12 ;; @0047 jump block1 ;; ;; block1: @@ -45,6 +46,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -63,7 +65,7 @@ ;; @004c v10 = iadd v8, v9 ; v9 = 0xffff_0000 ;; @004c v11 = iconst.i64 0 ;; @004c v12 = select_spectre_guard v6, v11, v10 ; v11 = 0 -;; @004c v13 = uload8.i32 little heap v12 +;; @004c v13 = uload8.i32 little region0 v12 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat index d80c3271f1a1..463a70007ace 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -35,7 +36,7 @@ ;; @0040 trapnz v7, heap_oob ;; @0040 v8 = load.i64 notrap aligned can_move v0+56 ;; @0040 v9 = iadd v8, v2 -;; @0040 store little heap v3, v9 +;; @0040 store little region0 v3, v9 ;; @0043 jump block1 ;; ;; block1: @@ -43,6 +44,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -59,7 +61,7 @@ ;; @0048 trapnz v7, heap_oob ;; @0048 v8 = load.i64 notrap aligned can_move v0+56 ;; @0048 v9 = iadd v8, v2 -;; @0048 v10 = load.i32 little heap v9 +;; @0048 v10 = load.i32 little region0 v9 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat index 9b55ba5764dc..d030f1856096 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -37,7 +38,7 @@ ;; @0040 v9 = iadd v8, v2 ;; @0040 v10 = iconst.i64 4096 ;; @0040 v11 = iadd v9, v10 ; v10 = 4096 -;; @0040 store little heap v3, v11 +;; @0040 store little region0 v3, v11 ;; @0044 jump block1 ;; ;; block1: @@ -45,6 +46,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -63,7 +65,7 @@ ;; @0049 v9 = iadd v8, v2 ;; @0049 v10 = iconst.i64 4096 ;; @0049 v11 = iadd v9, v10 ; v10 = 4096 -;; @0049 v12 = load.i32 little heap v11 +;; @0049 v12 = load.i32 little region0 v11 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat index e2ca694c51d0..f029d278d6f3 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -37,7 +38,7 @@ ;; @0040 v9 = iadd v8, v2 ;; @0040 v10 = iconst.i64 0xffff_0000 ;; @0040 v11 = iadd v9, v10 ; v10 = 0xffff_0000 -;; @0040 store little heap v3, v11 +;; @0040 store little region0 v3, v11 ;; @0047 jump block1 ;; ;; block1: @@ -45,6 +46,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -63,7 +65,7 @@ ;; @004c v9 = iadd v8, v2 ;; @004c v10 = iconst.i64 0xffff_0000 ;; @004c v11 = iadd v9, v10 ; v10 = 0xffff_0000 -;; @004c v12 = load.i32 little heap v11 +;; @004c v12 = load.i32 little region0 v11 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0_offset.wat index ab453c32f6a6..e2d1f7eda9c0 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -33,7 +34,7 @@ ;; @0040 trapnz v5, heap_oob ;; @0040 v6 = load.i64 notrap aligned can_move v0+56 ;; @0040 v7 = iadd v6, v2 -;; @0040 istore8 little heap v3, v7 +;; @0040 istore8 little region0 v3, v7 ;; @0043 jump block1 ;; ;; block1: @@ -41,6 +42,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +57,7 @@ ;; @0048 trapnz v5, heap_oob ;; @0048 v6 = load.i64 notrap aligned can_move v0+56 ;; @0048 v7 = iadd v6, v2 -;; @0048 v8 = uload8.i32 little heap v7 +;; @0048 v8 = uload8.i32 little region0 v7 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat index 965ea70dbfb3..c285aa3e7a7a 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -37,7 +38,7 @@ ;; @0040 v9 = iadd v8, v2 ;; @0040 v10 = iconst.i64 4096 ;; @0040 v11 = iadd v9, v10 ; v10 = 4096 -;; @0040 istore8 little heap v3, v11 +;; @0040 istore8 little region0 v3, v11 ;; @0044 jump block1 ;; ;; block1: @@ -45,6 +46,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -63,7 +65,7 @@ ;; @0049 v9 = iadd v8, v2 ;; @0049 v10 = iconst.i64 4096 ;; @0049 v11 = iadd v9, v10 ; v10 = 4096 -;; @0049 v12 = uload8.i32 little heap v11 +;; @0049 v12 = uload8.i32 little region0 v11 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat index a01e994ff089..0eb8eaef7129 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -37,7 +38,7 @@ ;; @0040 v9 = iadd v8, v2 ;; @0040 v10 = iconst.i64 0xffff_0000 ;; @0040 v11 = iadd v9, v10 ; v10 = 0xffff_0000 -;; @0040 istore8 little heap v3, v11 +;; @0040 istore8 little region0 v3, v11 ;; @0047 jump block1 ;; ;; block1: @@ -45,6 +46,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -63,7 +65,7 @@ ;; @004c v9 = iadd v8, v2 ;; @004c v10 = iconst.i64 0xffff_0000 ;; @004c v11 = iadd v9, v10 ; v10 = 0xffff_0000 -;; @004c v12 = uload8.i32 little heap v11 +;; @004c v12 = uload8.i32 little region0 v11 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat index fd93721ab1bf..fc71e73fb869 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0040 v9 = iadd v8, v2 ;; @0040 v10 = iconst.i64 0 ;; @0040 v11 = select_spectre_guard v7, v10, v9 ; v10 = 0 -;; @0040 store little heap v3, v11 +;; @0040 store little region0 v3, v11 ;; @0043 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -61,7 +63,7 @@ ;; @0048 v9 = iadd v8, v2 ;; @0048 v10 = iconst.i64 0 ;; @0048 v11 = select_spectre_guard v7, v10, v9 ; v10 = 0 -;; @0048 v12 = load.i32 little heap v11 +;; @0048 v12 = load.i32 little region0 v11 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index 8bd1569d114a..25f6d211224a 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -38,7 +39,7 @@ ;; @0040 v11 = iadd v9, v10 ; v10 = 4096 ;; @0040 v12 = iconst.i64 0 ;; @0040 v13 = select_spectre_guard v7, v12, v11 ; v12 = 0 -;; @0040 store little heap v3, v13 +;; @0040 store little region0 v3, v13 ;; @0044 jump block1 ;; ;; block1: @@ -46,6 +47,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -65,7 +67,7 @@ ;; @0049 v11 = iadd v9, v10 ; v10 = 4096 ;; @0049 v12 = iconst.i64 0 ;; @0049 v13 = select_spectre_guard v7, v12, v11 ; v12 = 0 -;; @0049 v14 = load.i32 little heap v13 +;; @0049 v14 = load.i32 little region0 v13 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat index 40450e3a505d..9b821eb6a0d5 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -38,7 +39,7 @@ ;; @0040 v11 = iadd v9, v10 ; v10 = 0xffff_0000 ;; @0040 v12 = iconst.i64 0 ;; @0040 v13 = select_spectre_guard v7, v12, v11 ; v12 = 0 -;; @0040 store little heap v3, v13 +;; @0040 store little region0 v3, v13 ;; @0047 jump block1 ;; ;; block1: @@ -46,6 +47,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -65,7 +67,7 @@ ;; @004c v11 = iadd v9, v10 ; v10 = 0xffff_0000 ;; @004c v12 = iconst.i64 0 ;; @004c v13 = select_spectre_guard v7, v12, v11 ; v12 = 0 -;; @004c v14 = load.i32 little heap v13 +;; @004c v14 = load.i32 little region0 v13 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat index 43a316fb86b1..3b049553ed3d 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -34,7 +35,7 @@ ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0 ;; @0040 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 -;; @0040 istore8 little heap v3, v9 +;; @0040 istore8 little region0 v3, v9 ;; @0043 jump block1 ;; ;; block1: @@ -42,6 +43,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -57,7 +59,7 @@ ;; @0048 v7 = iadd v6, v2 ;; @0048 v8 = iconst.i64 0 ;; @0048 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 -;; @0048 v10 = uload8.i32 little heap v9 +;; @0048 v10 = uload8.i32 little region0 v9 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index 9dac946ce68f..676b01e03faa 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -38,7 +39,7 @@ ;; @0040 v11 = iadd v9, v10 ; v10 = 4096 ;; @0040 v12 = iconst.i64 0 ;; @0040 v13 = select_spectre_guard v7, v12, v11 ; v12 = 0 -;; @0040 istore8 little heap v3, v13 +;; @0040 istore8 little region0 v3, v13 ;; @0044 jump block1 ;; ;; block1: @@ -46,6 +47,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -65,7 +67,7 @@ ;; @0049 v11 = iadd v9, v10 ; v10 = 4096 ;; @0049 v12 = iconst.i64 0 ;; @0049 v13 = select_spectre_guard v7, v12, v11 ; v12 = 0 -;; @0049 v14 = uload8.i32 little heap v13 +;; @0049 v14 = uload8.i32 little region0 v13 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 4d9824dad65e..8c6c0fd04da9 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -38,7 +39,7 @@ ;; @0040 v11 = iadd v9, v10 ; v10 = 0xffff_0000 ;; @0040 v12 = iconst.i64 0 ;; @0040 v13 = select_spectre_guard v7, v12, v11 ; v12 = 0 -;; @0040 istore8 little heap v3, v13 +;; @0040 istore8 little region0 v3, v13 ;; @0047 jump block1 ;; ;; block1: @@ -46,6 +47,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -65,7 +67,7 @@ ;; @004c v11 = iadd v9, v10 ; v10 = 0xffff_0000 ;; @004c v12 = iconst.i64 0 ;; @004c v13 = select_spectre_guard v7, v12, v11 ; v12 = 0 -;; @004c v14 = uload8.i32 little heap v13 +;; @004c v14 = uload8.i32 little region0 v13 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat index 6646d81a5296..7a835779d3e9 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -33,7 +34,7 @@ ;; @0040 trapnz v5, heap_oob ;; @0040 v6 = load.i64 notrap aligned can_move v0+56 ;; @0040 v7 = iadd v6, v2 -;; @0040 store little heap v3, v7 +;; @0040 store little region0 v3, v7 ;; @0043 jump block1 ;; ;; block1: @@ -41,6 +42,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +57,7 @@ ;; @0048 trapnz v5, heap_oob ;; @0048 v6 = load.i64 notrap aligned can_move v0+56 ;; @0048 v7 = iadd v6, v2 -;; @0048 v8 = load.i32 little heap v7 +;; @0048 v8 = load.i32 little region0 v7 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat index 0296e7ad16da..93d1d115bab3 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -35,7 +36,7 @@ ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 4096 ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 -;; @0040 store little heap v3, v9 +;; @0040 store little region0 v3, v9 ;; @0044 jump block1 ;; ;; block1: @@ -43,6 +44,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -59,7 +61,7 @@ ;; @0049 v7 = iadd v6, v2 ;; @0049 v8 = iconst.i64 4096 ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 -;; @0049 v10 = load.i32 little heap v9 +;; @0049 v10 = load.i32 little region0 v9 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat index 4e2aa821a7af..b98dab917484 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -35,7 +36,7 @@ ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0xffff_0000 ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 -;; @0040 store little heap v3, v9 +;; @0040 store little region0 v3, v9 ;; @0047 jump block1 ;; ;; block1: @@ -43,6 +44,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -59,7 +61,7 @@ ;; @004c v7 = iadd v6, v2 ;; @004c v8 = iconst.i64 0xffff_0000 ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 -;; @004c v10 = load.i32 little heap v9 +;; @004c v10 = load.i32 little region0 v9 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat index 1bba7c0a4785..d76323aa51f8 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -33,7 +34,7 @@ ;; @0040 trapnz v5, heap_oob ;; @0040 v6 = load.i64 notrap aligned can_move v0+56 ;; @0040 v7 = iadd v6, v2 -;; @0040 istore8 little heap v3, v7 +;; @0040 istore8 little region0 v3, v7 ;; @0043 jump block1 ;; ;; block1: @@ -41,6 +42,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +57,7 @@ ;; @0048 trapnz v5, heap_oob ;; @0048 v6 = load.i64 notrap aligned can_move v0+56 ;; @0048 v7 = iadd v6, v2 -;; @0048 v8 = uload8.i32 little heap v7 +;; @0048 v8 = uload8.i32 little region0 v7 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat index 6dd5f62f961c..ccceb50afed7 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -35,7 +36,7 @@ ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 4096 ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 -;; @0040 istore8 little heap v3, v9 +;; @0040 istore8 little region0 v3, v9 ;; @0044 jump block1 ;; ;; block1: @@ -43,6 +44,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -59,7 +61,7 @@ ;; @0049 v7 = iadd v6, v2 ;; @0049 v8 = iconst.i64 4096 ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 -;; @0049 v10 = uload8.i32 little heap v9 +;; @0049 v10 = uload8.i32 little region0 v9 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat index 6ee354e95c01..0468dbe1215f 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -35,7 +36,7 @@ ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0xffff_0000 ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 -;; @0040 istore8 little heap v3, v9 +;; @0040 istore8 little region0 v3, v9 ;; @0047 jump block1 ;; ;; block1: @@ -43,6 +44,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -59,7 +61,7 @@ ;; @004c v7 = iadd v6, v2 ;; @004c v8 = iconst.i64 0xffff_0000 ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 -;; @004c v10 = uload8.i32 little heap v9 +;; @004c v10 = uload8.i32 little region0 v9 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat index a7144490b99c..eb092623dc47 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -34,7 +35,7 @@ ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0 ;; @0040 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 -;; @0040 store little heap v3, v9 +;; @0040 store little region0 v3, v9 ;; @0043 jump block1 ;; ;; block1: @@ -42,6 +43,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -57,7 +59,7 @@ ;; @0048 v7 = iadd v6, v2 ;; @0048 v8 = iconst.i64 0 ;; @0048 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 -;; @0048 v10 = load.i32 little heap v9 +;; @0048 v10 = load.i32 little region0 v9 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat index 8e6c25e426f4..f3ff43617779 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 ;; @0040 v10 = iconst.i64 0 ;; @0040 v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @0040 store little heap v3, v11 +;; @0040 store little region0 v3, v11 ;; @0044 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -61,7 +63,7 @@ ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 ;; @0049 v10 = iconst.i64 0 ;; @0049 v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @0049 v12 = load.i32 little heap v11 +;; @0049 v12 = load.i32 little region0 v11 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat index a328aca1e82d..b9f520d2d9c1 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 ;; @0040 v10 = iconst.i64 0 ;; @0040 v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @0040 store little heap v3, v11 +;; @0040 store little region0 v3, v11 ;; @0047 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -61,7 +63,7 @@ ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 ;; @004c v10 = iconst.i64 0 ;; @004c v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @004c v12 = load.i32 little heap v11 +;; @004c v12 = load.i32 little region0 v11 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat index 41a9d11ab937..c65eb90fefd9 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -34,7 +35,7 @@ ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0 ;; @0040 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 -;; @0040 istore8 little heap v3, v9 +;; @0040 istore8 little region0 v3, v9 ;; @0043 jump block1 ;; ;; block1: @@ -42,6 +43,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -57,7 +59,7 @@ ;; @0048 v7 = iadd v6, v2 ;; @0048 v8 = iconst.i64 0 ;; @0048 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 -;; @0048 v10 = uload8.i32 little heap v9 +;; @0048 v10 = uload8.i32 little region0 v9 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat index 665aa8d37e57..082687a4e5ba 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 ;; @0040 v10 = iconst.i64 0 ;; @0040 v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @0040 istore8 little heap v3, v11 +;; @0040 istore8 little region0 v3, v11 ;; @0044 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -61,7 +63,7 @@ ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 ;; @0049 v10 = iconst.i64 0 ;; @0049 v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @0049 v12 = uload8.i32 little heap v11 +;; @0049 v12 = uload8.i32 little region0 v11 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 5487aaa59155..d4d80d13e468 100644 --- a/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 ;; @0040 v10 = iconst.i64 0 ;; @0040 v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @0040 istore8 little heap v3, v11 +;; @0040 istore8 little region0 v3, v11 ;; @0047 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -61,7 +63,7 @@ ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 ;; @004c v10 = iconst.i64 0 ;; @004c v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @004c v12 = uload8.i32 little heap v11 +;; @004c v12 = uload8.i32 little region0 v11 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat index 1a7be680f538..4401933f58e0 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -34,7 +35,7 @@ ;; @0040 trapnz v6, heap_oob ;; @0040 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v8 = iadd v7, v4 -;; @0040 store little heap v3, v8 +;; @0040 store little region0 v3, v8 ;; @0043 jump block1 ;; ;; block1: @@ -42,6 +43,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -57,7 +59,7 @@ ;; @0048 trapnz v6, heap_oob ;; @0048 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v8 = iadd v7, v4 -;; @0048 v9 = load.i32 little heap v8 +;; @0048 v9 = load.i32 little region0 v8 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat index 408f19f5c6c2..c84870c5024c 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 4096 ;; @0040 v10 = iadd v8, v9 ; v9 = 4096 -;; @0040 store little heap v3, v10 +;; @0040 store little region0 v3, v10 ;; @0044 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -61,7 +63,7 @@ ;; @0049 v8 = iadd v7, v4 ;; @0049 v9 = iconst.i64 4096 ;; @0049 v10 = iadd v8, v9 ; v9 = 4096 -;; @0049 v11 = load.i32 little heap v10 +;; @0049 v11 = load.i32 little region0 v10 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat index 3324139c5463..3b2558a8939b 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 0xffff_0000 ;; @0040 v10 = iadd v8, v9 ; v9 = 0xffff_0000 -;; @0040 store little heap v3, v10 +;; @0040 store little region0 v3, v10 ;; @0047 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -61,7 +63,7 @@ ;; @004c v8 = iadd v7, v4 ;; @004c v9 = iconst.i64 0xffff_0000 ;; @004c v10 = iadd v8, v9 ; v9 = 0xffff_0000 -;; @004c v11 = load.i32 little heap v10 +;; @004c v11 = load.i32 little region0 v10 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0_offset.wat index 2635c82311cf..d8d22bd56bd5 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -31,7 +32,7 @@ ;; @0040 v4 = uextend.i64 v2 ;; @0040 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v6 = iadd v5, v4 -;; @0040 istore8 little heap v3, v6 +;; @0040 istore8 little region0 v3, v6 ;; @0043 jump block1 ;; ;; block1: @@ -39,6 +40,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -51,7 +53,7 @@ ;; @0048 v4 = uextend.i64 v2 ;; @0048 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v6 = iadd v5, v4 -;; @0048 v7 = uload8.i32 little heap v6 +;; @0048 v7 = uload8.i32 little region0 v6 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat index 69e22a68297e..a343d9e6a2a9 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 4096 ;; @0040 v10 = iadd v8, v9 ; v9 = 4096 -;; @0040 istore8 little heap v3, v10 +;; @0040 istore8 little region0 v3, v10 ;; @0044 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -61,7 +63,7 @@ ;; @0049 v8 = iadd v7, v4 ;; @0049 v9 = iconst.i64 4096 ;; @0049 v10 = iadd v8, v9 ; v9 = 4096 -;; @0049 v11 = uload8.i32 little heap v10 +;; @0049 v11 = uload8.i32 little region0 v10 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat index bda2cd0cc15d..6673a67561f8 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 0xffff_0000 ;; @0040 v10 = iadd v8, v9 ; v9 = 0xffff_0000 -;; @0040 istore8 little heap v3, v10 +;; @0040 istore8 little region0 v3, v10 ;; @0047 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -61,7 +63,7 @@ ;; @004c v8 = iadd v7, v4 ;; @004c v9 = iconst.i64 0xffff_0000 ;; @004c v10 = iadd v8, v9 ; v9 = 0xffff_0000 -;; @004c v11 = uload8.i32 little heap v10 +;; @004c v11 = uload8.i32 little region0 v10 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat index fe507fb8e91e..6b7788ad8fc7 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -35,7 +36,7 @@ ;; @0040 v8 = iadd v7, v4 ;; @0040 v9 = iconst.i64 0 ;; @0040 v10 = select_spectre_guard v6, v9, v8 ; v9 = 0 -;; @0040 store little heap v3, v10 +;; @0040 store little region0 v3, v10 ;; @0043 jump block1 ;; ;; block1: @@ -43,6 +44,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -59,7 +61,7 @@ ;; @0048 v8 = iadd v7, v4 ;; @0048 v9 = iconst.i64 0 ;; @0048 v10 = select_spectre_guard v6, v9, v8 ; v9 = 0 -;; @0048 v11 = load.i32 little heap v10 +;; @0048 v11 = load.i32 little region0 v10 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index d17f02e9b74a..979eff2af46c 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -37,7 +38,7 @@ ;; @0040 v10 = iadd v8, v9 ; v9 = 4096 ;; @0040 v11 = iconst.i64 0 ;; @0040 v12 = select_spectre_guard v6, v11, v10 ; v11 = 0 -;; @0040 store little heap v3, v12 +;; @0040 store little region0 v3, v12 ;; @0044 jump block1 ;; ;; block1: @@ -45,6 +46,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -63,7 +65,7 @@ ;; @0049 v10 = iadd v8, v9 ; v9 = 4096 ;; @0049 v11 = iconst.i64 0 ;; @0049 v12 = select_spectre_guard v6, v11, v10 ; v11 = 0 -;; @0049 v13 = load.i32 little heap v12 +;; @0049 v13 = load.i32 little region0 v12 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat index dbd5f90c4b91..e0e8ece97b98 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -37,7 +38,7 @@ ;; @0040 v10 = iadd v8, v9 ; v9 = 0xffff_0000 ;; @0040 v11 = iconst.i64 0 ;; @0040 v12 = select_spectre_guard v6, v11, v10 ; v11 = 0 -;; @0040 store little heap v3, v12 +;; @0040 store little region0 v3, v12 ;; @0047 jump block1 ;; ;; block1: @@ -45,6 +46,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -63,7 +65,7 @@ ;; @004c v10 = iadd v8, v9 ; v9 = 0xffff_0000 ;; @004c v11 = iconst.i64 0 ;; @004c v12 = select_spectre_guard v6, v11, v10 ; v11 = 0 -;; @004c v13 = load.i32 little heap v12 +;; @004c v13 = load.i32 little region0 v12 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat index 761234df82a8..781d8653050f 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -31,7 +32,7 @@ ;; @0040 v4 = uextend.i64 v2 ;; @0040 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v6 = iadd v5, v4 -;; @0040 istore8 little heap v3, v6 +;; @0040 istore8 little region0 v3, v6 ;; @0043 jump block1 ;; ;; block1: @@ -39,6 +40,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -51,7 +53,7 @@ ;; @0048 v4 = uextend.i64 v2 ;; @0048 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v6 = iadd v5, v4 -;; @0048 v7 = uload8.i32 little heap v6 +;; @0048 v7 = uload8.i32 little region0 v6 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index ad65905a8615..024295d37129 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -37,7 +38,7 @@ ;; @0040 v10 = iadd v8, v9 ; v9 = 4096 ;; @0040 v11 = iconst.i64 0 ;; @0040 v12 = select_spectre_guard v6, v11, v10 ; v11 = 0 -;; @0040 istore8 little heap v3, v12 +;; @0040 istore8 little region0 v3, v12 ;; @0044 jump block1 ;; ;; block1: @@ -45,6 +46,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -63,7 +65,7 @@ ;; @0049 v10 = iadd v8, v9 ; v9 = 4096 ;; @0049 v11 = iconst.i64 0 ;; @0049 v12 = select_spectre_guard v6, v11, v10 ; v11 = 0 -;; @0049 v13 = uload8.i32 little heap v12 +;; @0049 v13 = uload8.i32 little region0 v12 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 9a47ee58a386..39d2b4bca06e 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -37,7 +38,7 @@ ;; @0040 v10 = iadd v8, v9 ; v9 = 0xffff_0000 ;; @0040 v11 = iconst.i64 0 ;; @0040 v12 = select_spectre_guard v6, v11, v10 ; v11 = 0 -;; @0040 istore8 little heap v3, v12 +;; @0040 istore8 little region0 v3, v12 ;; @0047 jump block1 ;; ;; block1: @@ -45,6 +46,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -63,7 +65,7 @@ ;; @004c v10 = iadd v8, v9 ; v9 = 0xffff_0000 ;; @004c v11 = iconst.i64 0 ;; @004c v12 = select_spectre_guard v6, v11, v10 ; v11 = 0 -;; @004c v13 = uload8.i32 little heap v12 +;; @004c v13 = uload8.i32 little region0 v12 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat index d892f495e2d7..d0edfe514fc9 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -31,7 +32,7 @@ ;; @0040 v4 = uextend.i64 v2 ;; @0040 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v6 = iadd v5, v4 -;; @0040 store little heap v3, v6 +;; @0040 store little region0 v3, v6 ;; @0043 jump block1 ;; ;; block1: @@ -39,6 +40,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -51,7 +53,7 @@ ;; @0048 v4 = uextend.i64 v2 ;; @0048 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v6 = iadd v5, v4 -;; @0048 v7 = load.i32 little heap v6 +;; @0048 v7 = load.i32 little region0 v6 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat index d8be7984416c..41d98a6827af 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -33,7 +34,7 @@ ;; @0040 v6 = iadd v5, v4 ;; @0040 v7 = iconst.i64 4096 ;; @0040 v8 = iadd v6, v7 ; v7 = 4096 -;; @0040 store little heap v3, v8 +;; @0040 store little region0 v3, v8 ;; @0044 jump block1 ;; ;; block1: @@ -41,6 +42,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +57,7 @@ ;; @0049 v6 = iadd v5, v4 ;; @0049 v7 = iconst.i64 4096 ;; @0049 v8 = iadd v6, v7 ; v7 = 4096 -;; @0049 v9 = load.i32 little heap v8 +;; @0049 v9 = load.i32 little region0 v8 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat index c4a02249ba35..17f1fe506749 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -33,7 +34,7 @@ ;; @0040 v6 = iadd v5, v4 ;; @0040 v7 = iconst.i64 0xffff_0000 ;; @0040 v8 = iadd v6, v7 ; v7 = 0xffff_0000 -;; @0040 store little heap v3, v8 +;; @0040 store little region0 v3, v8 ;; @0047 jump block1 ;; ;; block1: @@ -41,6 +42,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +57,7 @@ ;; @004c v6 = iadd v5, v4 ;; @004c v7 = iconst.i64 0xffff_0000 ;; @004c v8 = iadd v6, v7 ; v7 = 0xffff_0000 -;; @004c v9 = load.i32 little heap v8 +;; @004c v9 = load.i32 little region0 v8 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat index 34fc6379495a..e254152e3ff9 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -31,7 +32,7 @@ ;; @0040 v4 = uextend.i64 v2 ;; @0040 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v6 = iadd v5, v4 -;; @0040 istore8 little heap v3, v6 +;; @0040 istore8 little region0 v3, v6 ;; @0043 jump block1 ;; ;; block1: @@ -39,6 +40,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -51,7 +53,7 @@ ;; @0048 v4 = uextend.i64 v2 ;; @0048 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v6 = iadd v5, v4 -;; @0048 v7 = uload8.i32 little heap v6 +;; @0048 v7 = uload8.i32 little region0 v6 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat index 02f52b5b5cfc..5d5c62ee8568 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -33,7 +34,7 @@ ;; @0040 v6 = iadd v5, v4 ;; @0040 v7 = iconst.i64 4096 ;; @0040 v8 = iadd v6, v7 ; v7 = 4096 -;; @0040 istore8 little heap v3, v8 +;; @0040 istore8 little region0 v3, v8 ;; @0044 jump block1 ;; ;; block1: @@ -41,6 +42,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +57,7 @@ ;; @0049 v6 = iadd v5, v4 ;; @0049 v7 = iconst.i64 4096 ;; @0049 v8 = iadd v6, v7 ; v7 = 4096 -;; @0049 v9 = uload8.i32 little heap v8 +;; @0049 v9 = uload8.i32 little region0 v8 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat index 5e723c5ea2dc..e787d8c3aca9 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -33,7 +34,7 @@ ;; @0040 v6 = iadd v5, v4 ;; @0040 v7 = iconst.i64 0xffff_0000 ;; @0040 v8 = iadd v6, v7 ; v7 = 0xffff_0000 -;; @0040 istore8 little heap v3, v8 +;; @0040 istore8 little region0 v3, v8 ;; @0047 jump block1 ;; ;; block1: @@ -41,6 +42,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +57,7 @@ ;; @004c v6 = iadd v5, v4 ;; @004c v7 = iconst.i64 0xffff_0000 ;; @004c v8 = iadd v6, v7 ; v7 = 0xffff_0000 -;; @004c v9 = uload8.i32 little heap v8 +;; @004c v9 = uload8.i32 little region0 v8 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat index af0143701b00..fc3bf9dd67d9 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -31,7 +32,7 @@ ;; @0040 v4 = uextend.i64 v2 ;; @0040 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v6 = iadd v5, v4 -;; @0040 store little heap v3, v6 +;; @0040 store little region0 v3, v6 ;; @0043 jump block1 ;; ;; block1: @@ -39,6 +40,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -51,7 +53,7 @@ ;; @0048 v4 = uextend.i64 v2 ;; @0048 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v6 = iadd v5, v4 -;; @0048 v7 = load.i32 little heap v6 +;; @0048 v7 = load.i32 little region0 v6 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat index cd5d9df4cd5c..192f6826cda2 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -33,7 +34,7 @@ ;; @0040 v6 = iadd v5, v4 ;; @0040 v7 = iconst.i64 4096 ;; @0040 v8 = iadd v6, v7 ; v7 = 4096 -;; @0040 store little heap v3, v8 +;; @0040 store little region0 v3, v8 ;; @0044 jump block1 ;; ;; block1: @@ -41,6 +42,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +57,7 @@ ;; @0049 v6 = iadd v5, v4 ;; @0049 v7 = iconst.i64 4096 ;; @0049 v8 = iadd v6, v7 ; v7 = 4096 -;; @0049 v9 = load.i32 little heap v8 +;; @0049 v9 = load.i32 little region0 v8 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat index 1af87da238de..e2cf736159ad 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -33,7 +34,7 @@ ;; @0040 v6 = iadd v5, v4 ;; @0040 v7 = iconst.i64 0xffff_0000 ;; @0040 v8 = iadd v6, v7 ; v7 = 0xffff_0000 -;; @0040 store little heap v3, v8 +;; @0040 store little region0 v3, v8 ;; @0047 jump block1 ;; ;; block1: @@ -41,6 +42,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +57,7 @@ ;; @004c v6 = iadd v5, v4 ;; @004c v7 = iconst.i64 0xffff_0000 ;; @004c v8 = iadd v6, v7 ; v7 = 0xffff_0000 -;; @004c v9 = load.i32 little heap v8 +;; @004c v9 = load.i32 little region0 v8 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat index be7bd3c3d354..05d324651562 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -31,7 +32,7 @@ ;; @0040 v4 = uextend.i64 v2 ;; @0040 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v6 = iadd v5, v4 -;; @0040 istore8 little heap v3, v6 +;; @0040 istore8 little region0 v3, v6 ;; @0043 jump block1 ;; ;; block1: @@ -39,6 +40,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -51,7 +53,7 @@ ;; @0048 v4 = uextend.i64 v2 ;; @0048 v5 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v6 = iadd v5, v4 -;; @0048 v7 = uload8.i32 little heap v6 +;; @0048 v7 = uload8.i32 little region0 v6 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat index d9a8a51998c0..9444e336c2b7 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -33,7 +34,7 @@ ;; @0040 v6 = iadd v5, v4 ;; @0040 v7 = iconst.i64 4096 ;; @0040 v8 = iadd v6, v7 ; v7 = 4096 -;; @0040 istore8 little heap v3, v8 +;; @0040 istore8 little region0 v3, v8 ;; @0044 jump block1 ;; ;; block1: @@ -41,6 +42,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +57,7 @@ ;; @0049 v6 = iadd v5, v4 ;; @0049 v7 = iconst.i64 4096 ;; @0049 v8 = iadd v6, v7 ; v7 = 4096 -;; @0049 v9 = uload8.i32 little heap v8 +;; @0049 v9 = uload8.i32 little region0 v8 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 788524f91a79..3bb67714a332 100644 --- a/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -33,7 +34,7 @@ ;; @0040 v6 = iadd v5, v4 ;; @0040 v7 = iconst.i64 0xffff_0000 ;; @0040 v8 = iadd v6, v7 ; v7 = 0xffff_0000 -;; @0040 istore8 little heap v3, v8 +;; @0040 istore8 little region0 v3, v8 ;; @0047 jump block1 ;; ;; block1: @@ -41,6 +42,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +57,7 @@ ;; @004c v6 = iadd v5, v4 ;; @004c v7 = iconst.i64 0xffff_0000 ;; @004c v8 = iadd v6, v7 ; v7 = 0xffff_0000 -;; @004c v9 = uload8.i32 little heap v8 +;; @004c v9 = uload8.i32 little region0 v8 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat index 460fef89e887..d38abac23b3d 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -33,7 +34,7 @@ ;; @0040 trapnz v5, heap_oob ;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 -;; @0040 store little heap v3, v7 +;; @0040 store little region0 v3, v7 ;; @0043 jump block1 ;; ;; block1: @@ -41,6 +42,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +57,7 @@ ;; @0048 trapnz v5, heap_oob ;; @0048 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v7 = iadd v6, v2 -;; @0048 v8 = load.i32 little heap v7 +;; @0048 v8 = load.i32 little region0 v7 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat index 39cb1a77ef6b..c1511f5c1f6c 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -35,7 +36,7 @@ ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 4096 ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 -;; @0040 store little heap v3, v9 +;; @0040 store little region0 v3, v9 ;; @0044 jump block1 ;; ;; block1: @@ -43,6 +44,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -59,7 +61,7 @@ ;; @0049 v7 = iadd v6, v2 ;; @0049 v8 = iconst.i64 4096 ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 -;; @0049 v10 = load.i32 little heap v9 +;; @0049 v10 = load.i32 little region0 v9 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat index 10a55e3303a8..707d3d433db8 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -35,7 +36,7 @@ ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0xffff_0000 ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 -;; @0040 store little heap v3, v9 +;; @0040 store little region0 v3, v9 ;; @0047 jump block1 ;; ;; block1: @@ -43,6 +44,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -59,7 +61,7 @@ ;; @004c v7 = iadd v6, v2 ;; @004c v8 = iconst.i64 0xffff_0000 ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 -;; @004c v10 = load.i32 little heap v9 +;; @004c v10 = load.i32 little region0 v9 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0_offset.wat index 368a60bb5337..7bccf0bb6c12 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -33,7 +34,7 @@ ;; @0040 trapnz v5, heap_oob ;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 -;; @0040 istore8 little heap v3, v7 +;; @0040 istore8 little region0 v3, v7 ;; @0043 jump block1 ;; ;; block1: @@ -41,6 +42,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +57,7 @@ ;; @0048 trapnz v5, heap_oob ;; @0048 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v7 = iadd v6, v2 -;; @0048 v8 = uload8.i32 little heap v7 +;; @0048 v8 = uload8.i32 little region0 v7 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat index f94e1f1f2c3a..22aa62e62bc9 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -35,7 +36,7 @@ ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 4096 ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 -;; @0040 istore8 little heap v3, v9 +;; @0040 istore8 little region0 v3, v9 ;; @0044 jump block1 ;; ;; block1: @@ -43,6 +44,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -59,7 +61,7 @@ ;; @0049 v7 = iadd v6, v2 ;; @0049 v8 = iconst.i64 4096 ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 -;; @0049 v10 = uload8.i32 little heap v9 +;; @0049 v10 = uload8.i32 little region0 v9 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat index 67f3c93d9f27..a2d400d70bdb 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -35,7 +36,7 @@ ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0xffff_0000 ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 -;; @0040 istore8 little heap v3, v9 +;; @0040 istore8 little region0 v3, v9 ;; @0047 jump block1 ;; ;; block1: @@ -43,6 +44,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -59,7 +61,7 @@ ;; @004c v7 = iadd v6, v2 ;; @004c v8 = iconst.i64 0xffff_0000 ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 -;; @004c v10 = uload8.i32 little heap v9 +;; @004c v10 = uload8.i32 little region0 v9 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat index d2d0f0cf17a3..90f318eae7a4 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -34,7 +35,7 @@ ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0 ;; @0040 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 -;; @0040 store little heap v3, v9 +;; @0040 store little region0 v3, v9 ;; @0043 jump block1 ;; ;; block1: @@ -42,6 +43,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -57,7 +59,7 @@ ;; @0048 v7 = iadd v6, v2 ;; @0048 v8 = iconst.i64 0 ;; @0048 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 -;; @0048 v10 = load.i32 little heap v9 +;; @0048 v10 = load.i32 little region0 v9 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index 04da373d5f53..83abbec1851b 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 ;; @0040 v10 = iconst.i64 0 ;; @0040 v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @0040 store little heap v3, v11 +;; @0040 store little region0 v3, v11 ;; @0044 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -61,7 +63,7 @@ ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 ;; @0049 v10 = iconst.i64 0 ;; @0049 v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @0049 v12 = load.i32 little heap v11 +;; @0049 v12 = load.i32 little region0 v11 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat index 813ae6e37ece..d20095c51f2d 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 ;; @0040 v10 = iconst.i64 0 ;; @0040 v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @0040 store little heap v3, v11 +;; @0040 store little region0 v3, v11 ;; @0047 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -61,7 +63,7 @@ ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 ;; @004c v10 = iconst.i64 0 ;; @004c v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @004c v12 = load.i32 little heap v11 +;; @004c v12 = load.i32 little region0 v11 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat index 6ad2b7fae68c..af487befff60 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -34,7 +35,7 @@ ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0 ;; @0040 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 -;; @0040 istore8 little heap v3, v9 +;; @0040 istore8 little region0 v3, v9 ;; @0043 jump block1 ;; ;; block1: @@ -42,6 +43,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -57,7 +59,7 @@ ;; @0048 v7 = iadd v6, v2 ;; @0048 v8 = iconst.i64 0 ;; @0048 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 -;; @0048 v10 = uload8.i32 little heap v9 +;; @0048 v10 = uload8.i32 little region0 v9 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index 7c6595979680..6874ffaceb6b 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 ;; @0040 v10 = iconst.i64 0 ;; @0040 v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @0040 istore8 little heap v3, v11 +;; @0040 istore8 little region0 v3, v11 ;; @0044 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -61,7 +63,7 @@ ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 ;; @0049 v10 = iconst.i64 0 ;; @0049 v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @0049 v12 = uload8.i32 little heap v11 +;; @0049 v12 = uload8.i32 little region0 v11 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 3a81bda9621f..f9b5c5e74b1e 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 ;; @0040 v10 = iconst.i64 0 ;; @0040 v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @0040 istore8 little heap v3, v11 +;; @0040 istore8 little region0 v3, v11 ;; @0047 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -61,7 +63,7 @@ ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 ;; @004c v10 = iconst.i64 0 ;; @004c v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @004c v12 = uload8.i32 little heap v11 +;; @004c v12 = uload8.i32 little region0 v11 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat index e195e8a26103..841dea906f67 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -33,7 +34,7 @@ ;; @0040 trapnz v5, heap_oob ;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 -;; @0040 store little heap v3, v7 +;; @0040 store little region0 v3, v7 ;; @0043 jump block1 ;; ;; block1: @@ -41,6 +42,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +57,7 @@ ;; @0048 trapnz v5, heap_oob ;; @0048 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v7 = iadd v6, v2 -;; @0048 v8 = load.i32 little heap v7 +;; @0048 v8 = load.i32 little region0 v7 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat index b506eebdff61..a78a89afeeda 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -35,7 +36,7 @@ ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 4096 ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 -;; @0040 store little heap v3, v9 +;; @0040 store little region0 v3, v9 ;; @0044 jump block1 ;; ;; block1: @@ -43,6 +44,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -59,7 +61,7 @@ ;; @0049 v7 = iadd v6, v2 ;; @0049 v8 = iconst.i64 4096 ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 -;; @0049 v10 = load.i32 little heap v9 +;; @0049 v10 = load.i32 little region0 v9 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat index 7354c34240a5..5ea708157a45 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -35,7 +36,7 @@ ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0xffff_0000 ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 -;; @0040 store little heap v3, v9 +;; @0040 store little region0 v3, v9 ;; @0047 jump block1 ;; ;; block1: @@ -43,6 +44,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -59,7 +61,7 @@ ;; @004c v7 = iadd v6, v2 ;; @004c v8 = iconst.i64 0xffff_0000 ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 -;; @004c v10 = load.i32 little heap v9 +;; @004c v10 = load.i32 little region0 v9 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat index 217467d3f726..d7bed8dcb8d6 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -33,7 +34,7 @@ ;; @0040 trapnz v5, heap_oob ;; @0040 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v7 = iadd v6, v2 -;; @0040 istore8 little heap v3, v7 +;; @0040 istore8 little region0 v3, v7 ;; @0043 jump block1 ;; ;; block1: @@ -41,6 +42,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -55,7 +57,7 @@ ;; @0048 trapnz v5, heap_oob ;; @0048 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0048 v7 = iadd v6, v2 -;; @0048 v8 = uload8.i32 little heap v7 +;; @0048 v8 = uload8.i32 little region0 v7 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat index 0cd432d10090..df94d2def9d6 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -35,7 +36,7 @@ ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 4096 ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 -;; @0040 istore8 little heap v3, v9 +;; @0040 istore8 little region0 v3, v9 ;; @0044 jump block1 ;; ;; block1: @@ -43,6 +44,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -59,7 +61,7 @@ ;; @0049 v7 = iadd v6, v2 ;; @0049 v8 = iconst.i64 4096 ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 -;; @0049 v10 = uload8.i32 little heap v9 +;; @0049 v10 = uload8.i32 little region0 v9 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat index fe094e9f920f..2f5f63fb5c3f 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -35,7 +36,7 @@ ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0xffff_0000 ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 -;; @0040 istore8 little heap v3, v9 +;; @0040 istore8 little region0 v3, v9 ;; @0047 jump block1 ;; ;; block1: @@ -43,6 +44,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -59,7 +61,7 @@ ;; @004c v7 = iadd v6, v2 ;; @004c v8 = iconst.i64 0xffff_0000 ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 -;; @004c v10 = uload8.i32 little heap v9 +;; @004c v10 = uload8.i32 little region0 v9 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat index 7c3c116c2370..122edc1e4c70 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -34,7 +35,7 @@ ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0 ;; @0040 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 -;; @0040 store little heap v3, v9 +;; @0040 store little region0 v3, v9 ;; @0043 jump block1 ;; ;; block1: @@ -42,6 +43,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -57,7 +59,7 @@ ;; @0048 v7 = iadd v6, v2 ;; @0048 v8 = iconst.i64 0 ;; @0048 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 -;; @0048 v10 = load.i32 little heap v9 +;; @0048 v10 = load.i32 little region0 v9 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat index 486a2b9bf8c7..cfcaa385cd8e 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 ;; @0040 v10 = iconst.i64 0 ;; @0040 v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @0040 store little heap v3, v11 +;; @0040 store little region0 v3, v11 ;; @0044 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -61,7 +63,7 @@ ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 ;; @0049 v10 = iconst.i64 0 ;; @0049 v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @0049 v12 = load.i32 little heap v11 +;; @0049 v12 = load.i32 little region0 v11 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat index 39e73fbc4822..96687d778b29 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 ;; @0040 v10 = iconst.i64 0 ;; @0040 v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @0040 store little heap v3, v11 +;; @0040 store little region0 v3, v11 ;; @0047 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -61,7 +63,7 @@ ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 ;; @004c v10 = iconst.i64 0 ;; @004c v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @004c v12 = load.i32 little heap v11 +;; @004c v12 = load.i32 little region0 v11 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat index 3b45a00ed9cb..7b597f963ef7 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -34,7 +35,7 @@ ;; @0040 v7 = iadd v6, v2 ;; @0040 v8 = iconst.i64 0 ;; @0040 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 -;; @0040 istore8 little heap v3, v9 +;; @0040 istore8 little region0 v3, v9 ;; @0043 jump block1 ;; ;; block1: @@ -42,6 +43,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -57,7 +59,7 @@ ;; @0048 v7 = iadd v6, v2 ;; @0048 v8 = iconst.i64 0 ;; @0048 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 -;; @0048 v10 = uload8.i32 little heap v9 +;; @0048 v10 = uload8.i32 little region0 v9 ;; @004b jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat index ce5ffc31a845..b940c2fbba2e 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0x1000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0040 v9 = iadd v7, v8 ; v8 = 4096 ;; @0040 v10 = iconst.i64 0 ;; @0040 v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @0040 istore8 little heap v3, v11 +;; @0040 istore8 little region0 v3, v11 ;; @0044 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -61,7 +63,7 @@ ;; @0049 v9 = iadd v7, v8 ; v8 = 4096 ;; @0049 v10 = iconst.i64 0 ;; @0049 v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @0049 v12 = uload8.i32 little heap v11 +;; @0049 v12 = uload8.i32 little region0 v11 ;; @004d jump block1 ;; ;; block1: diff --git a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat index d8431f063d98..a8a3cc9f31d6 100644 --- a/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/tests/disas/load-store/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -19,6 +19,7 @@ i32.load8_u offset=0xffff0000)) ;; function u0:0(i64 vmctx, i64, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0040 v9 = iadd v7, v8 ; v8 = 0xffff_0000 ;; @0040 v10 = iconst.i64 0 ;; @0040 v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @0040 istore8 little heap v3, v11 +;; @0040 istore8 little region0 v3, v11 ;; @0047 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -61,7 +63,7 @@ ;; @004c v9 = iadd v7, v8 ; v8 = 0xffff_0000 ;; @004c v10 = iconst.i64 0 ;; @004c v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @004c v12 = uload8.i32 little heap v11 +;; @004c v12 = uload8.i32 little region0 v11 ;; @0053 jump block1 ;; ;; block1: diff --git a/tests/disas/memory-min-max-same.wat b/tests/disas/memory-min-max-same.wat index 0113089f4e8d..2af209093d99 100644 --- a/tests/disas/memory-min-max-same.wat +++ b/tests/disas/memory-min-max-same.wat @@ -34,6 +34,7 @@ ) ) ;; function u0:0(i64 vmctx, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -63,7 +64,7 @@ ;; @0039 v16 = iadd.i64 v15, v12 ;; v25 = iconst.i64 0 ;; v26 = select_spectre_guard v24, v25, v16 ; v25 = 0 -;; @0039 store little heap v22, v26 ; v22 = 0 +;; @0039 store little region0 v22, v26 ; v22 = 0 ;; v27 = iconst.i32 1 ;; v28 = iadd v9, v27 ; v27 = 1 ;; @0043 jump block2(v28) diff --git a/tests/disas/memory.wat b/tests/disas/memory.wat index 419adb5a42cb..e5619ee95a02 100644 --- a/tests/disas/memory.wat +++ b/tests/disas/memory.wat @@ -13,6 +13,7 @@ ) ;; function u0:0(i64 vmctx, i64) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -28,12 +29,12 @@ ;; @0025 v5 = uextend.i64 v3 ; v3 = 0 ;; @0025 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0025 v7 = iadd v6, v5 -;; @0025 store little heap v4, v7 ; v4 = 0 +;; @0025 store little region0 v4, v7 ; v4 = 0 ;; @0028 v8 = iconst.i32 0 ;; @002a v9 = uextend.i64 v8 ; v8 = 0 ;; @002a v10 = load.i64 notrap aligned readonly can_move v0+56 ;; @002a v11 = iadd v10, v9 -;; @002a v12 = load.i32 little heap v11 +;; @002a v12 = load.i32 little region0 v11 ;; @002d brif v12, block2, block4 ;; ;; block2: @@ -42,7 +43,7 @@ ;; @0033 v15 = uextend.i64 v13 ; v13 = 0 ;; @0033 v16 = load.i64 notrap aligned readonly can_move v0+56 ;; @0033 v17 = iadd v16, v15 -;; @0033 store little heap v14, v17 ; v14 = 10 +;; @0033 store little region0 v14, v17 ; v14 = 10 ;; @0036 jump block3 ;; ;; block4: @@ -51,7 +52,7 @@ ;; @003b v20 = uextend.i64 v18 ; v18 = 0 ;; @003b v21 = load.i64 notrap aligned readonly can_move v0+56 ;; @003b v22 = iadd v21, v20 -;; @003b store little heap v19, v22 ; v19 = 11 +;; @003b store little region0 v19, v22 ; v19 = 11 ;; @003e jump block3 ;; ;; block3: diff --git a/tests/disas/non-fixed-size-memory.wat b/tests/disas/non-fixed-size-memory.wat index 3c15e1b2e5c3..3cd6c73a1fe6 100644 --- a/tests/disas/non-fixed-size-memory.wat +++ b/tests/disas/non-fixed-size-memory.wat @@ -21,6 +21,7 @@ i32.load8_u offset=0)) ;; function u0:0(i64 vmctx, i64, i32, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -36,7 +37,7 @@ ;; @0041 trapnz v6, heap_oob ;; @0041 v7 = load.i64 notrap aligned can_move v0+56 ;; @0041 v8 = iadd v7, v4 -;; @0041 istore8 little heap v3, v8 +;; @0041 istore8 little region0 v3, v8 ;; @0044 jump block1 ;; ;; block1: @@ -44,6 +45,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -59,7 +61,7 @@ ;; @0049 trapnz v6, heap_oob ;; @0049 v7 = load.i64 notrap aligned can_move v0+56 ;; @0049 v8 = iadd v7, v4 -;; @0049 v9 = uload8.i32 little heap v8 +;; @0049 v9 = uload8.i32 little region0 v8 ;; @004c jump block1 ;; ;; block1: diff --git a/tests/disas/pr2303.wat b/tests/disas/pr2303.wat index cdb69eca6565..c06f4095aa6c 100644 --- a/tests/disas/pr2303.wat +++ b/tests/disas/pr2303.wat @@ -17,6 +17,7 @@ ) ;; function u0:0(i64 vmctx, i64, i32) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -31,12 +32,12 @@ ;; @003a v5 = uextend.i64 v4 ; v4 = 0 ;; @003a v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @003a v7 = iadd v6, v5 -;; @003a v8 = load.i8x16 little heap v7 +;; @003a v8 = load.i8x16 little region0 v7 ;; @003e v9 = iconst.i32 16 ;; @0040 v10 = uextend.i64 v9 ; v9 = 16 ;; @0040 v11 = load.i64 notrap aligned readonly can_move v0+56 ;; @0040 v12 = iadd v11, v10 -;; @0040 v13 = load.i8x16 little heap v12 +;; @0040 v13 = load.i8x16 little region0 v12 ;; @0046 brif v2, block2, block4 ;; ;; block2: @@ -47,7 +48,7 @@ ;; @004d v20 = uextend.i64 v19 ; v19 = 32 ;; @004d v21 = load.i64 notrap aligned readonly can_move v0+56 ;; @004d v22 = iadd v21, v20 -;; @004d v23 = load.i8x16 little heap v22 +;; @004d v23 = load.i8x16 little region0 v22 ;; @0051 v26 = bitcast.i8x16 little v18 ;; @0051 jump block3(v26, v23) ;; @@ -59,7 +60,7 @@ ;; @0057 v31 = uextend.i64 v30 ; v30 = 0 ;; @0057 v32 = load.i64 notrap aligned readonly can_move v0+56 ;; @0057 v33 = iadd v32, v31 -;; @0057 v34 = load.i8x16 little heap v33 +;; @0057 v34 = load.i8x16 little region0 v33 ;; @005b v35 = bitcast.i8x16 little v29 ;; @005b jump block3(v35, v34) ;; @@ -70,7 +71,7 @@ ;; @005f v39 = uextend.i64 v3 ; v3 = 48 ;; @005f v40 = load.i64 notrap aligned readonly can_move v0+56 ;; @005f v41 = iadd v40, v39 -;; @005f store little heap v38, v41 +;; @005f store little region0 v38, v41 ;; @0063 jump block1 ;; ;; block1: diff --git a/tests/disas/readonly-funcrefs.wat b/tests/disas/readonly-funcrefs.wat index a2895d7b6a15..86bf6c2d61bb 100644 --- a/tests/disas/readonly-funcrefs.wat +++ b/tests/disas/readonly-funcrefs.wat @@ -32,6 +32,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -52,7 +53,7 @@ ;; @0031 v7 = ishl v5, v26 ; v26 = 3 ;; @0031 v8 = iadd v6, v7 ;; @0031 v10 = select_spectre_guard v4, v9, v8 ; v9 = 0 -;; @0031 v11 = load.i64 user6 aligned table v10 +;; @0031 v11 = load.i64 user6 aligned region0 v10 ;; v25 = iconst.i64 -2 ;; @0031 v12 = band v11, v25 ; v25 = -2 ;; @0031 brif v11, block3(v12), block2 diff --git a/tests/disas/readonly-heap-base-pointer1.wat b/tests/disas/readonly-heap-base-pointer1.wat index d6f608c00058..6063cce3dccd 100644 --- a/tests/disas/readonly-heap-base-pointer1.wat +++ b/tests/disas/readonly-heap-base-pointer1.wat @@ -8,6 +8,7 @@ (i32.load (local.get 0))) ) ;; function u0:0(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -24,7 +25,7 @@ ;; @0020 v7 = load.i64 notrap aligned readonly can_move v0+56 ;; @0020 v8 = iadd v7, v4 ;; @0020 v10 = select_spectre_guard v6, v9, v8 ; v9 = 0 -;; @0020 v11 = load.i32 little heap v10 +;; @0020 v11 = load.i32 little region0 v10 ;; @0023 jump block1 ;; ;; block1: diff --git a/tests/disas/readonly-heap-base-pointer2.wat b/tests/disas/readonly-heap-base-pointer2.wat index 5ea52e8e66f1..b1caa64c20fa 100644 --- a/tests/disas/readonly-heap-base-pointer2.wat +++ b/tests/disas/readonly-heap-base-pointer2.wat @@ -8,6 +8,7 @@ (i32.load (local.get 0))) ) ;; function u0:0(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -26,7 +27,7 @@ ;; @0022 v7 = load.i64 notrap aligned readonly can_move v12 ;; @0022 v8 = iadd v7, v4 ;; @0022 v10 = select_spectre_guard v6, v9, v8 ; v9 = 0 -;; @0022 v11 = load.i32 little heap v10 +;; @0022 v11 = load.i32 little region0 v10 ;; @0025 jump block1 ;; ;; block1: diff --git a/tests/disas/readonly-heap-base-pointer3.wat b/tests/disas/readonly-heap-base-pointer3.wat index 9cd51525f07d..dd84c0ec6b33 100644 --- a/tests/disas/readonly-heap-base-pointer3.wat +++ b/tests/disas/readonly-heap-base-pointer3.wat @@ -8,6 +8,7 @@ (i32.load (local.get 0))) ) ;; function u0:0(i64 vmctx, i64, i64) -> i32 tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -23,7 +24,7 @@ ;; @0020 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0020 v7 = iadd v6, v2 ;; @0020 v9 = select_spectre_guard v5, v8, v7 ; v8 = 0 -;; @0020 v10 = load.i32 little heap v9 +;; @0020 v10 = load.i32 little region0 v9 ;; @0023 jump block1 ;; ;; block1: diff --git a/tests/disas/ref-func-0.wat b/tests/disas/ref-func-0.wat index 7266ba4e72d3..c3da494af3cb 100644 --- a/tests/disas/ref-func-0.wat +++ b/tests/disas/ref-func-0.wat @@ -14,6 +14,7 @@ (global (export "funcref-local") funcref (ref.func $local))) ;; function u0:0(i64 vmctx, i64) -> i32, i32, i64, i64 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -27,8 +28,8 @@ ;; v16 = iconst.i64 96 ;; @0091 v10 = iadd v0, v16 ; v16 = 96 ;; @0091 v11 = load.i32 notrap aligned v10 -;; @0093 v13 = load.i64 notrap aligned table v0+112 -;; @0095 v15 = load.i64 notrap aligned table v0+128 +;; @0093 v13 = load.i64 notrap aligned region0 v0+112 +;; @0095 v15 = load.i64 notrap aligned region0 v0+128 ;; @0097 jump block1 ;; ;; block1: diff --git a/tests/disas/riscv64-component-builtins.wat b/tests/disas/riscv64-component-builtins.wat index 90429babf30b..9975e8a268d0 100644 --- a/tests/disas/riscv64-component-builtins.wat +++ b/tests/disas/riscv64-component-builtins.wat @@ -11,12 +11,13 @@ ) ;; function u0:0(i64 vmctx, i64, i32) tail { +;; region0 = 2 "vmctx" ;; sig0 = (i64 sext, i32 sext, i32 sext, i32 sext) -> i64 sext system_v ;; sig1 = (i64 sext vmctx) system_v ;; ;; block0(v0: i64, v1: i64, v2: i32): ;; v4 = get_frame_pointer.i64 -;; v3 = load.i64 notrap aligned readonly can_move vmctx v1+8 +;; v3 = load.i64 notrap aligned readonly can_move region0 v1+8 ;; store notrap aligned v4, v3+48 ;; v5 = get_return_address.i64 ;; store notrap aligned v5, v3+56 diff --git a/tests/disas/simd-store.wat b/tests/disas/simd-store.wat index 2ffbc46fbf29..4ab87cfe2b05 100644 --- a/tests/disas/simd-store.wat +++ b/tests/disas/simd-store.wat @@ -85,6 +85,7 @@ ) ;; function u0:0(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -99,7 +100,7 @@ ;; @0047 v5 = uextend.i64 v3 ; v3 = 0 ;; @0047 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0047 v7 = iadd v6, v5 -;; @0047 store little heap v4, v7 +;; @0047 store little region0 v4, v7 ;; @004b jump block1 ;; ;; block1: @@ -107,6 +108,7 @@ ;; } ;; ;; function u0:10(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -123,7 +125,7 @@ ;; @00df v7 = uextend.i64 v3 ; v3 = 0 ;; @00df v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @00df v9 = iadd v8, v7 -;; @00df store little heap v6, v9 +;; @00df store little region0 v6, v9 ;; @00e3 jump block1 ;; ;; block1: @@ -131,6 +133,7 @@ ;; } ;; ;; function u0:11(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -147,7 +150,7 @@ ;; @00ef v7 = uextend.i64 v3 ; v3 = 0 ;; @00ef v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @00ef v9 = iadd v8, v7 -;; @00ef store little heap v6, v9 +;; @00ef store little region0 v6, v9 ;; @00f3 jump block1 ;; ;; block1: @@ -155,6 +158,7 @@ ;; } ;; ;; function u0:12(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -169,7 +173,7 @@ ;; @00fe v5 = uextend.i64 v3 ; v3 = 0 ;; @00fe v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @00fe v7 = iadd v6, v5 -;; @00fe store little heap v4, v7 +;; @00fe store little region0 v4, v7 ;; @0102 jump block1 ;; ;; block1: @@ -177,6 +181,7 @@ ;; } ;; ;; function u0:13(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -193,7 +198,7 @@ ;; @010d v7 = uextend.i64 v3 ; v3 = 0 ;; @010d v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @010d v9 = iadd v8, v7 -;; @010d store little heap v6, v9 +;; @010d store little region0 v6, v9 ;; @0111 jump block1 ;; ;; block1: @@ -201,6 +206,7 @@ ;; } ;; ;; function u0:14(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -217,7 +223,7 @@ ;; @011c v7 = uextend.i64 v3 ; v3 = 0 ;; @011c v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @011c v9 = iadd v8, v7 -;; @011c store little heap v6, v9 +;; @011c store little region0 v6, v9 ;; @0120 jump block1 ;; ;; block1: @@ -225,6 +231,7 @@ ;; } ;; ;; function u0:15(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -239,7 +246,7 @@ ;; @012b v5 = uextend.i64 v3 ; v3 = 0 ;; @012b v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @012b v7 = iadd v6, v5 -;; @012b store little heap v4, v7 +;; @012b store little region0 v4, v7 ;; @012f jump block1 ;; ;; block1: @@ -247,6 +254,7 @@ ;; } ;; ;; function u0:16(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -263,7 +271,7 @@ ;; @013a v7 = uextend.i64 v3 ; v3 = 0 ;; @013a v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @013a v9 = iadd v8, v7 -;; @013a store little heap v6, v9 +;; @013a store little region0 v6, v9 ;; @013e jump block1 ;; ;; block1: @@ -271,6 +279,7 @@ ;; } ;; ;; function u0:17(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -287,7 +296,7 @@ ;; @0149 v7 = uextend.i64 v3 ; v3 = 0 ;; @0149 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @0149 v9 = iadd v8, v7 -;; @0149 store little heap v6, v9 +;; @0149 store little region0 v6, v9 ;; @014d jump block1 ;; ;; block1: @@ -295,6 +304,7 @@ ;; } ;; ;; function u0:18(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -311,7 +321,7 @@ ;; @0159 v7 = uextend.i64 v3 ; v3 = 0 ;; @0159 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @0159 v9 = iadd v8, v7 -;; @0159 store little heap v6, v9 +;; @0159 store little region0 v6, v9 ;; @015d jump block1 ;; ;; block1: @@ -319,6 +329,7 @@ ;; } ;; ;; function u0:19(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -333,7 +344,7 @@ ;; @0168 v5 = uextend.i64 v3 ; v3 = 0 ;; @0168 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0168 v7 = iadd v6, v5 -;; @0168 store little heap v4, v7 +;; @0168 store little region0 v4, v7 ;; @016c jump block1 ;; ;; block1: @@ -341,6 +352,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -357,7 +369,7 @@ ;; @0056 v7 = uextend.i64 v3 ; v3 = 0 ;; @0056 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @0056 v9 = iadd v8, v7 -;; @0056 store little heap v6, v9 +;; @0056 store little region0 v6, v9 ;; @005a jump block1 ;; ;; block1: @@ -365,6 +377,7 @@ ;; } ;; ;; function u0:20(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -381,7 +394,7 @@ ;; @0177 v7 = uextend.i64 v3 ; v3 = 0 ;; @0177 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @0177 v9 = iadd v8, v7 -;; @0177 store little heap v6, v9 +;; @0177 store little region0 v6, v9 ;; @017b jump block1 ;; ;; block1: @@ -389,6 +402,7 @@ ;; } ;; ;; function u0:21(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -405,7 +419,7 @@ ;; @0186 v7 = uextend.i64 v3 ; v3 = 0 ;; @0186 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @0186 v9 = iadd v8, v7 -;; @0186 store little heap v6, v9 +;; @0186 store little region0 v6, v9 ;; @018a jump block1 ;; ;; block1: @@ -413,6 +427,7 @@ ;; } ;; ;; function u0:22(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -429,7 +444,7 @@ ;; @0195 v7 = uextend.i64 v3 ; v3 = 0 ;; @0195 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @0195 v9 = iadd v8, v7 -;; @0195 store little heap v6, v9 +;; @0195 store little region0 v6, v9 ;; @0199 jump block1 ;; ;; block1: @@ -437,6 +452,7 @@ ;; } ;; ;; function u0:23(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -453,7 +469,7 @@ ;; @01a4 v7 = uextend.i64 v3 ; v3 = 0 ;; @01a4 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @01a4 v9 = iadd v8, v7 -;; @01a4 store little heap v6, v9 +;; @01a4 store little region0 v6, v9 ;; @01a8 jump block1 ;; ;; block1: @@ -461,6 +477,7 @@ ;; } ;; ;; function u0:24(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -477,7 +494,7 @@ ;; @01b3 v7 = uextend.i64 v3 ; v3 = 0 ;; @01b3 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @01b3 v9 = iadd v8, v7 -;; @01b3 store little heap v6, v9 +;; @01b3 store little region0 v6, v9 ;; @01b7 jump block1 ;; ;; block1: @@ -485,6 +502,7 @@ ;; } ;; ;; function u0:25(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -501,7 +519,7 @@ ;; @01c2 v7 = uextend.i64 v3 ; v3 = 0 ;; @01c2 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @01c2 v9 = iadd v8, v7 -;; @01c2 store little heap v6, v9 +;; @01c2 store little region0 v6, v9 ;; @01c6 jump block1 ;; ;; block1: @@ -509,6 +527,7 @@ ;; } ;; ;; function u0:26(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -525,7 +544,7 @@ ;; @01d1 v7 = uextend.i64 v3 ; v3 = 0 ;; @01d1 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @01d1 v9 = iadd v8, v7 -;; @01d1 store little heap v6, v9 +;; @01d1 store little region0 v6, v9 ;; @01d5 jump block1 ;; ;; block1: @@ -533,6 +552,7 @@ ;; } ;; ;; function u0:27(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -549,7 +569,7 @@ ;; @01e0 v7 = uextend.i64 v3 ; v3 = 0 ;; @01e0 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @01e0 v9 = iadd v8, v7 -;; @01e0 store little heap v6, v9 +;; @01e0 store little region0 v6, v9 ;; @01e4 jump block1 ;; ;; block1: @@ -557,6 +577,7 @@ ;; } ;; ;; function u0:28(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -573,7 +594,7 @@ ;; @01ef v7 = uextend.i64 v3 ; v3 = 0 ;; @01ef v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @01ef v9 = iadd v8, v7 -;; @01ef store little heap v6, v9 +;; @01ef store little region0 v6, v9 ;; @01f3 jump block1 ;; ;; block1: @@ -581,6 +602,7 @@ ;; } ;; ;; function u0:29(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -597,7 +619,7 @@ ;; @01fe v7 = uextend.i64 v3 ; v3 = 0 ;; @01fe v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @01fe v9 = iadd v8, v7 -;; @01fe store little heap v6, v9 +;; @01fe store little region0 v6, v9 ;; @0202 jump block1 ;; ;; block1: @@ -605,6 +627,7 @@ ;; } ;; ;; function u0:2(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -621,7 +644,7 @@ ;; @0065 v7 = uextend.i64 v3 ; v3 = 0 ;; @0065 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @0065 v9 = iadd v8, v7 -;; @0065 store little heap v6, v9 +;; @0065 store little region0 v6, v9 ;; @0069 jump block1 ;; ;; block1: @@ -629,6 +652,7 @@ ;; } ;; ;; function u0:30(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -645,7 +669,7 @@ ;; @020d v7 = uextend.i64 v3 ; v3 = 0 ;; @020d v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @020d v9 = iadd v8, v7 -;; @020d store little heap v6, v9 +;; @020d store little region0 v6, v9 ;; @0211 jump block1 ;; ;; block1: @@ -653,6 +677,7 @@ ;; } ;; ;; function u0:31(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -669,7 +694,7 @@ ;; @021c v7 = uextend.i64 v3 ; v3 = 0 ;; @021c v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @021c v9 = iadd v8, v7 -;; @021c store little heap v6, v9 +;; @021c store little region0 v6, v9 ;; @0220 jump block1 ;; ;; block1: @@ -677,6 +702,7 @@ ;; } ;; ;; function u0:32(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -693,7 +719,7 @@ ;; @022b v7 = uextend.i64 v3 ; v3 = 0 ;; @022b v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @022b v9 = iadd v8, v7 -;; @022b store little heap v6, v9 +;; @022b store little region0 v6, v9 ;; @022f jump block1 ;; ;; block1: @@ -701,6 +727,7 @@ ;; } ;; ;; function u0:33(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -717,7 +744,7 @@ ;; @023a v7 = uextend.i64 v3 ; v3 = 0 ;; @023a v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @023a v9 = iadd v8, v7 -;; @023a store little heap v6, v9 +;; @023a store little region0 v6, v9 ;; @023e jump block1 ;; ;; block1: @@ -725,6 +752,7 @@ ;; } ;; ;; function u0:3(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -741,7 +769,7 @@ ;; @0075 v7 = uextend.i64 v3 ; v3 = 0 ;; @0075 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @0075 v9 = iadd v8, v7 -;; @0075 store little heap v6, v9 +;; @0075 store little region0 v6, v9 ;; @0079 jump block1 ;; ;; block1: @@ -749,6 +777,7 @@ ;; } ;; ;; function u0:4(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -763,7 +792,7 @@ ;; @0084 v5 = uextend.i64 v3 ; v3 = 0 ;; @0084 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @0084 v7 = iadd v6, v5 -;; @0084 store little heap v4, v7 +;; @0084 store little region0 v4, v7 ;; @0088 jump block1 ;; ;; block1: @@ -771,6 +800,7 @@ ;; } ;; ;; function u0:5(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -787,7 +817,7 @@ ;; @0093 v7 = uextend.i64 v3 ; v3 = 0 ;; @0093 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @0093 v9 = iadd v8, v7 -;; @0093 store little heap v6, v9 +;; @0093 store little region0 v6, v9 ;; @0097 jump block1 ;; ;; block1: @@ -795,6 +825,7 @@ ;; } ;; ;; function u0:6(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -811,7 +842,7 @@ ;; @00a2 v7 = uextend.i64 v3 ; v3 = 0 ;; @00a2 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @00a2 v9 = iadd v8, v7 -;; @00a2 store little heap v6, v9 +;; @00a2 store little region0 v6, v9 ;; @00a6 jump block1 ;; ;; block1: @@ -819,6 +850,7 @@ ;; } ;; ;; function u0:7(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -835,7 +867,7 @@ ;; @00b2 v7 = uextend.i64 v3 ; v3 = 0 ;; @00b2 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @00b2 v9 = iadd v8, v7 -;; @00b2 store little heap v6, v9 +;; @00b2 store little region0 v6, v9 ;; @00b6 jump block1 ;; ;; block1: @@ -843,6 +875,7 @@ ;; } ;; ;; function u0:8(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -857,7 +890,7 @@ ;; @00c1 v5 = uextend.i64 v3 ; v3 = 0 ;; @00c1 v6 = load.i64 notrap aligned readonly can_move v0+56 ;; @00c1 v7 = iadd v6, v5 -;; @00c1 store little heap v4, v7 +;; @00c1 store little region0 v4, v7 ;; @00c5 jump block1 ;; ;; block1: @@ -865,6 +898,7 @@ ;; } ;; ;; function u0:9(i64 vmctx, i64, i8x16) tail { +;; region0 = 0 "heap" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -881,7 +915,7 @@ ;; @00d0 v7 = uextend.i64 v3 ; v3 = 0 ;; @00d0 v8 = load.i64 notrap aligned readonly can_move v0+56 ;; @00d0 v9 = iadd v8, v7 -;; @00d0 store little heap v6, v9 +;; @00d0 store little region0 v6, v9 ;; @00d4 jump block1 ;; ;; block1: diff --git a/tests/disas/sub-global.wat b/tests/disas/sub-global.wat index 2a59855dba2e..105dd814ed8e 100644 --- a/tests/disas/sub-global.wat +++ b/tests/disas/sub-global.wat @@ -13,6 +13,7 @@ ) ;; function u0:0(i64 vmctx, i64) tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -20,10 +21,10 @@ ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64): -;; @0020 v3 = load.i32 notrap aligned table v0+48 +;; @0020 v3 = load.i32 notrap aligned region0 v0+48 ;; @0022 v4 = iconst.i32 16 ;; @0024 v5 = isub v3, v4 ; v4 = 16 -;; @0025 store notrap aligned table v5, v0+48 +;; @0025 store notrap aligned region0 v5, v0+48 ;; @0027 jump block1 ;; ;; block1: diff --git a/tests/disas/table-copy.wat b/tests/disas/table-copy.wat index c816d488dadc..298cfe263d02 100644 --- a/tests/disas/table-copy.wat +++ b/tests/disas/table-copy.wat @@ -63,6 +63,7 @@ ;; } ;; ;; function u0:3(i64 vmctx, i64, i32, i32, i32, i32) -> i32 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -136,7 +137,7 @@ ;; @0090 v48 = iadd v46, v47 ;; @0090 v49 = iconst.i64 0 ;; @0090 v50 = select_spectre_guard v44, v49, v48 ; v49 = 0 -;; @0090 v51 = load.i64 user6 aligned table v50 +;; @0090 v51 = load.i64 user6 aligned region0 v50 ;; v97 = iconst.i64 -2 ;; @0090 v52 = band v51, v97 ; v97 = -2 ;; @0090 brif v51, block7(v52), block6 @@ -157,7 +158,7 @@ ;; @0090 v77 = iadd v75, v76 ;; @0090 v78 = iconst.i64 0 ;; @0090 v79 = select_spectre_guard v73, v78, v77 ; v78 = 0 -;; @0090 v80 = load.i64 user6 aligned table v79 +;; @0090 v80 = load.i64 user6 aligned region0 v79 ;; v94 = iconst.i64 -2 ;; @0090 v81 = band v80, v94 ; v94 = -2 ;; @0090 brif v80, block9(v81), block8 @@ -202,6 +203,7 @@ ;; } ;; ;; function u0:4(i64 vmctx, i64, i32, i32, i32, i32) -> i32 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -278,7 +280,7 @@ ;; @009f v49 = iadd v47, v48 ;; @009f v50 = iconst.i64 0 ;; @009f v51 = select_spectre_guard v45, v50, v49 ; v50 = 0 -;; @009f v52 = load.i64 user6 aligned table v51 +;; @009f v52 = load.i64 user6 aligned region0 v51 ;; v102 = iconst.i64 -2 ;; @009f v53 = band v52, v102 ; v102 = -2 ;; @009f brif v52, block7(v53), block6 @@ -302,7 +304,7 @@ ;; @009f v79 = iadd v77, v78 ;; @009f v80 = iconst.i64 0 ;; @009f v81 = select_spectre_guard v75, v80, v79 ; v80 = 0 -;; @009f v82 = load.i64 user6 aligned table v81 +;; @009f v82 = load.i64 user6 aligned region0 v81 ;; v96 = iconst.i64 -2 ;; @009f v83 = band v82, v96 ; v96 = -2 ;; @009f brif v82, block9(v83), block8 diff --git a/tests/disas/table-get-fixed-size.wat b/tests/disas/table-get-fixed-size.wat index eaacb0b51eaf..121bb597af3e 100644 --- a/tests/disas/table-get-fixed-size.wat +++ b/tests/disas/table-get-fixed-size.wat @@ -16,6 +16,7 @@ table.get 0)) ;; function u0:0(i64 vmctx, i64) -> i32 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -34,7 +35,7 @@ ;; @0054 v9 = iadd v7, v8 ;; @0054 v10 = iconst.i64 0 ;; @0054 v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @0054 v12 = load.i32 user6 aligned table v11 +;; @0054 v12 = load.i32 user6 aligned region0 v11 ;; @0056 jump block1 ;; ;; block1: @@ -42,6 +43,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -59,7 +61,7 @@ ;; @005b v9 = iadd v7, v8 ;; @005b v10 = iconst.i64 0 ;; @005b v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @005b v12 = load.i32 user6 aligned table v11 +;; @005b v12 = load.i32 user6 aligned region0 v11 ;; @005d jump block1 ;; ;; block1: diff --git a/tests/disas/table-get.wat b/tests/disas/table-get.wat index 2357d3a4cccd..01666f737072 100644 --- a/tests/disas/table-get.wat +++ b/tests/disas/table-get.wat @@ -15,6 +15,7 @@ table.get 0)) ;; function u0:0(i64 vmctx, i64) -> i32 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -35,7 +36,7 @@ ;; @0053 v10 = iadd v8, v9 ;; @0053 v11 = iconst.i64 0 ;; @0053 v12 = select_spectre_guard v6, v11, v10 ; v11 = 0 -;; @0053 v13 = load.i32 user6 aligned table v12 +;; @0053 v13 = load.i32 user6 aligned region0 v12 ;; @0055 jump block1 ;; ;; block1: @@ -43,6 +44,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32) -> i32 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -62,7 +64,7 @@ ;; @005a v10 = iadd v8, v9 ;; @005a v11 = iconst.i64 0 ;; @005a v12 = select_spectre_guard v6, v11, v10 ; v11 = 0 -;; @005a v13 = load.i32 user6 aligned table v12 +;; @005a v13 = load.i32 user6 aligned region0 v12 ;; @005c jump block1 ;; ;; block1: diff --git a/tests/disas/table-set-fixed-size.wat b/tests/disas/table-set-fixed-size.wat index 2b60122f7ef5..51b0f4db2fd8 100644 --- a/tests/disas/table-set-fixed-size.wat +++ b/tests/disas/table-set-fixed-size.wat @@ -17,6 +17,7 @@ local.get 1 table.set 0)) ;; function u0:0(i64 vmctx, i64, i32) tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -35,7 +36,7 @@ ;; @0056 v9 = iadd v7, v8 ;; @0056 v10 = iconst.i64 0 ;; @0056 v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @0056 store user6 aligned table v2, v11 +;; @0056 store user6 aligned region0 v2, v11 ;; @0058 jump block1 ;; ;; block1: @@ -43,6 +44,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32, i32) tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -60,7 +62,7 @@ ;; @005f v9 = iadd v7, v8 ;; @005f v10 = iconst.i64 0 ;; @005f v11 = select_spectre_guard v5, v10, v9 ; v10 = 0 -;; @005f store user6 aligned table v3, v11 +;; @005f store user6 aligned region0 v3, v11 ;; @0061 jump block1 ;; ;; block1: diff --git a/tests/disas/table-set.wat b/tests/disas/table-set.wat index 5a51ec61a4b8..38cb9b11f1d9 100644 --- a/tests/disas/table-set.wat +++ b/tests/disas/table-set.wat @@ -17,6 +17,7 @@ table.set 0)) ;; function u0:0(i64 vmctx, i64, i32) tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -37,7 +38,7 @@ ;; @0055 v10 = iadd v8, v9 ;; @0055 v11 = iconst.i64 0 ;; @0055 v12 = select_spectre_guard v6, v11, v10 ; v11 = 0 -;; @0055 store user6 aligned table v2, v12 +;; @0055 store user6 aligned region0 v2, v12 ;; @0057 jump block1 ;; ;; block1: @@ -45,6 +46,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32, i32) tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -64,7 +66,7 @@ ;; @005e v10 = iadd v8, v9 ;; @005e v11 = iconst.i64 0 ;; @005e v12 = select_spectre_guard v6, v11, v10 ; v11 = 0 -;; @005e store user6 aligned table v3, v12 +;; @005e store user6 aligned region0 v3, v12 ;; @0060 jump block1 ;; ;; block1: diff --git a/tests/disas/typed-funcrefs-eager-init.wat b/tests/disas/typed-funcrefs-eager-init.wat index bd688a24cf77..b16326ff89c8 100644 --- a/tests/disas/typed-funcrefs-eager-init.wat +++ b/tests/disas/typed-funcrefs-eager-init.wat @@ -127,6 +127,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32, i32, i32, i32) -> i32 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -139,13 +140,13 @@ ;; @0048 v12 = load.i64 notrap aligned readonly can_move v0+48 ;; v47 = iconst.i64 8 ;; @0048 v14 = iadd v12, v47 ; v47 = 8 -;; @0048 v17 = load.i64 user6 aligned table v14 +;; @0048 v17 = load.i64 user6 aligned region0 v14 ;; @004a v18 = load.i64 user16 aligned readonly v17+8 ;; @004a v19 = load.i64 notrap aligned readonly v17+24 ;; @004a v20 = call_indirect sig0, v18(v19, v0, v2, v3, v4, v5) ;; v54 = iconst.i64 16 ;; @005b v28 = iadd v12, v54 ; v54 = 16 -;; @005b v31 = load.i64 user6 aligned table v28 +;; @005b v31 = load.i64 user6 aligned region0 v28 ;; @005d v32 = load.i64 user16 aligned readonly v31+8 ;; @005d v33 = load.i64 notrap aligned readonly v31+24 ;; @005d v34 = call_indirect sig0, v32(v33, v0, v2, v3, v4, v5) @@ -157,6 +158,7 @@ ;; } ;; ;; function u0:2(i64 vmctx, i64, i32, i32, i32, i32) -> i32 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -169,13 +171,13 @@ ;; @0075 v12 = load.i64 notrap aligned readonly can_move v0+48 ;; v47 = iconst.i64 8 ;; @0075 v14 = iadd v12, v47 ; v47 = 8 -;; @0075 v17 = load.i64 user6 aligned table v14 +;; @0075 v17 = load.i64 user6 aligned region0 v14 ;; @0075 v18 = load.i64 user7 aligned readonly v17+8 ;; @0075 v19 = load.i64 notrap aligned readonly v17+24 ;; @0075 v20 = call_indirect sig0, v18(v19, v0, v2, v3, v4, v5) ;; v54 = iconst.i64 16 ;; @0087 v28 = iadd v12, v54 ; v54 = 16 -;; @0087 v31 = load.i64 user6 aligned table v28 +;; @0087 v31 = load.i64 user6 aligned region0 v28 ;; @0087 v32 = load.i64 user7 aligned readonly v31+8 ;; @0087 v33 = load.i64 notrap aligned readonly v31+24 ;; @0087 v34 = call_indirect sig0, v32(v33, v0, v2, v3, v4, v5) @@ -187,6 +189,7 @@ ;; } ;; ;; function u0:3(i64 vmctx, i64, i32, i32, i32, i32) -> i32 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -195,11 +198,11 @@ ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32, v4: i32, v5: i32): -;; @009e v9 = load.i64 notrap aligned table v0+64 +;; @009e v9 = load.i64 notrap aligned region0 v0+64 ;; @00a0 v10 = load.i64 user16 aligned readonly v9+8 ;; @00a0 v11 = load.i64 notrap aligned readonly v9+24 ;; @00a0 v12 = call_indirect sig0, v10(v11, v0, v2, v3, v4, v5) -;; @00af v15 = load.i64 notrap aligned table v0+80 +;; @00af v15 = load.i64 notrap aligned region0 v0+80 ;; @00b1 v16 = load.i64 user16 aligned readonly v15+8 ;; @00b1 v17 = load.i64 notrap aligned readonly v15+24 ;; @00b1 v18 = call_indirect sig0, v16(v17, v0, v2, v3, v4, v5) diff --git a/tests/disas/typed-funcrefs.wat b/tests/disas/typed-funcrefs.wat index 6257f9de1061..9e807a8b35b7 100644 --- a/tests/disas/typed-funcrefs.wat +++ b/tests/disas/typed-funcrefs.wat @@ -127,6 +127,7 @@ ;; } ;; ;; function u0:1(i64 vmctx, i64, i32, i32, i32, i32) -> i32 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -141,7 +142,7 @@ ;; @0048 v12 = load.i64 notrap aligned readonly can_move v0+48 ;; v67 = iconst.i64 8 ;; @0048 v14 = iadd v12, v67 ; v67 = 8 -;; @0048 v17 = load.i64 user6 aligned table v14 +;; @0048 v17 = load.i64 user6 aligned region0 v14 ;; v57 = iconst.i64 -2 ;; @0048 v18 = band v17, v57 ; v57 = -2 ;; @0048 brif v17, block3(v18), block2 @@ -158,7 +159,7 @@ ;; @004a v26 = call_indirect sig1, v24(v25, v0, v2, v3, v4, v5) ;; v74 = iconst.i64 16 ;; @005b v39 = iadd.i64 v12, v74 ; v74 = 16 -;; @005b v42 = load.i64 user6 aligned table v39 +;; @005b v42 = load.i64 user6 aligned region0 v39 ;; v75 = iconst.i64 -2 ;; v76 = band v42, v75 ; v75 = -2 ;; @005b brif v42, block5(v76), block4 @@ -181,6 +182,7 @@ ;; } ;; ;; function u0:2(i64 vmctx, i64, i32, i32, i32, i32) -> i32 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -195,7 +197,7 @@ ;; @0075 v12 = load.i64 notrap aligned readonly can_move v0+48 ;; v67 = iconst.i64 8 ;; @0075 v14 = iadd v12, v67 ; v67 = 8 -;; @0075 v17 = load.i64 user6 aligned table v14 +;; @0075 v17 = load.i64 user6 aligned region0 v14 ;; v57 = iconst.i64 -2 ;; @0075 v18 = band v17, v57 ; v57 = -2 ;; @0075 brif v17, block3(v18), block2 @@ -212,7 +214,7 @@ ;; @0075 v26 = call_indirect sig0, v24(v25, v0, v2, v3, v4, v5) ;; v74 = iconst.i64 16 ;; @0087 v39 = iadd.i64 v12, v74 ; v74 = 16 -;; @0087 v42 = load.i64 user6 aligned table v39 +;; @0087 v42 = load.i64 user6 aligned region0 v39 ;; v75 = iconst.i64 -2 ;; v76 = band v42, v75 ; v75 = -2 ;; @0087 brif v42, block5(v76), block4 @@ -235,6 +237,7 @@ ;; } ;; ;; function u0:3(i64 vmctx, i64, i32, i32, i32, i32) -> i32 tail { +;; region0 = 1 "table" ;; gv0 = vmctx ;; gv1 = load.i64 notrap aligned readonly gv0+8 ;; gv2 = load.i64 notrap aligned gv1+24 @@ -243,11 +246,11 @@ ;; stack_limit = gv2 ;; ;; block0(v0: i64, v1: i64, v2: i32, v3: i32, v4: i32, v5: i32): -;; @009e v9 = load.i64 notrap aligned table v0+64 +;; @009e v9 = load.i64 notrap aligned region0 v0+64 ;; @00a0 v10 = load.i64 user16 aligned readonly v9+8 ;; @00a0 v11 = load.i64 notrap aligned readonly v9+24 ;; @00a0 v12 = call_indirect sig0, v10(v11, v0, v2, v3, v4, v5) -;; @00af v15 = load.i64 notrap aligned table v0+80 +;; @00af v15 = load.i64 notrap aligned region0 v0+80 ;; @00b1 v16 = load.i64 user16 aligned readonly v15+8 ;; @00b1 v17 = load.i64 notrap aligned readonly v15+24 ;; @00b1 v18 = call_indirect sig0, v16(v17, v0, v2, v3, v4, v5)