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06_Simulation.md

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title Simulation & Verification
project Solar-Doctor
phase 06 - Simulation
status SIMULATING
tags
Proteus
Tinkercad
Simulation
Testing
aliases
Phase 6 Simulation
Simulation & Verification
date 2025-11-21
owner mr.princetheprogrammerbtw

PHASE 6: SIMULATION & VERIFICATION

Debugging the Hardware before it exists.

6.1 Simulation Strategy

Standard simulators like Tinkercad may lack specific components like "Solar Panels" or detailed ESP32 peripherals. The strategy is to abstract these components to test the core logic.

  • Tool: Proteus 8 Professional is recommended for comprehensive simulation. Wokwi is a suitable free, web-based alternative for ESP32-specific code.
  • The Setup:
    • Simulated Solar Panel: Use an adjustable DC Voltage Source (0V - 50V).
    • Simulated Load: Use a simple component like a Lamp or Resistor.
    • Controller: Use the ESP32 model available in the simulator.
    • Display: Use a Virtual Serial Terminal to monitor debug output.

6.2 The Logic Test

The primary goal is to verify the threshold-based decision logic.

  • Scenario A: Normal Operation (Sunny Day)

    • Input: Set the DC Voltage Source to 40V.
    • Expected: The ESP32 should read the scaled voltage. The GPIO pin controlling the bypass (GPIO 26) should remain LOW.
    • Result: A "System Normal" indicator (e.g., a green LED) should be ON.

  • Scenario B: Shading Event

    • Input: Reduce the DC Voltage Source to 25V to simulate a shading event.
    • Expected: The ESP32 should detect a voltage drop below the defined threshold. GPIO 26 should go HIGH.
    • Result: A "Bypass Active" indicator (e.g., a red LED) should turn ON. The simulated load should remain operational, representing a successful bypass in a real-world string.

6.3 The Code Logic (Pseudocode for Simulation)

This simplified C++ logic can be used in a tool like Wokwi to test the basic functionality.

// Define the pin for the voltage divider input
const int VOLTAGE_PIN = 35;
// Define the pin to control the bypass switch
const int SWITCH_PIN = 26;

// Set a hypothetical voltage threshold for normal operation
const float NORMAL_VOLTAGE_THRESHOLD = 30.0; 

// Calibration factor for the voltage divider (for 50V max)
const float VOLTAGE_SCALING_FACTOR = 50.0 / 4096.0;

void setup() {
  Serial.begin(115200);
  pinMode(SWITCH_PIN, OUTPUT);
  digitalWrite(SWITCH_PIN, LOW); // Default to normal state
}

void loop() {
  // Read the raw ADC value and scale it to the actual voltage
  float voltage = analogRead(VOLTAGE_PIN) * VOLTAGE_SCALING_FACTOR;

  if (voltage < NORMAL_VOLTAGE_THRESHOLD) {
    digitalWrite(SWITCH_PIN, HIGH); // Turn bypass ON
    Serial.println("FAULT DETECTED! Bypassing panel...");
  } else {
    digitalWrite(SWITCH_PIN, LOW); // Maintain normal operation
    Serial.println("System Normal. Voltage: " + String(voltage) + "V");
  }
  delay(1000);
}

6.4 Verification Results

Documentation for the final report should include screenshots from the simulation.

  • Screenshot 1: "System Healthy" - showing 40V input and the bypass switch in the OFF state.
  • Screenshot 2: "System Fault" - showing 28V input and the bypass switch in the ON state.
  • Screenshot 3: The Serial Monitor output displaying the corresponding status messages ("System Normal" or "FAULT DETECTED").

6.5 Stress Analysis ("Smoke Test")

The simulation environment allows for testing edge cases and validating protection mechanisms.

  • Test: Does the voltage at GPIO 35 exceed 3.3V under maximum input conditions?
    • If the input source is set to 60V, the voltage divider output would be: 60V * (10k / (150k + 10k)) = 3.75V.
  • Finding: This calculation shows that 3.75V is greater than the ESP32's 3.3V maximum tolerance.
  • Conclusion: The simulation validates the necessity of the Zener diode planned in the schematic to clamp the voltage and protect the ADC pin. An alternative fix would be to increase the R1 resistor value to 200kΩ.

Phase 6 Checklist

  • Simulated the Voltage Divider Logic and verified its scaling.
  • Verified the switching trigger mechanism (GPIO HIGH/LOW).
  • Identified a potential over-voltage issue through stress testing.
  • Validated the requirement for the Zener diode protection circuit.
  • Captured screenshots for the final report.

The virtual prototype is validated, confirming the logic and safety measures.

[[07_Hardware_Prototype]]