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vd56g3.c
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2717 lines (2382 loc) · 74.4 KB
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// SPDX-License-Identifier: GPL-2.0
/*
* A V4L2 driver for ST VD56G3 (Mono), VD66GY (RGB) and VD16GZ (RGBNIr) global
* shutter cameras.
* Copyright (C) 2019, STMicroelectronics SA
*/
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/i2c.h>
#include <linux/iopoll.h>
#include <linux/module.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <media/v4l2-async.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
#include <media/v4l2-event.h>
#include <media/v4l2-fwnode.h>
#include <media/v4l2-subdev.h>
/* Backward compatibility */
#include <linux/version.h>
#if KERNEL_VERSION(6, 12, 0) > LINUX_VERSION_CODE
#include <asm/unaligned.h>
#else
#include <linux/unaligned.h>
#endif
#if KERNEL_VERSION(6, 8, 0) > LINUX_VERSION_CODE
/*
* Warning : CCI_REGxy_LE definitions doesn't fit exactly with v4l2-cci.h .
* In fact endianness is managed directly in vd56g3_read/write() functions.
*/
#include <linux/bitfield.h>
#define CCI_REG_ADDR_MASK GENMASK(15, 0)
#define CCI_REG_WIDTH_SHIFT 16
#define CCI_REG_ADDR(x) FIELD_GET(CCI_REG_ADDR_MASK, x)
#define CCI_REG8(x) ((1 << CCI_REG_WIDTH_SHIFT) | (x))
#define CCI_REG16_LE(x) ((2 << CCI_REG_WIDTH_SHIFT) | (x))
#define CCI_REG32_LE(x) ((4 << CCI_REG_WIDTH_SHIFT) | (x))
#else
#include <media/v4l2-cci.h>
#endif
#if KERNEL_VERSION(5, 18, 0) > LINUX_VERSION_CODE
#define MIPI_CSI2_DT_RAW8 0x2a
#define MIPI_CSI2_DT_RAW10 0x2b
#else
#include <media/mipi-csi2.h>
#endif
#if KERNEL_VERSION(5, 15, 0) > LINUX_VERSION_CODE
#define HZ_PER_MHZ 1000000UL
#define MEGA 1000000UL
#else
#include <linux/units.h>
#endif
#if KERNEL_VERSION(4, 16, 0) > LINUX_VERSION_CODE
#include <linux/of_device.h>
#endif
#if KERNEL_VERSION(4, 5, 0) > LINUX_VERSION_CODE
int pm_runtime_get_if_in_use(struct device *dev)
{
unsigned long flags;
int retval;
spin_lock_irqsave(&dev->power.lock, flags);
retval = dev->power.disable_depth > 0 ? -EINVAL :
dev->power.runtime_status == RPM_ACTIVE &&
atomic_inc_not_zero(&dev->power.usage_count);
spin_unlock_irqrestore(&dev->power.lock, flags);
return retval;
}
#endif
/* Register Map */
#define VD56G3_REG_MODEL_ID CCI_REG16_LE(0x0000)
#define VD56G3_MODEL_ID 0x5603
#define VD56G3_REG_REVISION CCI_REG16_LE(0x0002)
#define VD56G3_REVISION_CUT2 0x20
#define VD56G3_REVISION_CUT3 0x31
#define VD56G3_REG_OPTICAL_REVISION CCI_REG8(0x001a)
#define VD56G3_OPTICAL_REVISION_MONO 0
#define VD56G3_OPTICAL_REVISION_BAYER 1
#define VD56G3_OPTICAL_REVISION_RGBNIR 2
#define VD56G3_REG_FWPATCH_REVISION CCI_REG16_LE(0x001e)
#define VD56G3_REG_VTPATCH_ID CCI_REG8(0x0020)
#define VD56G3_REG_SYSTEM_FSM CCI_REG8(0x0028)
#define VD56G3_SYSTEM_FSM_READY_TO_BOOT 0x01
#define VD56G3_SYSTEM_FSM_SW_STBY 0x02
#define VD56G3_SYSTEM_FSM_STREAMING 0x03
#define VD56G3_REG_TEMPERATURE CCI_REG16_LE(0x004c)
#define VD56G3_REG_APPLIED_COARSE_EXPOSURE CCI_REG16_LE(0x0064)
#define VD56G3_REG_APPLIED_ANALOG_GAIN CCI_REG8(0x0068)
#define VD56G3_REG_APPLIED_DIGITAL_GAIN CCI_REG16_LE(0x006a)
#define VD56G3_REG_BOOT CCI_REG8(0x0200)
#define VD56G3_CMD_ACK 0
#define VD56G3_CMD_BOOT 1
#define VD56G3_CMD_PATCH_SETUP 2
#define VD56G3_REG_STBY CCI_REG8(0x0201)
#define VD56G3_CMD_START_STREAM 1
#define VD56G3_CMD_THSENS_READ 4
#define VD56G3_REG_STREAMING CCI_REG8(0x0202)
#define VD56G3_CMD_STOP_STREAM 1
#define VD56G3_REG_VTPATCHING CCI_REG8(0x0203)
#define VD56G3_CMD_START_VTRAM_UPDATE 1
#define VD56G3_CMD_END_VTRAM_UPDATE 2
#define VD56G3_REG_EXT_CLOCK CCI_REG32_LE(0x0220)
#define VD56G3_REG_CLK_PLL_PREDIV CCI_REG8(0x0224)
#define VD56G3_REG_CLK_SYS_PLL_MULT CCI_REG8(0x0226)
#define VD56G3_REG_ORIENTATION CCI_REG8(0x0302)
#define VD56G3_REG_VT_CTRL CCI_REG8(0x0309)
#define VD56G3_REG_FORMAT_CTRL CCI_REG8(0x030a)
#define VD56G3_REG_OIF_CTRL CCI_REG16_LE(0x030c)
#define VD56G3_REG_OIF_IMG_CTRL CCI_REG8(0x030f)
#define VD56G3_REG_OIF_CSI_BITRATE CCI_REG16_LE(0x0312)
#define VD56G3_REG_DUSTER_CTRL CCI_REG8(0x0318)
#define VD56G3_DUSTER_DISABLE 0
#define VD56G3_DUSTER_ENABLE_DEF_MODULES 0x13
#define VD56G3_REG_ISL_ENABLE CCI_REG8(0x0333)
#define VD56G3_REG_DARKCAL_CTRL CCI_REG8(0x0340)
#define VD56G3_DARKCAL_ENABLE 1
#define VD56G3_DARKCAL_DISABLE_DARKAVG 2
#define VD56G3_REG_PATGEN_CTRL CCI_REG16_LE(0x0400)
#define VD56G3_PATGEN_ENABLE 1
#define VD56G3_PATGEN_TYPE_SHIFT 4
#define VD56G3_REG_DARKCAL_PEDESTAL CCI_REG8(0x0415)
#define VD56G3_REG_AE_COLDSTART_COARSE_EXPOSURE CCI_REG16_LE(0x042a)
#define VD56G3_REG_AE_COLDSTART_ANALOG_GAIN CCI_REG8(0x042c)
#define VD56G3_REG_AE_COLDSTART_DIGITAL_GAIN CCI_REG16_LE(0x042e)
#define VD56G3_REG_AE_COMPILER_CONTROL CCI_REG8(0x0430)
#define VD56G3_REG_AE_ROI_START_H CCI_REG16_LE(0x0432)
#define VD56G3_REG_AE_ROI_START_V CCI_REG16_LE(0x0434)
#define VD56G3_REG_AE_ROI_END_H CCI_REG16_LE(0x0436)
#define VD56G3_REG_AE_ROI_END_V CCI_REG16_LE(0x0438)
#define VD56G3_REG_AE_COMPENSATION CCI_REG16_LE(0x043a)
#define VD56G3_REG_AE_TARGET_PERCENTAGE CCI_REG16_LE(0x043c)
#define VD56G3_REG_AE_STEP_PROPORTION CCI_REG16_LE(0x043e)
#define VD56G3_REG_AE_LEAK_PROPORTION CCI_REG16_LE(0x0440)
#define VD56G3_REG_EXP_MODE CCI_REG8(0x044c)
#define VD56G3_EXP_MODE_AUTO 0
#define VD56G3_EXP_MODE_FREEZE 1
#define VD56G3_EXP_MODE_MANUAL 2
#define VD56G3_REG_MANUAL_ANALOG_GAIN CCI_REG8(0x044d)
#define VD56G3_REG_MANUAL_COARSE_EXPOSURE CCI_REG16_LE(0x044e)
#define VD56G3_REG_MANUAL_DIGITAL_GAIN_CH0 CCI_REG16_LE(0x0450)
#define VD56G3_REG_MANUAL_DIGITAL_GAIN_CH1 CCI_REG16_LE(0x0452)
#define VD56G3_REG_MANUAL_DIGITAL_GAIN_CH2 CCI_REG16_LE(0x0454)
#define VD56G3_REG_MANUAL_DIGITAL_GAIN_CH3 CCI_REG16_LE(0x0456)
#define VD56G3_REG_FRAME_LENGTH CCI_REG16_LE(0x0458)
#define VD56G3_REG_Y_START CCI_REG16_LE(0x045a)
#define VD56G3_REG_Y_END CCI_REG16_LE(0x045c)
#define VD56G3_REG_OUT_ROI_X_START CCI_REG16_LE(0x045e)
#define VD56G3_REG_OUT_ROI_X_END CCI_REG16_LE(0x0460)
#define VD56G3_REG_OUT_ROI_Y_START CCI_REG16_LE(0x0462)
#define VD56G3_REG_OUT_ROI_Y_END CCI_REG16_LE(0x0464)
#define VD56G3_REG_GPIO_0_CTRL CCI_REG8(0x0467)
#define VD56G3_GPIOX_FSYNC_OUT 0x00
#define VD56G3_GPIOX_GPIO_IN 0x01
#define VD56G3_GPIOX_STROBE_MODE 0x02
#define VD56G3_GPIOX_VT_SLAVE_MODE 0x0a
#define VD56G3_REG_READOUT_CTRL CCI_REG8(0x047e)
#define READOUT_NORMAL 0x00
#define READOUT_DIGITAL_BINNING_X2 0x01
/*
* The VD56G3 pixel array is organized as follows:
*
* +--------------------------------+
* | | \
* | +------------------------+ | |
* | | | | |
* | | | | |
* | | | | |
* | | | | |
* | | | | |
* | | Default resolution | | | Native height (1364)
* | | 1120 x 1360 | | |
* | | | | |
* | | | | |
* | | | | |
* | | | | |
* | +------------------------+ | |
* | | /
* +--------------------------------+
* <----------------------------->
* \------------------- Native width (1124)
*
* The native resolution is 1124x1364.
* The recommended/default resolution is 1120x1360 (multiple of 16).
*/
#define VD56G3_NATIVE_WIDTH 1124
#define VD56G3_NATIVE_HEIGHT 1364
#define VD56G3_DEFAULT_WIDTH 1120
#define VD56G3_DEFAULT_HEIGHT 1360
#define VD56G3_DEFAULT_MODE 1
/* PLL settings */
#define VD56G3_TARGET_PLL 804000000UL
#define VD56G3_VT_CLOCK_DIV 5
/* Line length and Frame length (settings are for standard 10bits ADC mode) */
#define VD56G3_LINE_LENGTH_MIN 1236
#define VD56G3_VBLANK_MIN 110
#define VD56G3_FRAME_LENGTH_DEF_60FPS 2168
#define VD56G3_FRAME_LENGTH_MAX 0xffff
/* Exposure settings */
#define VD56G3_EXPOSURE_MARGIN 75
#define VD56G3_EXPOSURE_MIN 21
#define VD56G3_EXPOSURE_DEFAULT 1420U
/* Output Interface settings */
#define VD56G3_MAX_CSI_DATA_LANES 2
#define VD56G3_LINK_FREQ_DEF_1LANE 750000000UL
#define VD56G3_LINK_FREQ_DEF_2LANES 402000000UL
/* GPIOs */
#define VD56G3_NB_GPIOS 8
/* parse-SNIP: Custom-CIDs */
#define V4L2_CID_TEMPERATURE (V4L2_CID_USER_BASE | 0x1020)
#define V4L2_CID_AE_TARGET_PERCENTAGE (V4L2_CID_USER_BASE | 0x1021)
#define V4L2_CID_AE_STEP_PROPORTION (V4L2_CID_USER_BASE | 0x1022)
#define V4L2_CID_AE_LEAK_PROPORTION (V4L2_CID_USER_BASE | 0x1023)
#define V4L2_CID_DARKCAL_PEDESTAL (V4L2_CID_USER_BASE | 0x1024)
#define V4L2_CID_SLAVE_MODE (V4L2_CID_USER_BASE | 0x1025)
#if KERNEL_VERSION(4, 13, 0) > LINUX_VERSION_CODE
#define V4L2_CID_DIGITAL_GAIN (V4L2_CID_USER_BASE | 0x1026)
#endif
/* parse-SNAP: */
#include "vd56g3_patch_cut2.c"
#include "vd56g3_vtpatch.c"
/* regulator supplies */
static const char *const vd56g3_supply_names[] = {
"vcore",
"vddio",
"vana",
};
/* -----------------------------------------------------------------------------
* Models, modes and formats.
* - VD56G3: Monochrome sensor (Y8 & Y10 media bus codes)
* - VD66GY: Bayer RGB (GRBG8 & GRBG10 media bus codes)
* - VD16GZ: RGBNIR pattern
*/
/*
* DISCLAIMER:
* For the time being, when using the VD16GZ (RGBNIR) sensor, this driver
* advertises Y8 or Y10 media bus codes.
*
* Currently, there is no RGBNIR media bus code defined in the Linux kernel. As
* a temporary workaround, the driver publishes Y8/Y10 bus codes to userspace to
* allow basic functionality.
*
* Users should be aware that this does not accurately represent the sensor's
* actual pixel and may affect image processing or color interpretation.
*
* Proper support for RGBNIR patterns will require defining a new media bus code
* in the kernel and updating this driver accordingly.
*/
enum vd56g3_models {
VD56G3_MODEL_VD56G3,
VD56G3_MODEL_VD66GY,
VD56G3_MODEL_VD16GZ,
};
struct vd56g3_mode {
u32 width;
u32 height;
};
/**
* DOC: Supported Modes
*
* The vd56g3 driver supports 9 modes described below :
*
* ======= ======== ====================
* Width Height Comment
* ======= ======== ====================
* 1124 1364 Native resolution
* 1120 1360 Default resolution
* 1024 1280
* 1024 768
* 768 1024
* 720 1280
* 640 480
* 480 640 Enable Binning x2
* 320 240 Enable Binning x2
* ======= ======== ====================
*
* Each mode defaults to 60FPS. In addition, the framerate could be adjusted in
* a continuous manner (making use of the ``V4L2_CID_VBLANK`` control).
*
* For native resolution the framerate can reach 88FPS.
* For smaller resolutions, the maximum framerate will be much higher : for
* example, it can reach 220FPS in 640x480 non-binned mode.
*/
static const struct vd56g3_mode vd56g3_supported_modes[] = {
{
.width = VD56G3_NATIVE_WIDTH,
.height = VD56G3_NATIVE_HEIGHT,
},
{
.width = VD56G3_DEFAULT_WIDTH,
.height = VD56G3_DEFAULT_HEIGHT,
},
{
.width = 1024,
.height = 1280,
},
{
.width = 1024,
.height = 768,
},
{
.width = 768,
.height = 1024,
},
{
.width = 720,
.height = 1280,
},
{
.width = 640,
.height = 480,
},
{
.width = 480,
.height = 640,
},
{
.width = 320,
.height = 240,
},
};
/*
* Sensor support 8bits and 10bits output in both variants
* - Monochrome
* - RGB (with all H/V flip variations)
*/
static const unsigned int vd56g3_mbus_codes[2][5] = {
{
MEDIA_BUS_FMT_Y8_1X8,
MEDIA_BUS_FMT_SGRBG8_1X8,
MEDIA_BUS_FMT_SRGGB8_1X8,
MEDIA_BUS_FMT_SBGGR8_1X8,
MEDIA_BUS_FMT_SGBRG8_1X8,
},
{
MEDIA_BUS_FMT_Y10_1X10,
MEDIA_BUS_FMT_SGRBG10_1X10,
MEDIA_BUS_FMT_SRGGB10_1X10,
MEDIA_BUS_FMT_SBGGR10_1X10,
MEDIA_BUS_FMT_SGBRG10_1X10,
},
};
#if KERNEL_VERSION(6, 8, 0) > LINUX_VERSION_CODE
/* Big endian register addresses and 8b, 16b or 32b little endian values. */
static const struct regmap_config vd56g3_regmap_config = {
.reg_bits = 16,
.val_bits = 8,
.reg_format_endian = REGMAP_ENDIAN_BIG,
};
#endif
struct vd56g3 {
struct i2c_client *i2c_client;
struct v4l2_subdev sd;
struct media_pad pad;
struct regulator_bulk_data supplies[ARRAY_SIZE(vd56g3_supply_names)];
struct gpio_desc *reset_gpio;
struct clk *xclk;
struct regmap *regmap;
u32 xclk_freq;
u32 pll_prediv;
u32 pll_mult;
u32 pixel_clock;
u16 oif_ctrl;
u8 nb_of_lane;
u32 gpios[VD56G3_NB_GPIOS];
bool ext_vt_sync;
unsigned long ext_leds_mask;
enum vd56g3_models model;
bool is_fastboot;
#if KERNEL_VERSION(5, 19, 0) > LINUX_VERSION_CODE
/* lock to protect all members below */
struct mutex lock;
#endif
struct v4l2_ctrl_handler ctrl_handler;
struct v4l2_ctrl *hblank_ctrl;
struct v4l2_ctrl *vblank_ctrl;
struct {
struct v4l2_ctrl *hflip_ctrl;
struct v4l2_ctrl *vflip_ctrl;
};
struct v4l2_ctrl *patgen_ctrl;
struct {
struct v4l2_ctrl *ae_ctrl;
struct v4l2_ctrl *expo_ctrl;
struct v4l2_ctrl *again_ctrl;
struct v4l2_ctrl *dgain_ctrl;
};
struct v4l2_ctrl *ae_lock_ctrl;
struct v4l2_ctrl *ae_bias_ctrl;
struct v4l2_ctrl *ae_target_ctrl;
struct v4l2_ctrl *ae_step_prop_ctrl;
struct v4l2_ctrl *ae_leak_prop_ctrl;
struct v4l2_ctrl *slave_ctrl;
struct v4l2_ctrl *led_ctrl;
bool streaming;
#if KERNEL_VERSION(5, 19, 0) > LINUX_VERSION_CODE
struct v4l2_mbus_framefmt active_fmt;
struct v4l2_rect active_crop;
#endif
};
static inline struct vd56g3 *to_vd56g3(struct v4l2_subdev *sd)
{
#if KERNEL_VERSION(6, 2, 0) > LINUX_VERSION_CODE
return container_of(sd, struct vd56g3, sd);
#else
return container_of_const(sd, struct vd56g3, sd);
#endif
}
static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
{
#if KERNEL_VERSION(6, 2, 0) > LINUX_VERSION_CODE
return &container_of(ctrl->handler, struct vd56g3, ctrl_handler)->sd;
#else
return &container_of_const(ctrl->handler, struct vd56g3, ctrl_handler)
->sd;
#endif
}
/* -----------------------------------------------------------------------------
* HW access : Big endian reg addresses and 8b, 16b or 32b little endian values
*/
#if KERNEL_VERSION(6, 8, 0) > LINUX_VERSION_CODE
static int vd56g3_read(struct vd56g3 *sensor, u32 reg, u32 *val, int *err)
{
struct i2c_client *client = sensor->i2c_client;
unsigned int len = (reg >> CCI_REG_WIDTH_SHIFT) & 7;
u8 buf[4];
int ret;
if (err && *err)
return *err;
reg = reg & CCI_REG_ADDR_MASK;
ret = regmap_bulk_read(sensor->regmap, reg, buf, len);
if (ret) {
dev_err(&client->dev, "%s: Error reading reg 0x%4x: %d\n",
__func__, reg, ret);
goto out;
}
switch (len) {
case 1:
*val = buf[0];
break;
case 2:
*val = get_unaligned_le16(buf);
break;
case 4:
*val = get_unaligned_le32(buf);
break;
default:
dev_err(&client->dev,
"%s: Error invalid reg-width %u for reg 0x%04x\n",
__func__, len, reg);
ret = -EINVAL;
break;
}
out:
if (ret && err)
*err = ret;
return ret;
}
static int vd56g3_write(struct vd56g3 *sensor, u32 reg, u32 val, int *err)
{
struct i2c_client *client = sensor->i2c_client;
unsigned int len = (reg >> CCI_REG_WIDTH_SHIFT) & 7;
u8 buf[4];
int ret;
if (err && *err)
return *err;
reg = reg & CCI_REG_ADDR_MASK;
switch (len) {
case 1:
buf[0] = val;
break;
case 2:
put_unaligned_le16(val, buf);
break;
case 4:
put_unaligned_le32(val, buf);
break;
default:
dev_err(&client->dev,
"%s: Error invalid reg-width %u for reg 0x%04x\n",
__func__, len, reg);
ret = -EINVAL;
goto out;
}
ret = regmap_bulk_write(sensor->regmap, reg, buf, len);
if (ret)
dev_err(&client->dev, "%s: Error writing reg 0x%4x: %d\n",
__func__, reg, ret);
out:
if (ret && err)
*err = ret;
return ret;
}
#else
#define vd56g3_read(sensor, reg, val, err) \
cci_read((sensor)->regmap, reg, (u64 *)val, err)
#define vd56g3_write(sensor, reg, val, err) \
cci_write((sensor)->regmap, reg, (u64)val, err)
#endif
static int vd56g3_write_array(struct vd56g3 *sensor, u32 reg, unsigned int len,
const u8 *array, int *err)
{
unsigned int chunk_sz = 1024;
unsigned int sz;
int ret;
if (err && *err)
return *err;
/*
* This loop isn't necessary but in certains conditions (platforms, cpu
* load, etc.) it has been observed that the bulk write could timeout.
*/
while (len) {
sz = min(len, chunk_sz);
ret = regmap_bulk_write(sensor->regmap, reg, array, sz);
if (ret < 0)
goto out;
len -= sz;
reg += sz;
array += sz;
}
out:
if (ret && err)
*err = ret;
return ret;
}
static int vd56g3_poll_reg(struct vd56g3 *sensor, u32 reg, u8 poll_val,
int *err)
{
unsigned int val = 0;
int ret;
if (err && *err)
return *err;
ret = regmap_read_poll_timeout(sensor->regmap, CCI_REG_ADDR(reg), val,
(val == poll_val), 2000,
500 * USEC_PER_MSEC);
if (ret && err)
*err = ret;
return ret;
}
static int vd56g3_wait_state(struct vd56g3 *sensor, int state, int *err)
{
return vd56g3_poll_reg(sensor, VD56G3_REG_SYSTEM_FSM, state, err);
}
/* -----------------------------------------------------------------------------
* Controls: definitions, helpers and handlers
*/
static const char *const vd56g3_tp_menu[] = { "Disabled", "Solid", "Colorbar",
"Gradbar", "Hgrey", "Vgrey",
"Dgrey", "PN28" };
static const s64 vd56g3_ev_bias_qmenu[] = { -4000, -3500, -3000, -2500, -2000,
-1500, -1000, -500, 0, 500,
1000, 1500, 2000, 2500, 3000,
3500, 4000 };
static const s64 vd56g3_link_freq_1lane[] = { VD56G3_LINK_FREQ_DEF_1LANE };
static const s64 vd56g3_link_freq_2lanes[] = { VD56G3_LINK_FREQ_DEF_2LANES };
static u8 vd56g3_get_bpp(__u32 code)
{
switch (code) {
case MEDIA_BUS_FMT_Y8_1X8:
case MEDIA_BUS_FMT_SGRBG8_1X8:
case MEDIA_BUS_FMT_SRGGB8_1X8:
case MEDIA_BUS_FMT_SBGGR8_1X8:
case MEDIA_BUS_FMT_SGBRG8_1X8:
default:
return 8;
case MEDIA_BUS_FMT_Y10_1X10:
case MEDIA_BUS_FMT_SGRBG10_1X10:
case MEDIA_BUS_FMT_SRGGB10_1X10:
case MEDIA_BUS_FMT_SBGGR10_1X10:
case MEDIA_BUS_FMT_SGBRG10_1X10:
return 10;
}
}
static u8 vd56g3_get_datatype(__u32 code)
{
switch (code) {
case MEDIA_BUS_FMT_Y8_1X8:
case MEDIA_BUS_FMT_SGRBG8_1X8:
case MEDIA_BUS_FMT_SRGGB8_1X8:
case MEDIA_BUS_FMT_SBGGR8_1X8:
case MEDIA_BUS_FMT_SGBRG8_1X8:
default:
return MIPI_CSI2_DT_RAW8;
case MEDIA_BUS_FMT_Y10_1X10:
case MEDIA_BUS_FMT_SGRBG10_1X10:
case MEDIA_BUS_FMT_SRGGB10_1X10:
case MEDIA_BUS_FMT_SBGGR10_1X10:
case MEDIA_BUS_FMT_SGBRG10_1X10:
return MIPI_CSI2_DT_RAW10;
}
}
static int vd56g3_get_temp_stream_enable(struct vd56g3 *sensor, int *temp)
{
return vd56g3_read(sensor, VD56G3_REG_TEMPERATURE, temp, NULL);
}
static int vd56g3_get_temp_stream_disable(struct vd56g3 *sensor, int *temp)
{
int ret = 0;
/* request temperature read */
vd56g3_write(sensor, VD56G3_REG_STBY, VD56G3_CMD_THSENS_READ, &ret);
vd56g3_poll_reg(sensor, VD56G3_REG_STBY, VD56G3_CMD_ACK, &ret);
if (ret)
return ret;
return vd56g3_get_temp_stream_enable(sensor, temp);
}
static int vd56g3_get_temp(struct vd56g3 *sensor, int *temp)
{
*temp = 0;
if (sensor->streaming)
return vd56g3_get_temp_stream_enable(sensor, temp);
else
return vd56g3_get_temp_stream_disable(sensor, temp);
}
static int vd56g3_read_expo_cluster(struct vd56g3 *sensor, bool force_cur_val)
{
int exposure = 0;
int again = 0;
int dgain = 0;
int ret = 0;
/*
* When 'force_cur_val' is enabled, save the ctrl value in 'cur.val'
* instead of the normal 'val', this is used during poweroff to cache
* volatile ctrls and enable coldstart.
*/
vd56g3_read(sensor, VD56G3_REG_APPLIED_COARSE_EXPOSURE, &exposure,
&ret);
vd56g3_read(sensor, VD56G3_REG_APPLIED_ANALOG_GAIN, &again, &ret);
vd56g3_read(sensor, VD56G3_REG_APPLIED_DIGITAL_GAIN, &dgain, &ret);
if (ret)
return ret;
if (force_cur_val) {
sensor->expo_ctrl->cur.val = exposure;
sensor->again_ctrl->cur.val = again;
sensor->dgain_ctrl->cur.val = dgain;
} else {
sensor->expo_ctrl->val = exposure;
sensor->again_ctrl->val = again;
sensor->dgain_ctrl->val = dgain;
}
return ret;
}
static int vd56g3_update_patgen(struct vd56g3 *sensor, u32 patgen_index)
{
u32 pattern = patgen_index <= 3 ? patgen_index : patgen_index + 12;
u16 patgen = pattern << VD56G3_PATGEN_TYPE_SHIFT;
u8 duster = VD56G3_DUSTER_ENABLE_DEF_MODULES;
u8 darkcal = VD56G3_DARKCAL_ENABLE;
int ret = 0;
if (patgen_index) {
patgen |= VD56G3_PATGEN_ENABLE;
duster = VD56G3_DUSTER_DISABLE;
darkcal = VD56G3_DARKCAL_DISABLE_DARKAVG;
}
vd56g3_write(sensor, VD56G3_REG_DUSTER_CTRL, duster, &ret);
vd56g3_write(sensor, VD56G3_REG_DARKCAL_CTRL, darkcal, &ret);
vd56g3_write(sensor, VD56G3_REG_PATGEN_CTRL, patgen, &ret);
return ret;
}
static int vd56g3_update_expo_cluster(struct vd56g3 *sensor, bool is_auto)
{
u8 expo_state = is_auto ? VD56G3_EXP_MODE_AUTO : VD56G3_EXP_MODE_MANUAL;
int ret = 0;
if (sensor->ae_ctrl->is_new)
vd56g3_write(sensor, VD56G3_REG_EXP_MODE, expo_state, &ret);
/* In Auto expo, set coldstart parameters */
if (is_auto && sensor->ae_ctrl->is_new) {
vd56g3_write(sensor, VD56G3_REG_AE_COLDSTART_COARSE_EXPOSURE,
sensor->expo_ctrl->val, &ret);
vd56g3_write(sensor, VD56G3_REG_AE_COLDSTART_ANALOG_GAIN,
sensor->again_ctrl->val, &ret);
vd56g3_write(sensor, VD56G3_REG_AE_COLDSTART_DIGITAL_GAIN,
sensor->dgain_ctrl->val, &ret);
}
/* In Manual expo, set exposure, analog and digital gains */
if (!is_auto && sensor->expo_ctrl->is_new)
vd56g3_write(sensor, VD56G3_REG_MANUAL_COARSE_EXPOSURE,
sensor->expo_ctrl->val, &ret);
if (!is_auto && sensor->again_ctrl->is_new)
vd56g3_write(sensor, VD56G3_REG_MANUAL_ANALOG_GAIN,
sensor->again_ctrl->val, &ret);
if (!is_auto && sensor->dgain_ctrl->is_new) {
vd56g3_write(sensor, VD56G3_REG_MANUAL_DIGITAL_GAIN_CH0,
sensor->dgain_ctrl->val, &ret);
vd56g3_write(sensor, VD56G3_REG_MANUAL_DIGITAL_GAIN_CH1,
sensor->dgain_ctrl->val, &ret);
vd56g3_write(sensor, VD56G3_REG_MANUAL_DIGITAL_GAIN_CH2,
sensor->dgain_ctrl->val, &ret);
vd56g3_write(sensor, VD56G3_REG_MANUAL_DIGITAL_GAIN_CH3,
sensor->dgain_ctrl->val, &ret);
}
return ret;
}
static int vd56g3_lock_exposure(struct vd56g3 *sensor, u32 lock_val)
{
bool ae_lock = lock_val & V4L2_LOCK_EXPOSURE;
u8 expo_state = ae_lock ? VD56G3_EXP_MODE_FREEZE : VD56G3_EXP_MODE_AUTO;
if (sensor->ae_ctrl->val == V4L2_EXPOSURE_AUTO)
return vd56g3_write(sensor, VD56G3_REG_EXP_MODE, expo_state,
NULL);
return 0;
}
static int vd56g3_write_gpiox(struct vd56g3 *sensor, unsigned long gpio_mask)
{
unsigned long io;
u32 gpio_val;
int ret = 0;
for_each_set_bit(io, &gpio_mask, VD56G3_NB_GPIOS) {
gpio_val = sensor->gpios[io];
if (gpio_val == VD56G3_GPIOX_VT_SLAVE_MODE &&
!sensor->slave_ctrl->val)
gpio_val = VD56G3_GPIOX_GPIO_IN;
if (gpio_val == VD56G3_GPIOX_STROBE_MODE &&
sensor->led_ctrl->val == V4L2_FLASH_LED_MODE_NONE)
gpio_val = VD56G3_GPIOX_GPIO_IN;
vd56g3_write(sensor, VD56G3_REG_GPIO_0_CTRL + io, gpio_val,
&ret);
}
return ret;
}
static int vd56g3_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
{
struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
struct vd56g3 *sensor = to_vd56g3(sd);
struct i2c_client *client = v4l2_get_subdevdata(sd);
int temperature;
int ret = 0;
/* Interact with HW only when it is powered ON */
if (!pm_runtime_get_if_in_use(&client->dev))
return 0;
switch (ctrl->id) {
case V4L2_CID_TEMPERATURE:
ret = vd56g3_get_temp(sensor, &temperature);
if (ret)
break;
ctrl->val = temperature;
break;
case V4L2_CID_EXPOSURE_AUTO:
ret = vd56g3_read_expo_cluster(sensor, false);
break;
default:
ret = -EINVAL;
break;
}
pm_runtime_mark_last_busy(&client->dev);
pm_runtime_put_autosuspend(&client->dev);
return ret;
}
static int vd56g3_s_ctrl(struct v4l2_ctrl *ctrl)
{
struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
struct vd56g3 *sensor = to_vd56g3(sd);
struct i2c_client *client = v4l2_get_subdevdata(sd);
#if KERNEL_VERSION(5, 19, 0) > LINUX_VERSION_CODE
#else
struct v4l2_subdev_state *state;
#endif
const struct v4l2_rect *crop;
unsigned int frame_length = 0;
unsigned int expo_max;
unsigned int ae_compensation;
bool is_auto = false;
int ret = 0;
#if KERNEL_VERSION(5, 19, 0) > LINUX_VERSION_CODE
crop = &sensor->active_crop;
#elif KERNEL_VERSION(6, 8, 0) > LINUX_VERSION_CODE
state = v4l2_subdev_get_locked_active_state(sd);
crop = v4l2_subdev_get_pad_crop(sd, state, 0);
#else
state = v4l2_subdev_get_locked_active_state(sd);
crop = v4l2_subdev_state_get_crop(state, 0);
#endif
if (ctrl->flags & V4L2_CTRL_FLAG_READ_ONLY)
return 0;
/* Update controls state, range, etc. whatever the state of the HW */
switch (ctrl->id) {
case V4L2_CID_VBLANK:
frame_length = crop->height + ctrl->val;
expo_max = frame_length - VD56G3_EXPOSURE_MARGIN;
ret = __v4l2_ctrl_modify_range(sensor->expo_ctrl,
VD56G3_EXPOSURE_MIN, expo_max, 1,
min(VD56G3_EXPOSURE_DEFAULT,
expo_max));
break;
case V4L2_CID_EXPOSURE_AUTO:
is_auto = (ctrl->val == V4L2_EXPOSURE_AUTO);
#if KERNEL_VERSION(4, 20, 0) > LINUX_VERSION_CODE
mutex_unlock(&sensor->lock);
v4l2_ctrl_grab(sensor->ae_lock_ctrl, !is_auto);
v4l2_ctrl_grab(sensor->ae_bias_ctrl, !is_auto);
v4l2_ctrl_grab(sensor->ae_target_ctrl, !is_auto);
v4l2_ctrl_grab(sensor->ae_step_prop_ctrl, !is_auto);
v4l2_ctrl_grab(sensor->ae_leak_prop_ctrl, !is_auto);
mutex_lock(&sensor->lock);
#else
__v4l2_ctrl_grab(sensor->ae_lock_ctrl, !is_auto);
__v4l2_ctrl_grab(sensor->ae_bias_ctrl, !is_auto);
__v4l2_ctrl_grab(sensor->ae_target_ctrl, !is_auto);
__v4l2_ctrl_grab(sensor->ae_step_prop_ctrl, !is_auto);
__v4l2_ctrl_grab(sensor->ae_leak_prop_ctrl, !is_auto);
#endif
break;
default:
break;
}
if (ret)
return ret;
/* Interact with HW only when it is powered ON */
if (!pm_runtime_get_if_in_use(&client->dev))
return 0;
switch (ctrl->id) {
case V4L2_CID_HFLIP:
ret = vd56g3_write(sensor, VD56G3_REG_ORIENTATION,
sensor->hflip_ctrl->val |
(sensor->vflip_ctrl->val << 1),
NULL);
break;
case V4L2_CID_TEST_PATTERN:
ret = vd56g3_update_patgen(sensor, ctrl->val);
break;
case V4L2_CID_EXPOSURE_AUTO:
ret = vd56g3_update_expo_cluster(sensor, is_auto);
break;
case V4L2_CID_3A_LOCK:
ret = vd56g3_lock_exposure(sensor, ctrl->val);
break;
case V4L2_CID_AUTO_EXPOSURE_BIAS:
ae_compensation =
DIV_ROUND_CLOSEST((int)vd56g3_ev_bias_qmenu[ctrl->val] *
256, 1000);
ret = vd56g3_write(sensor, VD56G3_REG_AE_COMPENSATION,
ae_compensation, NULL);
break;
case V4L2_CID_VBLANK:
ret = vd56g3_write(sensor, VD56G3_REG_FRAME_LENGTH,
frame_length, NULL);
break;
case V4L2_CID_SLAVE_MODE:
ret = vd56g3_write_gpiox(sensor, BIT(0));
ret = vd56g3_write(sensor, VD56G3_REG_VT_CTRL, ctrl->val, &ret);
break;
case V4L2_CID_FLASH_LED_MODE:
ret = vd56g3_write_gpiox(sensor, sensor->ext_leds_mask);
break;
case V4L2_CID_AE_TARGET_PERCENTAGE:
ret = vd56g3_write(sensor, VD56G3_REG_AE_TARGET_PERCENTAGE,
ctrl->val, NULL);
break;
case V4L2_CID_AE_STEP_PROPORTION:
ret = vd56g3_write(sensor, VD56G3_REG_AE_STEP_PROPORTION,
ctrl->val, NULL);
break;
case V4L2_CID_AE_LEAK_PROPORTION:
ret = vd56g3_write(sensor, VD56G3_REG_AE_LEAK_PROPORTION,
ctrl->val, NULL);
break;
case V4L2_CID_DARKCAL_PEDESTAL:
ret = vd56g3_write(sensor, VD56G3_REG_DARKCAL_PEDESTAL,
ctrl->val, NULL);
break;
default:
ret = -EINVAL;
break;
}
pm_runtime_mark_last_busy(&client->dev);
pm_runtime_put_autosuspend(&client->dev);
return ret;
}
static const struct v4l2_ctrl_ops vd56g3_ctrl_ops = {
.g_volatile_ctrl = vd56g3_g_volatile_ctrl,
.s_ctrl = vd56g3_s_ctrl,
};
/**
* DOC: Temperature Control
*
* Return sensor temperature (in Celsius)
*
* :id: ``V4L2_CID_TEMPERATURE``
* :type: ``V4L2_CTRL_TYPE_INTEGER``
*/
static const struct v4l2_ctrl_config vd56g3_temp_ctrl = {
.ops = &vd56g3_ctrl_ops,
.id = V4L2_CID_TEMPERATURE,
.name = "Temperature in celsius",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = -1024,
.max = 1023,
.step = 1,
};
/**